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57 lines
1.4 KiB
57 lines
1.4 KiB
CE4100 Device Tree Bindings |
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--------------------------- |
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The CE4100 SoC uses for in core peripherals the following compatible |
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format: <vendor>,<chip>-<device>. |
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Many of the "generic" devices like HPET or IO APIC have the ce4100 |
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name in their compatible property because they first appeared in this |
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SoC. |
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The CPU nodes |
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------------- |
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cpus { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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cpu@0 { |
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device_type = "cpu"; |
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compatible = "intel,ce4100"; |
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reg = <0x00>; |
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}; |
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cpu@2 { |
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device_type = "cpu"; |
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compatible = "intel,ce4100"; |
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reg = <0x02>; |
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}; |
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}; |
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A "cpu" node describes one logical processor (hardware thread). |
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Required properties: |
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- device_type |
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Device type, must be "cpu". |
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- reg |
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Local APIC ID, the unique number assigned to each processor by |
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system hardware. |
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The SoC node |
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------------ |
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This node describes the in-core peripherals. Required property: |
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compatible = "intel,ce4100-cp"; |
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The PCI node |
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------------ |
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This node describes the PCI bus on the SoC. Its property should be |
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compatible = "intel,ce4100-pci", "pci"; |
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If the OS is using the IO-APIC for interrupt routing then the reported |
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interrupt numbers for devices is no longer true. In order to obtain the |
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correct interrupt number, the child node which represents the device has |
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to contain the interrupt property. Besides the interrupt property it has |
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to contain at least the reg property containing the PCI bus address and |
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compatible property according to "PCI Bus Binding Revision 2.1".
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