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97 lines
2.3 KiB
97 lines
2.3 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX |
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maintainers: |
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- Shawn Guo <[email protected]> |
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allOf: |
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- $ref: "/schemas/spi/spi-controller.yaml#" |
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properties: |
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compatible: |
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oneOf: |
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- const: fsl,imx1-cspi |
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- const: fsl,imx21-cspi |
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- const: fsl,imx27-cspi |
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- const: fsl,imx31-cspi |
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- const: fsl,imx35-cspi |
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- const: fsl,imx51-ecspi |
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- const: fsl,imx53-ecspi |
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- items: |
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- enum: |
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- fsl,imx50-ecspi |
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- fsl,imx6q-ecspi |
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- fsl,imx6sx-ecspi |
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- fsl,imx6sl-ecspi |
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- fsl,imx6sll-ecspi |
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- fsl,imx6ul-ecspi |
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- fsl,imx7d-ecspi |
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- fsl,imx8mq-ecspi |
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- fsl,imx8mm-ecspi |
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- fsl,imx8mn-ecspi |
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- fsl,imx8mp-ecspi |
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- const: fsl,imx51-ecspi |
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reg: |
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maxItems: 1 |
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interrupts: |
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maxItems: 1 |
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clocks: |
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items: |
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- description: SoC SPI ipg clock |
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- description: SoC SPI per clock |
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clock-names: |
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items: |
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- const: ipg |
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- const: per |
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dmas: |
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items: |
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- description: DMA controller phandle and request line for RX |
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- description: DMA controller phandle and request line for TX |
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dma-names: |
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items: |
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- const: rx |
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- const: tx |
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fsl,spi-rdy-drctl: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: | |
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Integer, representing the value of DRCTL, the register controlling |
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the SPI_READY handling. Note that to enable the DRCTL consideration, |
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the SPI_READY mode-flag needs to be set too. |
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Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst). |
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enum: [0, 1, 2] |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- clocks |
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- clock-names |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/imx5-clock.h> |
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spi@70010000 { |
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#address-cells = <1>; |
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#size-cells = <0>; |
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compatible = "fsl,imx51-ecspi"; |
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reg = <0x70010000 0x4000>; |
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interrupts = <36>; |
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clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, |
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<&clks IMX5_CLK_ECSPI1_PER_GATE>; |
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clock-names = "ipg", "per"; |
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};
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