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80 lines
1.9 KiB
80 lines
1.9 KiB
Broadcom Northstar plus (NSP) GPIO/PINCONF Controller |
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Required properties: |
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- compatible: |
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Must be "brcm,nsp-gpio-a" |
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- reg: |
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Should contain the register physical address and length for each of |
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GPIO base, IO control registers |
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- #gpio-cells: |
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Must be two. The first cell is the GPIO pin number (within the |
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controller's pin space) and the second cell is used for the following: |
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bit[0]: polarity (0 for active high and 1 for active low) |
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- gpio-controller: |
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Specifies that the node is a GPIO controller |
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- ngpios: |
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Number of gpios supported (58x25 supports 32 and 58x23 supports 24) |
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Optional properties: |
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- interrupts: |
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Interrupt ID |
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- interrupt-controller: |
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Specifies that the node is an interrupt controller |
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- gpio-ranges: |
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Specifies the mapping between gpio controller and pin-controllers pins. |
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This requires 4 fields in cells defined as - |
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1. Phandle of pin-controller. |
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2. GPIO base pin offset. |
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3 Pin-control base pin offset. |
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4. number of gpio pins which are linearly mapped from pin base. |
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Supported generic PINCONF properties in child nodes: |
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- pins: |
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The list of pins (within the controller's own pin space) that properties |
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in the node apply to. Pin names are "gpio-<pin>" |
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- bias-disable: |
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Disable pin bias |
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- bias-pull-up: |
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Enable internal pull up resistor |
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- bias-pull-down: |
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Enable internal pull down resistor |
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- drive-strength: |
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Valid drive strength values include 2, 4, 6, 8, 10, 12, 14, 16 (mA) |
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Example: |
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gpioa: gpio@18000020 { |
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compatible = "brcm,nsp-gpio-a"; |
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reg = <0x18000020 0x100>, |
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<0x1803f1c4 0x1c>; |
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#gpio-cells = <2>; |
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gpio-controller; |
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ngpios = <32>; |
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gpio-ranges = <&pinctrl 0 0 31>; |
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interrupt-controller; |
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; |
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/* Hog a few default settings */ |
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pinctrl-names = "default"; |
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pinctrl-0 = <&led>; |
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led: led { |
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pins = "gpio-1"; |
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bias-pull-up; |
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}; |
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pwr: pwr { |
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gpio-hog; |
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gpios = <3 1>; |
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output-high; |
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}; |
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};
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