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74 lines
1.5 KiB
74 lines
1.5 KiB
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/phy/qcom,ipq806x-usb-phy-ss.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Qualcomm ipq806x usb DWC3 SS PHY CONTROLLER |
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maintainers: |
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- Ansuel Smith <[email protected]> |
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description: |
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DWC3 PHY nodes are defined to describe on-chip Synopsis Physical layer |
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controllers used in ipq806x. Each DWC3 PHY controller should have its |
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own node. |
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properties: |
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compatible: |
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const: qcom,ipq806x-usb-phy-ss |
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"#phy-cells": |
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const: 0 |
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reg: |
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maxItems: 1 |
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clocks: |
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minItems: 1 |
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maxItems: 2 |
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clock-names: |
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minItems: 1 |
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items: |
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- const: ref |
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- const: xo |
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qcom,rx-eq: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: Override value for rx_eq. |
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default: 4 |
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maximum: 7 |
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qcom,tx-deamp-3_5db: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: Override value for transmit preemphasis. |
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default: 23 |
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maximum: 63 |
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qcom,mpll: |
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$ref: /schemas/types.yaml#/definitions/uint32 |
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description: Override value for mpll. |
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default: 0 |
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maximum: 7 |
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required: |
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- compatible |
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- "#phy-cells" |
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- reg |
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- clocks |
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- clock-names |
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additionalProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/qcom,gcc-ipq806x.h> |
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ss_phy_0: phy@110f8830 { |
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compatible = "qcom,ipq806x-usb-phy-ss"; |
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reg = <0x110f8830 0x30>; |
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clocks = <&gcc USB30_0_MASTER_CLK>; |
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clock-names = "ref"; |
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#phy-cells = <0>; |
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};
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