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62 lines
1.4 KiB
62 lines
1.4 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Freescale Layerscape Security Fuse Processor |
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maintainers: |
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- Michael Walle <[email protected]> |
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description: | |
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SFP is the security fuse processor which among other things provides a |
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unique identifier per part. |
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allOf: |
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- $ref: "nvmem.yaml#" |
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properties: |
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compatible: |
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oneOf: |
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- description: Trust architecture 2.1 SFP |
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items: |
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- const: fsl,ls1021a-sfp |
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- description: Trust architecture 3.0 SFP |
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items: |
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- const: fsl,ls1028a-sfp |
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reg: |
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maxItems: 1 |
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clocks: |
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maxItems: 1 |
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description: |
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The SFP clock. Typically, this is the platform clock divided by 4. |
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clock-names: |
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const: sfp |
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ta-prog-sfp-supply: |
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description: |
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The regulator for the TA_PROG_SFP pin. It will be enabled for programming |
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and disabled for reading. |
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required: |
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- compatible |
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- reg |
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- clock-names |
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- clocks |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/fsl,qoriq-clockgen.h> |
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efuse@1e80000 { |
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compatible = "fsl,ls1028a-sfp"; |
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reg = <0x1e80000 0x8000>; |
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clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL |
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QORIQ_CLK_PLL_DIV(4)>; |
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clock-names = "sfp"; |
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};
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