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67 lines
2.6 KiB
67 lines
2.6 KiB
* Spreadtrum SDHCI controller (sdhci-sprd) |
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The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface |
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for MMC, SD and SDIO types of cards. |
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This file documents differences between the core properties in mmc.txt |
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and the properties used by the sdhci-sprd driver. |
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Required properties: |
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- compatible: Should contain "sprd,sdhci-r11". |
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- reg: physical base address of the controller and length. |
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- interrupts: Interrupts used by the SDHCI controller. |
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- clocks: Should contain phandle for the clock feeding the SDHCI controller |
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- clock-names: Should contain the following: |
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"sdio" - SDIO source clock (required) |
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"enable" - gate clock which used for enabling/disabling the device (required) |
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"2x_enable" - gate clock controlling the device for some special platforms (optional) |
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Optional properties: |
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- assigned-clocks: the same with "sdio" clock |
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- assigned-clock-parents: the default parent of "sdio" clock |
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- pinctrl-names: should be "default", "state_uhs" |
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- pinctrl-0: should contain default/high speed pin control |
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- pinctrl-1: should contain uhs mode pin control |
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PHY DLL delays are used to delay the data valid window, and align the window |
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to sampling clock. PHY DLL delays can be configured by following properties, |
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and each property contains 4 cells which are used to configure the clock data |
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write line delay value, clock read command line delay value, clock read data |
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positive edge delay value and clock read data negative edge delay value. |
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Each cell's delay value unit is cycle of the PHY clock. |
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- sprd,phy-delay-legacy: Delay value for legacy timing. |
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- sprd,phy-delay-sd-highspeed: Delay value for SD high-speed timing. |
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- sprd,phy-delay-sd-uhs-sdr50: Delay value for SD UHS SDR50 timing. |
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- sprd,phy-delay-sd-uhs-sdr104: Delay value for SD UHS SDR50 timing. |
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- sprd,phy-delay-mmc-highspeed: Delay value for MMC high-speed timing. |
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- sprd,phy-delay-mmc-ddr52: Delay value for MMC DDR52 timing. |
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- sprd,phy-delay-mmc-hs200: Delay value for MMC HS200 timing. |
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- sprd,phy-delay-mmc-hs400: Delay value for MMC HS400 timing. |
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- sprd,phy-delay-mmc-hs400es: Delay value for MMC HS400 enhanced strobe timing. |
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Examples: |
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sdio0: sdio@20600000 { |
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compatible = "sprd,sdhci-r11"; |
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reg = <0 0x20600000 0 0x1000>; |
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interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; |
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clock-names = "sdio", "enable"; |
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clocks = <&ap_clk CLK_EMMC_2X>, |
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<&apahb_gate CLK_EMMC_EB>; |
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assigned-clocks = <&ap_clk CLK_EMMC_2X>; |
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assigned-clock-parents = <&rpll CLK_RPLL_390M>; |
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pinctrl-names = "default", "state_uhs"; |
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pinctrl-0 = <&sd0_pins_default>; |
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pinctrl-1 = <&sd0_pins_uhs>; |
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sprd,phy-delay-sd-uhs-sdr104 = <0x3f 0x7f 0x2e 0x2e>; |
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bus-width = <8>; |
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non-removable; |
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no-sdio; |
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no-sd; |
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cap-mmc-hw-reset; |
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status = "okay"; |
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};
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