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70 lines
1.6 KiB
70 lines
1.6 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/mmc/amlogic,meson-mx-sdhc.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Amlogic Meson SDHC controller Device Tree Bindings |
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allOf: |
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- $ref: "mmc-controller.yaml" |
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maintainers: |
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- Martin Blumenstingl <[email protected]> |
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description: | |
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The SDHC MMC host controller on Amlogic SoCs provides an eMMC and MMC |
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card interface with 1/4/8-bit bus width. |
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It supports eMMC spec 4.4x/4.5x including HS200 (up to 100MHz clock). |
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properties: |
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compatible: |
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items: |
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- enum: |
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- amlogic,meson8-sdhc |
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- amlogic,meson8b-sdhc |
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- amlogic,meson8m2-sdhc |
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- const: amlogic,meson-mx-sdhc |
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reg: |
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minItems: 1 |
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interrupts: |
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minItems: 1 |
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clocks: |
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minItems: 5 |
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clock-names: |
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items: |
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- const: clkin0 |
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- const: clkin1 |
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- const: clkin2 |
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- const: clkin3 |
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- const: pclk |
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required: |
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- compatible |
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- reg |
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- interrupts |
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- clocks |
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- clock-names |
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unevaluatedProperties: false |
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examples: |
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- | |
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#include <dt-bindings/interrupt-controller/irq.h> |
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#include <dt-bindings/interrupt-controller/arm-gic.h> |
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sdhc: mmc@8e00 { |
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compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc"; |
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reg = <0x8e00 0x42>; |
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interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; |
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clocks = <&xtal>, |
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<&fclk_div4>, |
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<&fclk_div3>, |
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<&fclk_div5>, |
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<&sdhc_pclk>; |
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clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; |
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};
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