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51 lines
1.1 KiB
51 lines
1.1 KiB
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
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%YAML 1.2 |
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--- |
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$id: http://devicetree.org/schemas/memory-controllers/fsl/mmdc.yaml# |
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$schema: http://devicetree.org/meta-schemas/core.yaml# |
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title: Freescale Multi Mode DDR controller (MMDC) |
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maintainers: |
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- Anson Huang <[email protected]> |
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properties: |
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compatible: |
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oneOf: |
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- const: fsl,imx6q-mmdc |
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- items: |
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- enum: |
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- fsl,imx6qp-mmdc |
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- fsl,imx6sl-mmdc |
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- fsl,imx6sll-mmdc |
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- fsl,imx6sx-mmdc |
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- fsl,imx6ul-mmdc |
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- fsl,imx7ulp-mmdc |
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- const: fsl,imx6q-mmdc |
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reg: |
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maxItems: 1 |
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clocks: |
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maxItems: 1 |
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required: |
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- compatible |
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- reg |
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additionalProperties: false |
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examples: |
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- | |
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#include <dt-bindings/clock/imx6qdl-clock.h> |
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memory-controller@21b0000 { |
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compatible = "fsl,imx6q-mmdc"; |
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reg = <0x021b0000 0x4000>; |
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clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>; |
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}; |
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memory-controller@21b4000 { |
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compatible = "fsl,imx6q-mmdc"; |
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reg = <0x021b4000 0x4000>; |
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};
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