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56 lines
1.3 KiB
56 lines
1.3 KiB
Binding for NVIDIA Tegra20 CPUFreq |
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================================== |
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Required properties: |
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- clocks: Must contain an entry for the CPU clock. |
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See ../clocks/clock-bindings.txt for details. |
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- operating-points-v2: See ../bindings/opp/opp-v2.yaml for details. |
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- #cooling-cells: Should be 2. See ../thermal/thermal-cooling-devices.yaml for details. |
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For each opp entry in 'operating-points-v2' table: |
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- opp-supported-hw: Two bitfields indicating: |
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On Tegra20: |
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1. CPU process ID mask |
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2. SoC speedo ID mask |
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On Tegra30: |
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1. CPU process ID mask |
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2. CPU speedo ID mask |
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A bitwise AND is performed against these values and if any bit |
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matches, the OPP gets enabled. |
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- opp-microvolt: CPU voltage triplet. |
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Optional properties: |
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- cpu-supply: Phandle to the CPU power supply. |
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Example: |
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regulators { |
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cpu_reg: regulator0 { |
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regulator-name = "vdd_cpu"; |
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}; |
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}; |
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cpu0_opp_table: opp_table0 { |
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compatible = "operating-points-v2"; |
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opp@456000000 { |
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clock-latency-ns = <125000>; |
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opp-microvolt = <825000 825000 1125000>; |
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opp-supported-hw = <0x03 0x0001>; |
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opp-hz = /bits/ 64 <456000000>; |
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}; |
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... |
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}; |
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cpus { |
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cpu@0 { |
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compatible = "arm,cortex-a9"; |
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clocks = <&tegra_car TEGRA20_CLK_CCLK>; |
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operating-points-v2 = <&cpu0_opp_table>; |
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cpu-supply = <&cpu_reg>; |
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#cooling-cells = <2>; |
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}; |
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};
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