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50 lines
1.4 KiB
50 lines
1.4 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Port on Texas Instruments TMS320C6x architecture |
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* |
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* Copyright (C) 2004, 2006, 2009, 2010, 2011 Texas Instruments Incorporated |
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* Author: Aurelien Jacquiot ([email protected]) |
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* |
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* Large parts taken directly from powerpc. |
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*/ |
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#ifndef _ASM_C6X_IRQ_H |
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#define _ASM_C6X_IRQ_H |
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#include <linux/irqdomain.h> |
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#include <linux/threads.h> |
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#include <linux/list.h> |
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#include <linux/radix-tree.h> |
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#include <asm/percpu.h> |
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#define irq_canonicalize(irq) (irq) |
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/* |
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* The C64X+ core has 16 IRQ vectors. One each is used by Reset and NMI. Two |
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* are reserved. The remaining 12 vectors are used to route SoC interrupts. |
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* These interrupt vectors are prioritized with IRQ 4 having the highest |
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* priority and IRQ 15 having the lowest. |
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* |
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* The C64x+ megamodule provides a PIC which combines SoC IRQ sources into a |
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* single core IRQ vector. There are four combined sources, each of which |
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* feed into one of the 12 general interrupt vectors. The remaining 8 vectors |
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* can each route a single SoC interrupt directly. |
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*/ |
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#define NR_PRIORITY_IRQS 16 |
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/* Total number of virq in the platform */ |
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#define NR_IRQS 256 |
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/* This number is used when no interrupt has been assigned */ |
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#define NO_IRQ 0 |
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extern void __init init_pic_c64xplus(void); |
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extern void init_IRQ(void); |
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struct pt_regs; |
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extern asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs); |
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extern unsigned long irq_err_count; |
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#endif /* _ASM_C6X_IRQ_H */
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