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343 lines
9.6 KiB
343 lines
9.6 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2011 Marvell International Ltd. All rights reserved. |
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* Copyright (C) 2018 Lubomir Rintel <[email protected]> |
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*/ |
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#include <dt-bindings/phy/phy.h> |
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/of_address.h> |
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#include <linux/phy/phy.h> |
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#include <linux/platform_device.h> |
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/* phy regs */ |
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#define UTMI_REVISION 0x0 |
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#define UTMI_CTRL 0x4 |
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#define UTMI_PLL 0x8 |
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#define UTMI_TX 0xc |
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#define UTMI_RX 0x10 |
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#define UTMI_IVREF 0x14 |
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#define UTMI_T0 0x18 |
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#define UTMI_T1 0x1c |
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#define UTMI_T2 0x20 |
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#define UTMI_T3 0x24 |
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#define UTMI_T4 0x28 |
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#define UTMI_T5 0x2c |
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#define UTMI_RESERVE 0x30 |
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#define UTMI_USB_INT 0x34 |
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#define UTMI_DBG_CTL 0x38 |
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#define UTMI_OTG_ADDON 0x3c |
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/* For UTMICTRL Register */ |
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#define UTMI_CTRL_USB_CLK_EN (1 << 31) |
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/* pxa168 */ |
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#define UTMI_CTRL_SUSPEND_SET1 (1 << 30) |
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#define UTMI_CTRL_SUSPEND_SET2 (1 << 29) |
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#define UTMI_CTRL_RXBUF_PDWN (1 << 24) |
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#define UTMI_CTRL_TXBUF_PDWN (1 << 11) |
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#define UTMI_CTRL_INPKT_DELAY_SHIFT 30 |
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#define UTMI_CTRL_INPKT_DELAY_SOF_SHIFT 28 |
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#define UTMI_CTRL_PU_REF_SHIFT 20 |
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#define UTMI_CTRL_ARC_PULLDN_SHIFT 12 |
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#define UTMI_CTRL_PLL_PWR_UP_SHIFT 1 |
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#define UTMI_CTRL_PWR_UP_SHIFT 0 |
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/* For UTMI_PLL Register */ |
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#define UTMI_PLL_PLLCALI12_SHIFT 29 |
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#define UTMI_PLL_PLLCALI12_MASK (0x3 << 29) |
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#define UTMI_PLL_PLLVDD18_SHIFT 27 |
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#define UTMI_PLL_PLLVDD18_MASK (0x3 << 27) |
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#define UTMI_PLL_PLLVDD12_SHIFT 25 |
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#define UTMI_PLL_PLLVDD12_MASK (0x3 << 25) |
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#define UTMI_PLL_CLK_BLK_EN_SHIFT 24 |
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#define CLK_BLK_EN (0x1 << 24) |
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#define PLL_READY (0x1 << 23) |
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#define KVCO_EXT (0x1 << 22) |
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#define VCOCAL_START (0x1 << 21) |
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#define UTMI_PLL_KVCO_SHIFT 15 |
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#define UTMI_PLL_KVCO_MASK (0x7 << 15) |
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#define UTMI_PLL_ICP_SHIFT 12 |
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#define UTMI_PLL_ICP_MASK (0x7 << 12) |
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#define UTMI_PLL_FBDIV_SHIFT 4 |
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#define UTMI_PLL_FBDIV_MASK (0xFF << 4) |
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#define UTMI_PLL_REFDIV_SHIFT 0 |
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#define UTMI_PLL_REFDIV_MASK (0xF << 0) |
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/* For UTMI_TX Register */ |
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#define UTMI_TX_REG_EXT_FS_RCAL_SHIFT 27 |
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#define UTMI_TX_REG_EXT_FS_RCAL_MASK (0xf << 27) |
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#define UTMI_TX_REG_EXT_FS_RCAL_EN_SHIFT 26 |
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#define UTMI_TX_REG_EXT_FS_RCAL_EN_MASK (0x1 << 26) |
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#define UTMI_TX_TXVDD12_SHIFT 22 |
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#define UTMI_TX_TXVDD12_MASK (0x3 << 22) |
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#define UTMI_TX_CK60_PHSEL_SHIFT 17 |
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#define UTMI_TX_CK60_PHSEL_MASK (0xf << 17) |
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#define UTMI_TX_IMPCAL_VTH_SHIFT 14 |
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#define UTMI_TX_IMPCAL_VTH_MASK (0x7 << 14) |
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#define REG_RCAL_START (0x1 << 12) |
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#define UTMI_TX_LOW_VDD_EN_SHIFT 11 |
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#define UTMI_TX_AMP_SHIFT 0 |
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#define UTMI_TX_AMP_MASK (0x7 << 0) |
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/* For UTMI_RX Register */ |
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#define UTMI_REG_SQ_LENGTH_SHIFT 15 |
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#define UTMI_REG_SQ_LENGTH_MASK (0x3 << 15) |
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#define UTMI_RX_SQ_THRESH_SHIFT 4 |
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#define UTMI_RX_SQ_THRESH_MASK (0xf << 4) |
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#define UTMI_OTG_ADDON_OTG_ON (1 << 0) |
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enum pxa_usb_phy_version { |
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PXA_USB_PHY_MMP2, |
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PXA_USB_PHY_PXA910, |
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PXA_USB_PHY_PXA168, |
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}; |
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struct pxa_usb_phy { |
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struct phy *phy; |
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void __iomem *base; |
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enum pxa_usb_phy_version version; |
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}; |
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/***************************************************************************** |
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* The registers read/write routines |
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*****************************************************************************/ |
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static unsigned int u2o_get(void __iomem *base, unsigned int offset) |
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{ |
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return readl_relaxed(base + offset); |
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} |
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static void u2o_set(void __iomem *base, unsigned int offset, |
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unsigned int value) |
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{ |
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u32 reg; |
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reg = readl_relaxed(base + offset); |
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reg |= value; |
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writel_relaxed(reg, base + offset); |
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readl_relaxed(base + offset); |
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} |
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static void u2o_clear(void __iomem *base, unsigned int offset, |
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unsigned int value) |
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{ |
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u32 reg; |
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reg = readl_relaxed(base + offset); |
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reg &= ~value; |
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writel_relaxed(reg, base + offset); |
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readl_relaxed(base + offset); |
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} |
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static void u2o_write(void __iomem *base, unsigned int offset, |
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unsigned int value) |
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{ |
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writel_relaxed(value, base + offset); |
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readl_relaxed(base + offset); |
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} |
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static int pxa_usb_phy_init(struct phy *phy) |
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{ |
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struct pxa_usb_phy *pxa_usb_phy = phy_get_drvdata(phy); |
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void __iomem *base = pxa_usb_phy->base; |
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int loops; |
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dev_info(&phy->dev, "initializing Marvell PXA USB PHY"); |
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/* Initialize the USB PHY power */ |
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if (pxa_usb_phy->version == PXA_USB_PHY_PXA910) { |
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u2o_set(base, UTMI_CTRL, (1<<UTMI_CTRL_INPKT_DELAY_SOF_SHIFT) |
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| (1<<UTMI_CTRL_PU_REF_SHIFT)); |
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} |
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u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT); |
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u2o_set(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT); |
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/* UTMI_PLL settings */ |
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u2o_clear(base, UTMI_PLL, UTMI_PLL_PLLVDD18_MASK |
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| UTMI_PLL_PLLVDD12_MASK | UTMI_PLL_PLLCALI12_MASK |
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| UTMI_PLL_FBDIV_MASK | UTMI_PLL_REFDIV_MASK |
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| UTMI_PLL_ICP_MASK | UTMI_PLL_KVCO_MASK); |
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u2o_set(base, UTMI_PLL, 0xee<<UTMI_PLL_FBDIV_SHIFT |
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| 0xb<<UTMI_PLL_REFDIV_SHIFT | 3<<UTMI_PLL_PLLVDD18_SHIFT |
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| 3<<UTMI_PLL_PLLVDD12_SHIFT | 3<<UTMI_PLL_PLLCALI12_SHIFT |
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| 1<<UTMI_PLL_ICP_SHIFT | 3<<UTMI_PLL_KVCO_SHIFT); |
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/* UTMI_TX */ |
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u2o_clear(base, UTMI_TX, UTMI_TX_REG_EXT_FS_RCAL_EN_MASK |
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| UTMI_TX_TXVDD12_MASK | UTMI_TX_CK60_PHSEL_MASK |
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| UTMI_TX_IMPCAL_VTH_MASK | UTMI_TX_REG_EXT_FS_RCAL_MASK |
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| UTMI_TX_AMP_MASK); |
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u2o_set(base, UTMI_TX, 3<<UTMI_TX_TXVDD12_SHIFT |
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| 4<<UTMI_TX_CK60_PHSEL_SHIFT | 4<<UTMI_TX_IMPCAL_VTH_SHIFT |
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| 8<<UTMI_TX_REG_EXT_FS_RCAL_SHIFT | 3<<UTMI_TX_AMP_SHIFT); |
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/* UTMI_RX */ |
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u2o_clear(base, UTMI_RX, UTMI_RX_SQ_THRESH_MASK |
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| UTMI_REG_SQ_LENGTH_MASK); |
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u2o_set(base, UTMI_RX, 7<<UTMI_RX_SQ_THRESH_SHIFT |
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| 2<<UTMI_REG_SQ_LENGTH_SHIFT); |
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/* UTMI_IVREF */ |
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if (pxa_usb_phy->version == PXA_USB_PHY_PXA168) { |
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/* |
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* fixing Microsoft Altair board interface with NEC hub issue - |
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* Set UTMI_IVREF from 0x4a3 to 0x4bf |
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*/ |
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u2o_write(base, UTMI_IVREF, 0x4bf); |
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} |
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/* toggle VCOCAL_START bit of UTMI_PLL */ |
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udelay(200); |
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u2o_set(base, UTMI_PLL, VCOCAL_START); |
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udelay(40); |
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u2o_clear(base, UTMI_PLL, VCOCAL_START); |
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/* toggle REG_RCAL_START bit of UTMI_TX */ |
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udelay(400); |
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u2o_set(base, UTMI_TX, REG_RCAL_START); |
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udelay(40); |
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u2o_clear(base, UTMI_TX, REG_RCAL_START); |
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udelay(400); |
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/* Make sure PHY PLL is ready */ |
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loops = 0; |
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while ((u2o_get(base, UTMI_PLL) & PLL_READY) == 0) { |
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mdelay(1); |
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loops++; |
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if (loops > 100) { |
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dev_warn(&phy->dev, "calibrate timeout, UTMI_PLL %x\n", |
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u2o_get(base, UTMI_PLL)); |
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break; |
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} |
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} |
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if (pxa_usb_phy->version == PXA_USB_PHY_PXA168) { |
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u2o_set(base, UTMI_RESERVE, 1 << 5); |
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/* Turn on UTMI PHY OTG extension */ |
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u2o_write(base, UTMI_OTG_ADDON, 1); |
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} |
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return 0; |
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} |
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static int pxa_usb_phy_exit(struct phy *phy) |
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{ |
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struct pxa_usb_phy *pxa_usb_phy = phy_get_drvdata(phy); |
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void __iomem *base = pxa_usb_phy->base; |
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dev_info(&phy->dev, "deinitializing Marvell PXA USB PHY"); |
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if (pxa_usb_phy->version == PXA_USB_PHY_PXA168) |
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u2o_clear(base, UTMI_OTG_ADDON, UTMI_OTG_ADDON_OTG_ON); |
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u2o_clear(base, UTMI_CTRL, UTMI_CTRL_RXBUF_PDWN); |
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u2o_clear(base, UTMI_CTRL, UTMI_CTRL_TXBUF_PDWN); |
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u2o_clear(base, UTMI_CTRL, UTMI_CTRL_USB_CLK_EN); |
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u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PWR_UP_SHIFT); |
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u2o_clear(base, UTMI_CTRL, 1<<UTMI_CTRL_PLL_PWR_UP_SHIFT); |
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return 0; |
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} |
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static const struct phy_ops pxa_usb_phy_ops = { |
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.init = pxa_usb_phy_init, |
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.exit = pxa_usb_phy_exit, |
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.owner = THIS_MODULE, |
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}; |
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static const struct of_device_id pxa_usb_phy_of_match[] = { |
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{ |
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.compatible = "marvell,mmp2-usb-phy", |
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.data = (void *)PXA_USB_PHY_MMP2, |
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}, { |
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.compatible = "marvell,pxa910-usb-phy", |
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.data = (void *)PXA_USB_PHY_PXA910, |
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}, { |
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.compatible = "marvell,pxa168-usb-phy", |
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.data = (void *)PXA_USB_PHY_PXA168, |
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}, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, pxa_usb_phy_of_match); |
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static int pxa_usb_phy_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct pxa_usb_phy *pxa_usb_phy; |
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struct phy_provider *provider; |
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const struct of_device_id *of_id; |
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pxa_usb_phy = devm_kzalloc(dev, sizeof(struct pxa_usb_phy), GFP_KERNEL); |
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if (!pxa_usb_phy) |
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return -ENOMEM; |
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of_id = of_match_node(pxa_usb_phy_of_match, dev->of_node); |
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if (of_id) |
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pxa_usb_phy->version = (enum pxa_usb_phy_version)of_id->data; |
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else |
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pxa_usb_phy->version = PXA_USB_PHY_MMP2; |
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pxa_usb_phy->base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(pxa_usb_phy->base)) { |
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dev_err(dev, "failed to remap PHY regs\n"); |
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return PTR_ERR(pxa_usb_phy->base); |
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} |
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pxa_usb_phy->phy = devm_phy_create(dev, NULL, &pxa_usb_phy_ops); |
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if (IS_ERR(pxa_usb_phy->phy)) { |
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dev_err(dev, "failed to create PHY\n"); |
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return PTR_ERR(pxa_usb_phy->phy); |
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} |
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phy_set_drvdata(pxa_usb_phy->phy, pxa_usb_phy); |
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provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); |
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if (IS_ERR(provider)) { |
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dev_err(dev, "failed to register PHY provider\n"); |
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return PTR_ERR(provider); |
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} |
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if (!dev->of_node) { |
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phy_create_lookup(pxa_usb_phy->phy, "usb", "mv-udc"); |
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phy_create_lookup(pxa_usb_phy->phy, "usb", "pxa-u2oehci"); |
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phy_create_lookup(pxa_usb_phy->phy, "usb", "mv-otg"); |
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} |
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dev_info(dev, "Marvell PXA USB PHY"); |
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return 0; |
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} |
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static struct platform_driver pxa_usb_phy_driver = { |
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.probe = pxa_usb_phy_probe, |
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.driver = { |
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.name = "pxa-usb-phy", |
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.of_match_table = pxa_usb_phy_of_match, |
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}, |
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}; |
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module_platform_driver(pxa_usb_phy_driver); |
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MODULE_AUTHOR("Lubomir Rintel <[email protected]>"); |
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MODULE_DESCRIPTION("Marvell PXA USB PHY Driver"); |
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MODULE_LICENSE("GPL v2");
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