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62 lines
1.5 KiB
62 lines
1.5 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* |
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* Copyright (c) 2021 TOSHIBA CORPORATION |
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* Copyright (c) 2021 Toshiba Electronic Devices & Storage Corporation |
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* |
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* Nobuhiro Iwamatsu <[email protected]> |
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*/ |
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#ifndef _VISCONTI_PLL_H_ |
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#define _VISCONTI_PLL_H_ |
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#include <linux/clk-provider.h> |
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#include <linux/regmap.h> |
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#include <linux/spinlock.h> |
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struct visconti_pll_provider { |
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void __iomem *reg_base; |
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struct regmap *regmap; |
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struct clk_hw_onecell_data clk_data; |
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struct device_node *node; |
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}; |
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#define VISCONTI_PLL_RATE(_rate, _dacen, _dsmen, \ |
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_refdiv, _intin, _fracin, _postdiv1, _postdiv2) \ |
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{ \ |
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.rate = _rate, \ |
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.dacen = _dacen, \ |
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.dsmen = _dsmen, \ |
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.refdiv = _refdiv, \ |
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.intin = _intin, \ |
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.fracin = _fracin, \ |
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.postdiv1 = _postdiv1, \ |
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.postdiv2 = _postdiv2 \ |
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} |
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struct visconti_pll_rate_table { |
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unsigned long rate; |
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unsigned int dacen; |
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unsigned int dsmen; |
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unsigned int refdiv; |
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unsigned long intin; |
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unsigned long fracin; |
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unsigned int postdiv1; |
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unsigned int postdiv2; |
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}; |
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struct visconti_pll_info { |
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unsigned int id; |
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const char *name; |
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const char *parent; |
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unsigned long base_reg; |
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const struct visconti_pll_rate_table *rate_table; |
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}; |
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struct visconti_pll_provider * __init visconti_init_pll(struct device_node *np, |
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void __iomem *base, |
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unsigned long nr_plls); |
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void visconti_register_plls(struct visconti_pll_provider *ctx, |
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const struct visconti_pll_info *list, |
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unsigned int nr_plls, spinlock_t *lock); |
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#endif /* _VISCONTI_PLL_H_ */
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