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216 lines
5.2 KiB
216 lines
5.2 KiB
/* |
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* include/asm-xtensa/bitops.h |
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* |
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* Atomic operations that C can't guarantee us.Useful for resource counting etc. |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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* |
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* Copyright (C) 2001 - 2007 Tensilica Inc. |
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*/ |
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#ifndef _XTENSA_BITOPS_H |
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#define _XTENSA_BITOPS_H |
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#ifndef _LINUX_BITOPS_H |
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#error only <linux/bitops.h> can be included directly |
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#endif |
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#include <asm/processor.h> |
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#include <asm/byteorder.h> |
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#include <asm/barrier.h> |
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#include <asm-generic/bitops/non-atomic.h> |
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#if XCHAL_HAVE_NSA |
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static inline unsigned long __cntlz (unsigned long x) |
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{ |
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int lz; |
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asm ("nsau %0, %1" : "=r" (lz) : "r" (x)); |
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return lz; |
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} |
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/* |
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* ffz: Find first zero in word. Undefined if no zero exists. |
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* bit 0 is the LSB of addr; bit 32 is the LSB of (addr+1). |
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*/ |
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static inline int ffz(unsigned long x) |
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{ |
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return 31 - __cntlz(~x & -~x); |
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} |
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/* |
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* __ffs: Find first bit set in word. Return 0 for bit 0 |
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*/ |
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static inline unsigned long __ffs(unsigned long x) |
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{ |
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return 31 - __cntlz(x & -x); |
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} |
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/* |
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* ffs: Find first bit set in word. This is defined the same way as |
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* the libc and compiler builtin ffs routines, therefore |
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* differs in spirit from the above ffz (man ffs). |
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*/ |
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static inline int ffs(unsigned long x) |
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{ |
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return 32 - __cntlz(x & -x); |
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} |
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/* |
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* fls: Find last (most-significant) bit set in word. |
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. |
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*/ |
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static inline int fls (unsigned int x) |
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{ |
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return 32 - __cntlz(x); |
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} |
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/** |
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* __fls - find last (most-significant) set bit in a long word |
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* @word: the word to search |
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* |
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* Undefined if no set bit exists, so code should check against 0 first. |
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*/ |
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static inline unsigned long __fls(unsigned long word) |
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{ |
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return 31 - __cntlz(word); |
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} |
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#else |
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/* Use the generic implementation if we don't have the nsa/nsau instructions. */ |
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# include <asm-generic/bitops/ffs.h> |
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# include <asm-generic/bitops/__ffs.h> |
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# include <asm-generic/bitops/ffz.h> |
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# include <asm-generic/bitops/fls.h> |
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# include <asm-generic/bitops/__fls.h> |
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#endif |
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#include <asm-generic/bitops/fls64.h> |
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#if XCHAL_HAVE_EXCLUSIVE |
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#define BIT_OP(op, insn, inv) \ |
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static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\ |
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{ \ |
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unsigned long tmp; \ |
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unsigned long mask = 1UL << (bit & 31); \ |
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\ |
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p += bit >> 5; \ |
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\ |
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__asm__ __volatile__( \ |
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"1: l32ex %[tmp], %[addr]\n" \ |
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" "insn" %[tmp], %[tmp], %[mask]\n" \ |
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" s32ex %[tmp], %[addr]\n" \ |
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" getex %[tmp]\n" \ |
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" beqz %[tmp], 1b\n" \ |
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: [tmp] "=&a" (tmp) \ |
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: [mask] "a" (inv mask), [addr] "a" (p) \ |
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: "memory"); \ |
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} |
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#define TEST_AND_BIT_OP(op, insn, inv) \ |
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static inline int \ |
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test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \ |
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{ \ |
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unsigned long tmp, value; \ |
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unsigned long mask = 1UL << (bit & 31); \ |
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\ |
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p += bit >> 5; \ |
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\ |
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__asm__ __volatile__( \ |
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"1: l32ex %[value], %[addr]\n" \ |
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" "insn" %[tmp], %[value], %[mask]\n" \ |
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" s32ex %[tmp], %[addr]\n" \ |
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" getex %[tmp]\n" \ |
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" beqz %[tmp], 1b\n" \ |
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: [tmp] "=&a" (tmp), [value] "=&a" (value) \ |
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: [mask] "a" (inv mask), [addr] "a" (p) \ |
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: "memory"); \ |
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\ |
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return value & mask; \ |
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} |
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#elif XCHAL_HAVE_S32C1I |
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#define BIT_OP(op, insn, inv) \ |
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static inline void op##_bit(unsigned int bit, volatile unsigned long *p)\ |
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{ \ |
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unsigned long tmp, value; \ |
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unsigned long mask = 1UL << (bit & 31); \ |
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\ |
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p += bit >> 5; \ |
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\ |
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__asm__ __volatile__( \ |
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"1: l32i %[value], %[mem]\n" \ |
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" wsr %[value], scompare1\n" \ |
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" "insn" %[tmp], %[value], %[mask]\n" \ |
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" s32c1i %[tmp], %[mem]\n" \ |
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" bne %[tmp], %[value], 1b\n" \ |
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: [tmp] "=&a" (tmp), [value] "=&a" (value), \ |
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[mem] "+m" (*p) \ |
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: [mask] "a" (inv mask) \ |
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: "memory"); \ |
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} |
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#define TEST_AND_BIT_OP(op, insn, inv) \ |
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static inline int \ |
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test_and_##op##_bit(unsigned int bit, volatile unsigned long *p) \ |
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{ \ |
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unsigned long tmp, value; \ |
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unsigned long mask = 1UL << (bit & 31); \ |
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\ |
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p += bit >> 5; \ |
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\ |
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__asm__ __volatile__( \ |
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"1: l32i %[value], %[mem]\n" \ |
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" wsr %[value], scompare1\n" \ |
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" "insn" %[tmp], %[value], %[mask]\n" \ |
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" s32c1i %[tmp], %[mem]\n" \ |
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" bne %[tmp], %[value], 1b\n" \ |
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: [tmp] "=&a" (tmp), [value] "=&a" (value), \ |
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[mem] "+m" (*p) \ |
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: [mask] "a" (inv mask) \ |
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: "memory"); \ |
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\ |
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return tmp & mask; \ |
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} |
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#else |
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#define BIT_OP(op, insn, inv) |
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#define TEST_AND_BIT_OP(op, insn, inv) |
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#include <asm-generic/bitops/atomic.h> |
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#endif /* XCHAL_HAVE_S32C1I */ |
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#define BIT_OPS(op, insn, inv) \ |
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BIT_OP(op, insn, inv) \ |
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TEST_AND_BIT_OP(op, insn, inv) |
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BIT_OPS(set, "or", ) |
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BIT_OPS(clear, "and", ~) |
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BIT_OPS(change, "xor", ) |
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#undef BIT_OPS |
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#undef BIT_OP |
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#undef TEST_AND_BIT_OP |
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#include <asm-generic/bitops/le.h> |
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#include <asm-generic/bitops/ext2-atomic-setbit.h> |
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#include <asm-generic/bitops/hweight.h> |
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#include <asm-generic/bitops/lock.h> |
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#include <asm-generic/bitops/sched.h> |
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#endif /* _XTENSA_BITOPS_H */
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