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466 lines
13 KiB
466 lines
13 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Derived from arch/i386/kernel/irq.c |
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* Copyright (C) 1992 Linus Torvalds |
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* Adapted from arch/i386 by Gary Thomas |
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* Copyright (C) 1995-1996 Gary Thomas ([email protected]) |
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* Updated and modified by Cort Dougan <[email protected]> |
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* Copyright (C) 1996-2001 Cort Dougan |
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* Adapted for Power Macintosh by Paul Mackerras |
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* Copyright (C) 1996 Paul Mackerras ([email protected]) |
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* |
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* This file contains the code used by various IRQ handling routines: |
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* asking for different IRQ's should be done through these routines |
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* instead of just grabbing them. Thus setups with different IRQ numbers |
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* shouldn't result in any weird surprises, and installing new handlers |
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* should be easier. |
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*/ |
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#undef DEBUG |
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#include <linux/export.h> |
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#include <linux/threads.h> |
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#include <linux/kernel_stat.h> |
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#include <linux/signal.h> |
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#include <linux/sched.h> |
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#include <linux/ptrace.h> |
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#include <linux/ioport.h> |
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#include <linux/interrupt.h> |
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#include <linux/timex.h> |
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#include <linux/init.h> |
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#include <linux/slab.h> |
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#include <linux/delay.h> |
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#include <linux/irq.h> |
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#include <linux/seq_file.h> |
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#include <linux/cpumask.h> |
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#include <linux/profile.h> |
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#include <linux/bitops.h> |
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#include <linux/list.h> |
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#include <linux/radix-tree.h> |
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#include <linux/mutex.h> |
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#include <linux/pci.h> |
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#include <linux/debugfs.h> |
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#include <linux/of.h> |
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#include <linux/of_irq.h> |
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#include <linux/vmalloc.h> |
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#include <linux/pgtable.h> |
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#include <linux/static_call.h> |
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#include <linux/uaccess.h> |
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#include <asm/interrupt.h> |
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#include <asm/io.h> |
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#include <asm/irq.h> |
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#include <asm/cache.h> |
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#include <asm/ptrace.h> |
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#include <asm/machdep.h> |
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#include <asm/udbg.h> |
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#include <asm/smp.h> |
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#include <asm/hw_irq.h> |
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#include <asm/softirq_stack.h> |
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#include <asm/ppc_asm.h> |
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#include <asm/paca.h> |
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#include <asm/firmware.h> |
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#include <asm/lv1call.h> |
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#include <asm/dbell.h> |
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#include <asm/trace.h> |
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#include <asm/cpu_has_feature.h> |
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int distribute_irqs = 1; |
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void replay_soft_interrupts(void) |
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{ |
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struct pt_regs regs; |
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/* |
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* Be careful here, calling these interrupt handlers can cause |
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* softirqs to be raised, which they may run when calling irq_exit, |
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* which will cause local_irq_enable() to be run, which can then |
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* recurse into this function. Don't keep any state across |
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* interrupt handler calls which may change underneath us. |
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* |
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* We use local_paca rather than get_paca() to avoid all the |
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* debug_smp_processor_id() business in this low level function. |
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*/ |
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ppc_save_regs(®s); |
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regs.softe = IRQS_ENABLED; |
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regs.msr |= MSR_EE; |
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again: |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
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WARN_ON_ONCE(mfmsr() & MSR_EE); |
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/* |
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* Force the delivery of pending soft-disabled interrupts on PS3. |
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* Any HV call will have this side effect. |
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*/ |
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if (firmware_has_feature(FW_FEATURE_PS3_LV1)) { |
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u64 tmp, tmp2; |
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lv1_get_version_info(&tmp, &tmp2); |
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} |
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/* |
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* Check if an hypervisor Maintenance interrupt happened. |
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* This is a higher priority interrupt than the others, so |
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* replay it first. |
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*/ |
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if (IS_ENABLED(CONFIG_PPC_BOOK3S) && (local_paca->irq_happened & PACA_IRQ_HMI)) { |
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local_paca->irq_happened &= ~PACA_IRQ_HMI; |
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regs.trap = INTERRUPT_HMI; |
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handle_hmi_exception(®s); |
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if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) |
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hard_irq_disable(); |
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} |
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if (local_paca->irq_happened & PACA_IRQ_DEC) { |
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local_paca->irq_happened &= ~PACA_IRQ_DEC; |
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regs.trap = INTERRUPT_DECREMENTER; |
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timer_interrupt(®s); |
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if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) |
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hard_irq_disable(); |
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} |
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if (local_paca->irq_happened & PACA_IRQ_EE) { |
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local_paca->irq_happened &= ~PACA_IRQ_EE; |
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regs.trap = INTERRUPT_EXTERNAL; |
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do_IRQ(®s); |
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if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) |
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hard_irq_disable(); |
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} |
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if (IS_ENABLED(CONFIG_PPC_DOORBELL) && (local_paca->irq_happened & PACA_IRQ_DBELL)) { |
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local_paca->irq_happened &= ~PACA_IRQ_DBELL; |
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regs.trap = INTERRUPT_DOORBELL; |
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doorbell_exception(®s); |
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if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) |
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hard_irq_disable(); |
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} |
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/* Book3E does not support soft-masking PMI interrupts */ |
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if (IS_ENABLED(CONFIG_PPC_BOOK3S) && (local_paca->irq_happened & PACA_IRQ_PMI)) { |
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local_paca->irq_happened &= ~PACA_IRQ_PMI; |
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regs.trap = INTERRUPT_PERFMON; |
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performance_monitor_exception(®s); |
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if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) |
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hard_irq_disable(); |
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} |
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if (local_paca->irq_happened & ~PACA_IRQ_HARD_DIS) { |
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/* |
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* We are responding to the next interrupt, so interrupt-off |
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* latencies should be reset here. |
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*/ |
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trace_hardirqs_on(); |
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trace_hardirqs_off(); |
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goto again; |
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} |
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} |
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#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_PPC_KUAP) |
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static inline void replay_soft_interrupts_irqrestore(void) |
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{ |
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unsigned long kuap_state = get_kuap(); |
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/* |
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* Check if anything calls local_irq_enable/restore() when KUAP is |
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* disabled (user access enabled). We handle that case here by saving |
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* and re-locking AMR but we shouldn't get here in the first place, |
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* hence the warning. |
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*/ |
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kuap_assert_locked(); |
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if (kuap_state != AMR_KUAP_BLOCKED) |
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set_kuap(AMR_KUAP_BLOCKED); |
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replay_soft_interrupts(); |
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if (kuap_state != AMR_KUAP_BLOCKED) |
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set_kuap(kuap_state); |
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} |
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#else |
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#define replay_soft_interrupts_irqrestore() replay_soft_interrupts() |
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#endif |
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notrace void arch_local_irq_restore(unsigned long mask) |
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{ |
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unsigned char irq_happened; |
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/* Write the new soft-enabled value if it is a disable */ |
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if (mask) { |
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irq_soft_mask_set(mask); |
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return; |
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} |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
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WARN_ON_ONCE(in_nmi() || in_hardirq()); |
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/* |
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* After the stb, interrupts are unmasked and there are no interrupts |
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* pending replay. The restart sequence makes this atomic with |
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* respect to soft-masked interrupts. If this was just a simple code |
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* sequence, a soft-masked interrupt could become pending right after |
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* the comparison and before the stb. |
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* |
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* This allows interrupts to be unmasked without hard disabling, and |
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* also without new hard interrupts coming in ahead of pending ones. |
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*/ |
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asm_volatile_goto( |
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"1: \n" |
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" lbz 9,%0(13) \n" |
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" cmpwi 9,0 \n" |
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" bne %l[happened] \n" |
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" stb 9,%1(13) \n" |
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"2: \n" |
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RESTART_TABLE(1b, 2b, 1b) |
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: : "i" (offsetof(struct paca_struct, irq_happened)), |
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"i" (offsetof(struct paca_struct, irq_soft_mask)) |
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: "cr0", "r9" |
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: happened); |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
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WARN_ON_ONCE(!(mfmsr() & MSR_EE)); |
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return; |
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happened: |
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irq_happened = READ_ONCE(local_paca->irq_happened); |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
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WARN_ON_ONCE(!irq_happened); |
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if (irq_happened == PACA_IRQ_HARD_DIS) { |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) |
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WARN_ON_ONCE(mfmsr() & MSR_EE); |
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irq_soft_mask_set(IRQS_ENABLED); |
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local_paca->irq_happened = 0; |
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__hard_irq_enable(); |
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return; |
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} |
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/* Have interrupts to replay, need to hard disable first */ |
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if (!(irq_happened & PACA_IRQ_HARD_DIS)) { |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) { |
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if (!(mfmsr() & MSR_EE)) { |
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/* |
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* An interrupt could have come in and cleared |
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* MSR[EE] and set IRQ_HARD_DIS, so check |
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* IRQ_HARD_DIS again and warn if it is still |
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* clear. |
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*/ |
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irq_happened = READ_ONCE(local_paca->irq_happened); |
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WARN_ON_ONCE(!(irq_happened & PACA_IRQ_HARD_DIS)); |
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} |
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} |
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__hard_irq_disable(); |
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS; |
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} else { |
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if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG)) { |
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if (WARN_ON_ONCE(mfmsr() & MSR_EE)) |
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__hard_irq_disable(); |
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} |
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} |
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/* |
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* Disable preempt here, so that the below preempt_enable will |
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* perform resched if required (a replayed interrupt may set |
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* need_resched). |
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*/ |
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preempt_disable(); |
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irq_soft_mask_set(IRQS_ALL_DISABLED); |
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trace_hardirqs_off(); |
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replay_soft_interrupts_irqrestore(); |
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local_paca->irq_happened = 0; |
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trace_hardirqs_on(); |
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irq_soft_mask_set(IRQS_ENABLED); |
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__hard_irq_enable(); |
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preempt_enable(); |
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} |
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EXPORT_SYMBOL(arch_local_irq_restore); |
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/* |
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* This is a helper to use when about to go into idle low-power |
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* when the latter has the side effect of re-enabling interrupts |
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* (such as calling H_CEDE under pHyp). |
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* |
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* You call this function with interrupts soft-disabled (this is |
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* already the case when ppc_md.power_save is called). The function |
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* will return whether to enter power save or just return. |
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* |
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* In the former case, it will have notified lockdep of interrupts |
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* being re-enabled and generally sanitized the lazy irq state, |
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* and in the latter case it will leave with interrupts hard |
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* disabled and marked as such, so the local_irq_enable() call |
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* in arch_cpu_idle() will properly re-enable everything. |
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*/ |
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bool prep_irq_for_idle(void) |
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{ |
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/* |
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* First we need to hard disable to ensure no interrupt |
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* occurs before we effectively enter the low power state |
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*/ |
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__hard_irq_disable(); |
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS; |
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/* |
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* If anything happened while we were soft-disabled, |
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* we return now and do not enter the low power state. |
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*/ |
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if (lazy_irq_pending()) |
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return false; |
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/* Tell lockdep we are about to re-enable */ |
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trace_hardirqs_on(); |
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/* |
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* Mark interrupts as soft-enabled and clear the |
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* PACA_IRQ_HARD_DIS from the pending mask since we |
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* are about to hard enable as well as a side effect |
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* of entering the low power state. |
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*/ |
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local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS; |
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irq_soft_mask_set(IRQS_ENABLED); |
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/* Tell the caller to enter the low power state */ |
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return true; |
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} |
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#ifdef CONFIG_PPC_BOOK3S |
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/* |
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* This is for idle sequences that return with IRQs off, but the |
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* idle state itself wakes on interrupt. Tell the irq tracer that |
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* IRQs are enabled for the duration of idle so it does not get long |
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* off times. Must be paired with fini_irq_for_idle_irqsoff. |
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*/ |
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bool prep_irq_for_idle_irqsoff(void) |
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{ |
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WARN_ON(!irqs_disabled()); |
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/* |
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* First we need to hard disable to ensure no interrupt |
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* occurs before we effectively enter the low power state |
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*/ |
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__hard_irq_disable(); |
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS; |
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/* |
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* If anything happened while we were soft-disabled, |
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* we return now and do not enter the low power state. |
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*/ |
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if (lazy_irq_pending()) |
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return false; |
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/* Tell lockdep we are about to re-enable */ |
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trace_hardirqs_on(); |
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return true; |
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} |
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/* |
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* Take the SRR1 wakeup reason, index into this table to find the |
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* appropriate irq_happened bit. |
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* |
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* Sytem reset exceptions taken in idle state also come through here, |
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* but they are NMI interrupts so do not need to wait for IRQs to be |
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* restored, and should be taken as early as practical. These are marked |
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* with 0xff in the table. The Power ISA specifies 0100b as the system |
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* reset interrupt reason. |
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*/ |
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#define IRQ_SYSTEM_RESET 0xff |
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static const u8 srr1_to_lazyirq[0x10] = { |
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0, 0, 0, |
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PACA_IRQ_DBELL, |
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IRQ_SYSTEM_RESET, |
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PACA_IRQ_DBELL, |
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PACA_IRQ_DEC, |
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0, |
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PACA_IRQ_EE, |
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PACA_IRQ_EE, |
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PACA_IRQ_HMI, |
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0, 0, 0, 0, 0 }; |
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void replay_system_reset(void) |
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{ |
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struct pt_regs regs; |
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ppc_save_regs(®s); |
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regs.trap = 0x100; |
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get_paca()->in_nmi = 1; |
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system_reset_exception(®s); |
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get_paca()->in_nmi = 0; |
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} |
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EXPORT_SYMBOL_GPL(replay_system_reset); |
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void irq_set_pending_from_srr1(unsigned long srr1) |
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{ |
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unsigned int idx = (srr1 & SRR1_WAKEMASK_P8) >> 18; |
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u8 reason = srr1_to_lazyirq[idx]; |
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/* |
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* Take the system reset now, which is immediately after registers |
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* are restored from idle. It's an NMI, so interrupts need not be |
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* re-enabled before it is taken. |
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*/ |
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if (unlikely(reason == IRQ_SYSTEM_RESET)) { |
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replay_system_reset(); |
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return; |
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} |
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if (reason == PACA_IRQ_DBELL) { |
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/* |
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* When doorbell triggers a system reset wakeup, the message |
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* is not cleared, so if the doorbell interrupt is replayed |
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* and the IPI handled, the doorbell interrupt would still |
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* fire when EE is enabled. |
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* |
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* To avoid taking the superfluous doorbell interrupt, |
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* execute a msgclr here before the interrupt is replayed. |
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*/ |
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ppc_msgclr(PPC_DBELL_MSGTYPE); |
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} |
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/* |
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* The 0 index (SRR1[42:45]=b0000) must always evaluate to 0, |
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* so this can be called unconditionally with the SRR1 wake |
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* reason as returned by the idle code, which uses 0 to mean no |
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* interrupt. |
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* |
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* If a future CPU was to designate this as an interrupt reason, |
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* then a new index for no interrupt must be assigned. |
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*/ |
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local_paca->irq_happened |= reason; |
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} |
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#endif /* CONFIG_PPC_BOOK3S */ |
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/* |
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* Force a replay of the external interrupt handler on this CPU. |
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*/ |
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void force_external_irq_replay(void) |
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{ |
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/* |
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* This must only be called with interrupts soft-disabled, |
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* the replay will happen when re-enabling. |
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*/ |
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WARN_ON(!arch_irqs_disabled()); |
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/* |
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* Interrupts must always be hard disabled before irq_happened is |
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* modified (to prevent lost update in case of interrupt between |
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* load and store). |
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*/ |
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__hard_irq_disable(); |
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local_paca->irq_happened |= PACA_IRQ_HARD_DIS; |
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/* Indicate in the PACA that we have an interrupt to replay */ |
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local_paca->irq_happened |= PACA_IRQ_EE; |
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} |
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static int __init setup_noirqdistrib(char *str) |
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{ |
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distribute_irqs = 0; |
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return 1; |
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} |
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__setup("noirqdistrib", setup_noirqdistrib);
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