mirror of
https://github.com/Qortal/Brooklyn.git
synced 2025-02-14 19:25:53 +00:00
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
48 lines
1015 B
YAML
48 lines
1015 B
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#"
|
|
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
|
|
|
title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
|
|
|
|
maintainers:
|
|
- Conor Dooley <conor.dooley@microchip.com>
|
|
|
|
properties:
|
|
compatible:
|
|
const: microchip,mpfs-mailbox
|
|
|
|
reg:
|
|
items:
|
|
- description: mailbox data registers
|
|
- description: mailbox interrupt registers
|
|
|
|
interrupts:
|
|
maxItems: 1
|
|
|
|
"#mbox-cells":
|
|
const: 1
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- "#mbox-cells"
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
soc {
|
|
#address-cells = <2>;
|
|
#size-cells = <2>;
|
|
mbox: mailbox@37020000 {
|
|
compatible = "microchip,mpfs-mailbox";
|
|
reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;
|
|
interrupt-parent = <&L1>;
|
|
interrupts = <96>;
|
|
#mbox-cells = <1>;
|
|
};
|
|
};
|