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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
70 lines
1.3 KiB
YAML
70 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/gpio/toshiba,gpio-visconti.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Toshiba Visconti ARM SoCs GPIO controller
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maintainers:
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- Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
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properties:
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compatible:
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items:
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- const: toshiba,gpio-tmpv7708
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reg:
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maxItems: 1
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"#gpio-cells":
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const: 2
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gpio-ranges: true
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gpio-controller: true
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interrupt-controller: true
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"#interrupt-cells":
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const: 2
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interrupts:
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description:
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interrupt mapping one per GPIO.
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minItems: 16
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maxItems: 16
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required:
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- compatible
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- reg
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- "#gpio-cells"
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- gpio-ranges
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- gpio-controller
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- interrupt-controller
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- "#interrupt-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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gpio: gpio@28020000 {
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compatible = "toshiba,gpio-tmpv7708";
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reg = <0 0x28020000 0 0x1000>;
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#gpio-cells = <0x2>;
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gpio-ranges = <&pmux 0 0 32>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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interrupt-parent = <&gic>;
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};
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};
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...
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