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912 lines
23 KiB
912 lines
23 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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// |
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// Copyright (C) 2015-2017 Socionext Inc. |
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// Author: Masahiro Yamada <[email protected]> |
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#include <linux/list.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/of.h> |
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#include <linux/pinctrl/pinconf.h> |
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#include <linux/pinctrl/pinconf-generic.h> |
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#include <linux/pinctrl/pinctrl.h> |
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#include <linux/pinctrl/pinmux.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include "../core.h" |
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#include "../pinctrl-utils.h" |
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#include "pinctrl-uniphier.h" |
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#define UNIPHIER_PINCTRL_PINMUX_BASE 0x1000 |
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#define UNIPHIER_PINCTRL_LOAD_PINMUX 0x1700 |
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#define UNIPHIER_PINCTRL_DRVCTRL_BASE 0x1800 |
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#define UNIPHIER_PINCTRL_DRV2CTRL_BASE 0x1900 |
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#define UNIPHIER_PINCTRL_DRV3CTRL_BASE 0x1980 |
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#define UNIPHIER_PINCTRL_PUPDCTRL_BASE 0x1a00 |
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#define UNIPHIER_PINCTRL_IECTRL_BASE 0x1d00 |
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struct uniphier_pinctrl_reg_region { |
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struct list_head node; |
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unsigned int base; |
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unsigned int nregs; |
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u32 vals[]; |
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}; |
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struct uniphier_pinctrl_priv { |
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struct pinctrl_desc pctldesc; |
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struct pinctrl_dev *pctldev; |
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struct regmap *regmap; |
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const struct uniphier_pinctrl_socdata *socdata; |
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struct list_head reg_regions; |
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}; |
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static int uniphier_pctl_get_groups_count(struct pinctrl_dev *pctldev) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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return priv->socdata->groups_count; |
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} |
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static const char *uniphier_pctl_get_group_name(struct pinctrl_dev *pctldev, |
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unsigned selector) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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return priv->socdata->groups[selector].name; |
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} |
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static int uniphier_pctl_get_group_pins(struct pinctrl_dev *pctldev, |
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unsigned selector, |
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const unsigned **pins, |
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unsigned *num_pins) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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*pins = priv->socdata->groups[selector].pins; |
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*num_pins = priv->socdata->groups[selector].num_pins; |
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return 0; |
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} |
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#ifdef CONFIG_DEBUG_FS |
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static void uniphier_pctl_pin_dbg_show(struct pinctrl_dev *pctldev, |
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struct seq_file *s, unsigned offset) |
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{ |
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const struct pin_desc *desc = pin_desc_get(pctldev, offset); |
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const char *pull_dir, *drv_type; |
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switch (uniphier_pin_get_pull_dir(desc->drv_data)) { |
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case UNIPHIER_PIN_PULL_UP: |
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pull_dir = "UP"; |
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break; |
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case UNIPHIER_PIN_PULL_DOWN: |
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pull_dir = "DOWN"; |
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break; |
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case UNIPHIER_PIN_PULL_UP_FIXED: |
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pull_dir = "UP(FIXED)"; |
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break; |
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case UNIPHIER_PIN_PULL_DOWN_FIXED: |
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pull_dir = "DOWN(FIXED)"; |
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break; |
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case UNIPHIER_PIN_PULL_NONE: |
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pull_dir = "NONE"; |
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break; |
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default: |
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BUG(); |
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} |
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switch (uniphier_pin_get_drv_type(desc->drv_data)) { |
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case UNIPHIER_PIN_DRV_1BIT: |
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drv_type = "4/8(mA)"; |
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break; |
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case UNIPHIER_PIN_DRV_2BIT: |
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drv_type = "8/12/16/20(mA)"; |
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break; |
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case UNIPHIER_PIN_DRV_3BIT: |
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drv_type = "4/5/7/9/11/12/14/16(mA)"; |
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break; |
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case UNIPHIER_PIN_DRV_FIXED4: |
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drv_type = "4(mA)"; |
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break; |
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case UNIPHIER_PIN_DRV_FIXED5: |
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drv_type = "5(mA)"; |
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break; |
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case UNIPHIER_PIN_DRV_FIXED8: |
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drv_type = "8(mA)"; |
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break; |
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case UNIPHIER_PIN_DRV_NONE: |
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drv_type = "NONE"; |
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break; |
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default: |
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BUG(); |
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} |
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seq_printf(s, " PULL_DIR=%s DRV_TYPE=%s", pull_dir, drv_type); |
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} |
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#endif |
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static const struct pinctrl_ops uniphier_pctlops = { |
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.get_groups_count = uniphier_pctl_get_groups_count, |
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.get_group_name = uniphier_pctl_get_group_name, |
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.get_group_pins = uniphier_pctl_get_group_pins, |
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#ifdef CONFIG_DEBUG_FS |
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.pin_dbg_show = uniphier_pctl_pin_dbg_show, |
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#endif |
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.dt_node_to_map = pinconf_generic_dt_node_to_map_all, |
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.dt_free_map = pinctrl_utils_free_map, |
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}; |
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static const unsigned int uniphier_conf_drv_strengths_1bit[] = {4, 8}; |
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static const unsigned int uniphier_conf_drv_strengths_2bit[] = {8, 12, 16, 20}; |
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static const unsigned int uniphier_conf_drv_strengths_3bit[] = {4, 5, 7, 9, 11, |
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12, 14, 16}; |
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static const unsigned int uniphier_conf_drv_strengths_fixed4[] = {4}; |
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static const unsigned int uniphier_conf_drv_strengths_fixed5[] = {5}; |
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static const unsigned int uniphier_conf_drv_strengths_fixed8[] = {8}; |
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static int uniphier_conf_get_drvctrl_data(struct pinctrl_dev *pctldev, |
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unsigned int pin, unsigned int *reg, |
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unsigned int *shift, |
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unsigned int *mask, |
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const unsigned int **strengths) |
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{ |
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const struct pin_desc *desc = pin_desc_get(pctldev, pin); |
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enum uniphier_pin_drv_type type = |
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uniphier_pin_get_drv_type(desc->drv_data); |
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unsigned int base = 0; |
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unsigned int stride = 0; |
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unsigned int width = 0; |
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unsigned int drvctrl; |
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switch (type) { |
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case UNIPHIER_PIN_DRV_1BIT: |
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*strengths = uniphier_conf_drv_strengths_1bit; |
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base = UNIPHIER_PINCTRL_DRVCTRL_BASE; |
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stride = 1; |
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width = 1; |
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break; |
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case UNIPHIER_PIN_DRV_2BIT: |
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*strengths = uniphier_conf_drv_strengths_2bit; |
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base = UNIPHIER_PINCTRL_DRV2CTRL_BASE; |
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stride = 2; |
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width = 2; |
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break; |
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case UNIPHIER_PIN_DRV_3BIT: |
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*strengths = uniphier_conf_drv_strengths_3bit; |
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base = UNIPHIER_PINCTRL_DRV3CTRL_BASE; |
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stride = 4; |
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width = 3; |
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break; |
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case UNIPHIER_PIN_DRV_FIXED4: |
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*strengths = uniphier_conf_drv_strengths_fixed4; |
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break; |
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case UNIPHIER_PIN_DRV_FIXED5: |
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*strengths = uniphier_conf_drv_strengths_fixed5; |
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break; |
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case UNIPHIER_PIN_DRV_FIXED8: |
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*strengths = uniphier_conf_drv_strengths_fixed8; |
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break; |
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default: |
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/* drive strength control is not supported for this pin */ |
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return -EINVAL; |
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} |
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drvctrl = uniphier_pin_get_drvctrl(desc->drv_data); |
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drvctrl *= stride; |
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*reg = base + drvctrl / 32 * 4; |
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*shift = drvctrl % 32; |
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*mask = (1U << width) - 1; |
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return 0; |
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} |
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static int uniphier_conf_pin_bias_get(struct pinctrl_dev *pctldev, |
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unsigned int pin, |
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enum pin_config_param param) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const struct pin_desc *desc = pin_desc_get(pctldev, pin); |
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enum uniphier_pin_pull_dir pull_dir = |
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uniphier_pin_get_pull_dir(desc->drv_data); |
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unsigned int pupdctrl, reg, shift, val; |
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unsigned int expected = 1; |
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int ret; |
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switch (param) { |
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case PIN_CONFIG_BIAS_DISABLE: |
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if (pull_dir == UNIPHIER_PIN_PULL_NONE) |
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return 0; |
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if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED || |
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pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) |
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return -EINVAL; |
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expected = 0; |
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break; |
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case PIN_CONFIG_BIAS_PULL_UP: |
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if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED) |
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return 0; |
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if (pull_dir != UNIPHIER_PIN_PULL_UP) |
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return -EINVAL; |
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break; |
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case PIN_CONFIG_BIAS_PULL_DOWN: |
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if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) |
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return 0; |
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if (pull_dir != UNIPHIER_PIN_PULL_DOWN) |
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return -EINVAL; |
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break; |
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default: |
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BUG(); |
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} |
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pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data); |
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reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4; |
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shift = pupdctrl % 32; |
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ret = regmap_read(priv->regmap, reg, &val); |
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if (ret) |
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return ret; |
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val = (val >> shift) & 1; |
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return (val == expected) ? 0 : -EINVAL; |
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} |
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static int uniphier_conf_pin_drive_get(struct pinctrl_dev *pctldev, |
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unsigned int pin, u32 *strength) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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unsigned int reg, shift, mask, val; |
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const unsigned int *strengths; |
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int ret; |
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ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift, |
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&mask, &strengths); |
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if (ret) |
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return ret; |
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if (mask) { |
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ret = regmap_read(priv->regmap, reg, &val); |
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if (ret) |
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return ret; |
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} else { |
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val = 0; |
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} |
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*strength = strengths[(val >> shift) & mask]; |
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return 0; |
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} |
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static int uniphier_conf_pin_input_enable_get(struct pinctrl_dev *pctldev, |
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unsigned int pin) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const struct pin_desc *desc = pin_desc_get(pctldev, pin); |
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unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data); |
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unsigned int reg, mask, val; |
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int ret; |
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if (iectrl == UNIPHIER_PIN_IECTRL_NONE) |
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/* This pin is always input-enabled. */ |
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return 0; |
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if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) |
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iectrl = pin; |
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reg = UNIPHIER_PINCTRL_IECTRL_BASE + iectrl / 32 * 4; |
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mask = BIT(iectrl % 32); |
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ret = regmap_read(priv->regmap, reg, &val); |
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if (ret) |
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return ret; |
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return val & mask ? 0 : -EINVAL; |
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} |
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static int uniphier_conf_pin_config_get(struct pinctrl_dev *pctldev, |
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unsigned pin, |
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unsigned long *configs) |
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{ |
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enum pin_config_param param = pinconf_to_config_param(*configs); |
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bool has_arg = false; |
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u32 arg; |
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int ret; |
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switch (param) { |
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case PIN_CONFIG_BIAS_DISABLE: |
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case PIN_CONFIG_BIAS_PULL_UP: |
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case PIN_CONFIG_BIAS_PULL_DOWN: |
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ret = uniphier_conf_pin_bias_get(pctldev, pin, param); |
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break; |
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case PIN_CONFIG_DRIVE_STRENGTH: |
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ret = uniphier_conf_pin_drive_get(pctldev, pin, &arg); |
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has_arg = true; |
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break; |
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case PIN_CONFIG_INPUT_ENABLE: |
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ret = uniphier_conf_pin_input_enable_get(pctldev, pin); |
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break; |
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default: |
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/* unsupported parameter */ |
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ret = -EINVAL; |
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break; |
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} |
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if (ret == 0 && has_arg) |
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*configs = pinconf_to_config_packed(param, arg); |
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return ret; |
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} |
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static int uniphier_conf_pin_bias_set(struct pinctrl_dev *pctldev, |
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unsigned int pin, |
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enum pin_config_param param, u32 arg) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const struct pin_desc *desc = pin_desc_get(pctldev, pin); |
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enum uniphier_pin_pull_dir pull_dir = |
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uniphier_pin_get_pull_dir(desc->drv_data); |
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unsigned int pupdctrl, reg, shift; |
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unsigned int val = 1; |
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switch (param) { |
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case PIN_CONFIG_BIAS_DISABLE: |
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if (pull_dir == UNIPHIER_PIN_PULL_NONE) |
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return 0; |
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if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED || |
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pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED) { |
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dev_err(pctldev->dev, |
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"can not disable pull register for pin %s\n", |
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desc->name); |
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return -EINVAL; |
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} |
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val = 0; |
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break; |
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case PIN_CONFIG_BIAS_PULL_UP: |
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if (pull_dir == UNIPHIER_PIN_PULL_UP_FIXED && arg != 0) |
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return 0; |
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if (pull_dir != UNIPHIER_PIN_PULL_UP) { |
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dev_err(pctldev->dev, |
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"pull-up is unsupported for pin %s\n", |
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desc->name); |
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return -EINVAL; |
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} |
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if (arg == 0) { |
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dev_err(pctldev->dev, "pull-up can not be total\n"); |
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return -EINVAL; |
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} |
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break; |
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case PIN_CONFIG_BIAS_PULL_DOWN: |
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if (pull_dir == UNIPHIER_PIN_PULL_DOWN_FIXED && arg != 0) |
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return 0; |
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if (pull_dir != UNIPHIER_PIN_PULL_DOWN) { |
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dev_err(pctldev->dev, |
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"pull-down is unsupported for pin %s\n", |
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desc->name); |
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return -EINVAL; |
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} |
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if (arg == 0) { |
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dev_err(pctldev->dev, "pull-down can not be total\n"); |
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return -EINVAL; |
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} |
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break; |
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case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: |
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if (pull_dir == UNIPHIER_PIN_PULL_NONE) { |
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dev_err(pctldev->dev, |
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"pull-up/down is unsupported for pin %s\n", |
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desc->name); |
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return -EINVAL; |
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} |
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if (arg == 0) |
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return 0; /* configuration ingored */ |
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break; |
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default: |
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BUG(); |
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} |
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pupdctrl = uniphier_pin_get_pupdctrl(desc->drv_data); |
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reg = UNIPHIER_PINCTRL_PUPDCTRL_BASE + pupdctrl / 32 * 4; |
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shift = pupdctrl % 32; |
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return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift); |
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} |
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static int uniphier_conf_pin_drive_set(struct pinctrl_dev *pctldev, |
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unsigned int pin, u32 strength) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const struct pin_desc *desc = pin_desc_get(pctldev, pin); |
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unsigned int reg, shift, mask, val; |
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const unsigned int *strengths; |
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int ret; |
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ret = uniphier_conf_get_drvctrl_data(pctldev, pin, ®, &shift, |
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&mask, &strengths); |
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if (ret) { |
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dev_err(pctldev->dev, "cannot set drive strength for pin %s\n", |
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desc->name); |
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return ret; |
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} |
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for (val = 0; val <= mask; val++) { |
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if (strengths[val] > strength) |
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break; |
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} |
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if (val == 0) { |
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dev_err(pctldev->dev, |
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"unsupported drive strength %u mA for pin %s\n", |
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strength, desc->name); |
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return -EINVAL; |
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} |
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if (!mask) |
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return 0; |
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val--; |
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return regmap_update_bits(priv->regmap, reg, |
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mask << shift, val << shift); |
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} |
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static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev, |
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unsigned int pin, u32 enable) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const struct pin_desc *desc = pin_desc_get(pctldev, pin); |
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unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data); |
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unsigned int reg, mask; |
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|
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/* |
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* Multiple pins share one input enable, per-pin disabling is |
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* impossible. |
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*/ |
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if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) && |
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!enable) |
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return -EINVAL; |
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/* UNIPHIER_PIN_IECTRL_NONE means the pin is always input-enabled */ |
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if (iectrl == UNIPHIER_PIN_IECTRL_NONE) |
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return enable ? 0 : -EINVAL; |
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if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) |
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iectrl = pin; |
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reg = UNIPHIER_PINCTRL_IECTRL_BASE + iectrl / 32 * 4; |
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mask = BIT(iectrl % 32); |
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return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0); |
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} |
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static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev, |
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unsigned pin, |
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unsigned long *configs, |
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unsigned num_configs) |
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{ |
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int i, ret; |
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for (i = 0; i < num_configs; i++) { |
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enum pin_config_param param = |
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pinconf_to_config_param(configs[i]); |
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u32 arg = pinconf_to_config_argument(configs[i]); |
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switch (param) { |
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case PIN_CONFIG_BIAS_DISABLE: |
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case PIN_CONFIG_BIAS_PULL_UP: |
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case PIN_CONFIG_BIAS_PULL_DOWN: |
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case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: |
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ret = uniphier_conf_pin_bias_set(pctldev, pin, |
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param, arg); |
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break; |
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case PIN_CONFIG_DRIVE_STRENGTH: |
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ret = uniphier_conf_pin_drive_set(pctldev, pin, arg); |
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break; |
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case PIN_CONFIG_INPUT_ENABLE: |
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ret = uniphier_conf_pin_input_enable(pctldev, pin, arg); |
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break; |
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default: |
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dev_err(pctldev->dev, |
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"unsupported configuration parameter %u\n", |
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param); |
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return -EINVAL; |
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} |
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if (ret) |
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return ret; |
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} |
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return 0; |
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} |
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static int uniphier_conf_pin_config_group_set(struct pinctrl_dev *pctldev, |
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unsigned selector, |
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unsigned long *configs, |
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unsigned num_configs) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const unsigned *pins = priv->socdata->groups[selector].pins; |
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unsigned num_pins = priv->socdata->groups[selector].num_pins; |
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int i, ret; |
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for (i = 0; i < num_pins; i++) { |
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ret = uniphier_conf_pin_config_set(pctldev, pins[i], |
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configs, num_configs); |
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if (ret) |
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return ret; |
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} |
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|
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return 0; |
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} |
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|
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static const struct pinconf_ops uniphier_confops = { |
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.is_generic = true, |
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.pin_config_get = uniphier_conf_pin_config_get, |
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.pin_config_set = uniphier_conf_pin_config_set, |
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.pin_config_group_set = uniphier_conf_pin_config_group_set, |
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}; |
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|
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static int uniphier_pmx_get_functions_count(struct pinctrl_dev *pctldev) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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|
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return priv->socdata->functions_count; |
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} |
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|
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static const char *uniphier_pmx_get_function_name(struct pinctrl_dev *pctldev, |
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unsigned selector) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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|
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return priv->socdata->functions[selector].name; |
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} |
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|
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static int uniphier_pmx_get_function_groups(struct pinctrl_dev *pctldev, |
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unsigned selector, |
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const char * const **groups, |
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unsigned *num_groups) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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|
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*groups = priv->socdata->functions[selector].groups; |
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*num_groups = priv->socdata->functions[selector].num_groups; |
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|
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return 0; |
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} |
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|
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static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin, |
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int muxval) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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unsigned int mux_bits, reg_stride, reg, reg_end, shift, mask; |
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bool load_pinctrl; |
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int ret; |
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|
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/* some pins need input-enabling */ |
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ret = uniphier_conf_pin_input_enable(pctldev, pin, 1); |
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if (ret) |
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return ret; |
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|
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if (muxval < 0) |
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return 0; /* dedicated pin; nothing to do for pin-mux */ |
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|
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if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { |
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/* |
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* Mode reg_offset bit_position |
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* Normal 4 * n shift+3:shift |
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* Debug 4 * n shift+7:shift+4 |
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*/ |
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mux_bits = 4; |
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reg_stride = 8; |
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load_pinctrl = true; |
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} else { |
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/* |
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* Mode reg_offset bit_position |
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* Normal 8 * n shift+3:shift |
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* Debug 8 * n + 4 shift+3:shift |
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*/ |
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mux_bits = 8; |
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reg_stride = 4; |
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load_pinctrl = false; |
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} |
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|
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reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride; |
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reg_end = reg + reg_stride; |
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shift = pin * mux_bits % 32; |
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mask = (1U << mux_bits) - 1; |
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|
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/* |
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* If reg_stride is greater than 4, the MSB of each pinsel shall be |
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* stored in the offset+4. |
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*/ |
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for (; reg < reg_end; reg += 4) { |
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ret = regmap_update_bits(priv->regmap, reg, |
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mask << shift, muxval << shift); |
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if (ret) |
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return ret; |
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muxval >>= mux_bits; |
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} |
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|
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if (load_pinctrl) { |
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ret = regmap_write(priv->regmap, |
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UNIPHIER_PINCTRL_LOAD_PINMUX, 1); |
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if (ret) |
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return ret; |
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} |
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|
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return 0; |
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} |
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|
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static int uniphier_pmx_set_mux(struct pinctrl_dev *pctldev, |
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unsigned func_selector, |
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unsigned group_selector) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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const struct uniphier_pinctrl_group *grp = |
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&priv->socdata->groups[group_selector]; |
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int i; |
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int ret; |
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|
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for (i = 0; i < grp->num_pins; i++) { |
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ret = uniphier_pmx_set_one_mux(pctldev, grp->pins[i], |
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grp->muxvals[i]); |
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if (ret) |
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return ret; |
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} |
|
|
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return 0; |
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} |
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|
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static int uniphier_pmx_gpio_request_enable(struct pinctrl_dev *pctldev, |
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struct pinctrl_gpio_range *range, |
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unsigned offset) |
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{ |
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struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev); |
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unsigned int gpio_offset; |
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int muxval, i; |
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|
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if (range->pins) { |
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for (i = 0; i < range->npins; i++) |
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if (range->pins[i] == offset) |
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break; |
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|
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if (WARN_ON(i == range->npins)) |
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return -EINVAL; |
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|
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gpio_offset = i; |
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} else { |
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gpio_offset = offset - range->pin_base; |
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} |
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|
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gpio_offset += range->id; |
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|
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muxval = priv->socdata->get_gpio_muxval(offset, gpio_offset); |
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|
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return uniphier_pmx_set_one_mux(pctldev, offset, muxval); |
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} |
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|
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static const struct pinmux_ops uniphier_pmxops = { |
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.get_functions_count = uniphier_pmx_get_functions_count, |
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.get_function_name = uniphier_pmx_get_function_name, |
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.get_function_groups = uniphier_pmx_get_function_groups, |
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.set_mux = uniphier_pmx_set_mux, |
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.gpio_request_enable = uniphier_pmx_gpio_request_enable, |
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.strict = true, |
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}; |
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|
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#ifdef CONFIG_PM_SLEEP |
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static int uniphier_pinctrl_suspend(struct device *dev) |
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{ |
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struct uniphier_pinctrl_priv *priv = dev_get_drvdata(dev); |
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struct uniphier_pinctrl_reg_region *r; |
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int ret; |
|
|
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list_for_each_entry(r, &priv->reg_regions, node) { |
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ret = regmap_bulk_read(priv->regmap, r->base, r->vals, |
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r->nregs); |
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if (ret) |
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return ret; |
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} |
|
|
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return 0; |
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} |
|
|
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static int uniphier_pinctrl_resume(struct device *dev) |
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{ |
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struct uniphier_pinctrl_priv *priv = dev_get_drvdata(dev); |
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struct uniphier_pinctrl_reg_region *r; |
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int ret; |
|
|
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list_for_each_entry(r, &priv->reg_regions, node) { |
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ret = regmap_bulk_write(priv->regmap, r->base, r->vals, |
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r->nregs); |
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if (ret) |
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return ret; |
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} |
|
|
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if (priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE) { |
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ret = regmap_write(priv->regmap, |
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UNIPHIER_PINCTRL_LOAD_PINMUX, 1); |
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if (ret) |
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return ret; |
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} |
|
|
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return 0; |
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} |
|
|
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static int uniphier_pinctrl_add_reg_region(struct device *dev, |
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struct uniphier_pinctrl_priv *priv, |
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unsigned int base, |
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unsigned int count, |
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unsigned int width) |
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{ |
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struct uniphier_pinctrl_reg_region *region; |
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unsigned int nregs; |
|
|
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if (!count) |
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return 0; |
|
|
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nregs = DIV_ROUND_UP(count * width, 32); |
|
|
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region = devm_kzalloc(dev, struct_size(region, vals, nregs), |
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GFP_KERNEL); |
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if (!region) |
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return -ENOMEM; |
|
|
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region->base = base; |
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region->nregs = nregs; |
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|
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list_add_tail(®ion->node, &priv->reg_regions); |
|
|
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return 0; |
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} |
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#endif |
|
|
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static int uniphier_pinctrl_pm_init(struct device *dev, |
|
struct uniphier_pinctrl_priv *priv) |
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{ |
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#ifdef CONFIG_PM_SLEEP |
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const struct uniphier_pinctrl_socdata *socdata = priv->socdata; |
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unsigned int num_drvctrl = 0; |
|
unsigned int num_drv2ctrl = 0; |
|
unsigned int num_drv3ctrl = 0; |
|
unsigned int num_pupdctrl = 0; |
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unsigned int num_iectrl = 0; |
|
unsigned int iectrl, drvctrl, pupdctrl; |
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enum uniphier_pin_drv_type drv_type; |
|
enum uniphier_pin_pull_dir pull_dir; |
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int i, ret; |
|
|
|
for (i = 0; i < socdata->npins; i++) { |
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void *drv_data = socdata->pins[i].drv_data; |
|
|
|
drvctrl = uniphier_pin_get_drvctrl(drv_data); |
|
drv_type = uniphier_pin_get_drv_type(drv_data); |
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pupdctrl = uniphier_pin_get_pupdctrl(drv_data); |
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pull_dir = uniphier_pin_get_pull_dir(drv_data); |
|
iectrl = uniphier_pin_get_iectrl(drv_data); |
|
|
|
switch (drv_type) { |
|
case UNIPHIER_PIN_DRV_1BIT: |
|
num_drvctrl = max(num_drvctrl, drvctrl + 1); |
|
break; |
|
case UNIPHIER_PIN_DRV_2BIT: |
|
num_drv2ctrl = max(num_drv2ctrl, drvctrl + 1); |
|
break; |
|
case UNIPHIER_PIN_DRV_3BIT: |
|
num_drv3ctrl = max(num_drv3ctrl, drvctrl + 1); |
|
break; |
|
default: |
|
break; |
|
} |
|
|
|
if (pull_dir == UNIPHIER_PIN_PULL_UP || |
|
pull_dir == UNIPHIER_PIN_PULL_DOWN) |
|
num_pupdctrl = max(num_pupdctrl, pupdctrl + 1); |
|
|
|
if (iectrl != UNIPHIER_PIN_IECTRL_NONE) { |
|
if (socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) |
|
iectrl = i; |
|
num_iectrl = max(num_iectrl, iectrl + 1); |
|
} |
|
} |
|
|
|
INIT_LIST_HEAD(&priv->reg_regions); |
|
|
|
ret = uniphier_pinctrl_add_reg_region(dev, priv, |
|
UNIPHIER_PINCTRL_PINMUX_BASE, |
|
socdata->npins, 8); |
|
if (ret) |
|
return ret; |
|
|
|
ret = uniphier_pinctrl_add_reg_region(dev, priv, |
|
UNIPHIER_PINCTRL_DRVCTRL_BASE, |
|
num_drvctrl, 1); |
|
if (ret) |
|
return ret; |
|
|
|
ret = uniphier_pinctrl_add_reg_region(dev, priv, |
|
UNIPHIER_PINCTRL_DRV2CTRL_BASE, |
|
num_drv2ctrl, 2); |
|
if (ret) |
|
return ret; |
|
|
|
ret = uniphier_pinctrl_add_reg_region(dev, priv, |
|
UNIPHIER_PINCTRL_DRV3CTRL_BASE, |
|
num_drv3ctrl, 3); |
|
if (ret) |
|
return ret; |
|
|
|
ret = uniphier_pinctrl_add_reg_region(dev, priv, |
|
UNIPHIER_PINCTRL_PUPDCTRL_BASE, |
|
num_pupdctrl, 1); |
|
if (ret) |
|
return ret; |
|
|
|
ret = uniphier_pinctrl_add_reg_region(dev, priv, |
|
UNIPHIER_PINCTRL_IECTRL_BASE, |
|
num_iectrl, 1); |
|
if (ret) |
|
return ret; |
|
#endif |
|
return 0; |
|
} |
|
|
|
const struct dev_pm_ops uniphier_pinctrl_pm_ops = { |
|
SET_LATE_SYSTEM_SLEEP_PM_OPS(uniphier_pinctrl_suspend, |
|
uniphier_pinctrl_resume) |
|
}; |
|
|
|
int uniphier_pinctrl_probe(struct platform_device *pdev, |
|
const struct uniphier_pinctrl_socdata *socdata) |
|
{ |
|
struct device *dev = &pdev->dev; |
|
struct uniphier_pinctrl_priv *priv; |
|
struct device_node *parent; |
|
int ret; |
|
|
|
if (!socdata || |
|
!socdata->pins || !socdata->npins || |
|
!socdata->groups || !socdata->groups_count || |
|
!socdata->functions || !socdata->functions_count) { |
|
dev_err(dev, "pinctrl socdata lacks necessary members\n"); |
|
return -EINVAL; |
|
} |
|
|
|
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
|
if (!priv) |
|
return -ENOMEM; |
|
|
|
parent = of_get_parent(dev->of_node); |
|
priv->regmap = syscon_node_to_regmap(parent); |
|
of_node_put(parent); |
|
|
|
if (IS_ERR(priv->regmap)) { |
|
dev_err(dev, "failed to get regmap\n"); |
|
return PTR_ERR(priv->regmap); |
|
} |
|
|
|
priv->socdata = socdata; |
|
priv->pctldesc.name = dev->driver->name; |
|
priv->pctldesc.pins = socdata->pins; |
|
priv->pctldesc.npins = socdata->npins; |
|
priv->pctldesc.pctlops = &uniphier_pctlops; |
|
priv->pctldesc.pmxops = &uniphier_pmxops; |
|
priv->pctldesc.confops = &uniphier_confops; |
|
priv->pctldesc.owner = dev->driver->owner; |
|
|
|
ret = uniphier_pinctrl_pm_init(dev, priv); |
|
if (ret) |
|
return ret; |
|
|
|
priv->pctldev = devm_pinctrl_register(dev, &priv->pctldesc, priv); |
|
if (IS_ERR(priv->pctldev)) { |
|
dev_err(dev, "failed to register UniPhier pinctrl driver\n"); |
|
return PTR_ERR(priv->pctldev); |
|
} |
|
|
|
platform_set_drvdata(pdev, priv); |
|
|
|
return 0; |
|
}
|
|
|