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1048 lines
26 KiB
1048 lines
26 KiB
// SPDX-License-Identifier: GPL-2.0 |
|
/* |
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* MediaTek Pinctrl Paris Driver, which implement the vendor per-pin |
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* bindings for MediaTek SoC. |
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* |
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* Copyright (C) 2018 MediaTek Inc. |
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* Author: Sean Wang <[email protected]> |
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* Zhiyong Tao <[email protected]> |
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* Hongzhou.Yang <[email protected]> |
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*/ |
|
|
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#include <linux/gpio/driver.h> |
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#include <linux/module.h> |
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#include <dt-bindings/pinctrl/mt65xx.h> |
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#include "pinctrl-paris.h" |
|
|
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#define PINCTRL_PINCTRL_DEV KBUILD_MODNAME |
|
|
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/* Custom pinconf parameters */ |
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#define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1) |
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#define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2) |
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#define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3) |
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#define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4) |
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#define MTK_PIN_CONFIG_DRV_ADV (PIN_CONFIG_END + 5) |
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|
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static const struct pinconf_generic_params mtk_custom_bindings[] = { |
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{"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0}, |
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{"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0}, |
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{"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1}, |
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{"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1}, |
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{"mediatek,drive-strength-adv", MTK_PIN_CONFIG_DRV_ADV, 2}, |
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}; |
|
|
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#ifdef CONFIG_DEBUG_FS |
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static const struct pin_config_item mtk_conf_items[] = { |
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PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true), |
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PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true), |
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PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true), |
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PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true), |
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PCONFDUMP(MTK_PIN_CONFIG_DRV_ADV, "drive-strength-adv", NULL, true), |
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}; |
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#endif |
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|
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static const char * const mtk_gpio_functions[] = { |
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"func0", "func1", "func2", "func3", |
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"func4", "func5", "func6", "func7", |
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"func8", "func9", "func10", "func11", |
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"func12", "func13", "func14", "func15", |
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}; |
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|
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static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev, |
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struct pinctrl_gpio_range *range, |
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unsigned int pin) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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const struct mtk_pin_desc *desc; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
|
|
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return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, |
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hw->soc->gpio_m); |
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} |
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|
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static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, |
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struct pinctrl_gpio_range *range, |
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unsigned int pin, bool input) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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const struct mtk_pin_desc *desc; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
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|
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/* hardware would take 0 as input direction */ |
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return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input); |
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} |
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|
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static int mtk_pinconf_get(struct pinctrl_dev *pctldev, |
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unsigned int pin, unsigned long *config) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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u32 param = pinconf_to_config_param(*config); |
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int pullup, err, reg, ret = 1; |
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const struct mtk_pin_desc *desc; |
|
|
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if (pin >= hw->soc->npins) { |
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err = -EINVAL; |
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goto out; |
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} |
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
|
|
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switch (param) { |
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case PIN_CONFIG_BIAS_DISABLE: |
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case PIN_CONFIG_BIAS_PULL_UP: |
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case PIN_CONFIG_BIAS_PULL_DOWN: |
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if (hw->soc->bias_get_combo) { |
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err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret); |
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if (err) |
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goto out; |
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if (param == PIN_CONFIG_BIAS_DISABLE) { |
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if (ret == MTK_PUPD_SET_R1R0_00) |
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ret = MTK_DISABLE; |
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} else if (param == PIN_CONFIG_BIAS_PULL_UP) { |
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/* When desire to get pull-up value, return |
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* error if current setting is pull-down |
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*/ |
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if (!pullup) |
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err = -EINVAL; |
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} else if (param == PIN_CONFIG_BIAS_PULL_DOWN) { |
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/* When desire to get pull-down value, return |
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* error if current setting is pull-up |
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*/ |
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if (pullup) |
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err = -EINVAL; |
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} |
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} else { |
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err = -ENOTSUPP; |
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} |
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break; |
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case PIN_CONFIG_SLEW_RATE: |
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &ret); |
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break; |
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case PIN_CONFIG_INPUT_ENABLE: |
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case PIN_CONFIG_OUTPUT_ENABLE: |
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); |
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if (err) |
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goto out; |
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/* CONFIG Current direction return value |
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* ------------- ----------------- ---------------------- |
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* OUTPUT_ENABLE output 1 (= HW value) |
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* input 0 (= HW value) |
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* INPUT_ENABLE output 0 (= reverse HW value) |
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* input 1 (= reverse HW value) |
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*/ |
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if (param == PIN_CONFIG_INPUT_ENABLE) |
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ret = !ret; |
|
|
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break; |
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &ret); |
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if (err) |
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goto out; |
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/* return error when in output mode |
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* because schmitt trigger only work in input mode |
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*/ |
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if (ret) { |
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err = -EINVAL; |
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goto out; |
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} |
|
|
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &ret); |
|
|
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break; |
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case PIN_CONFIG_DRIVE_STRENGTH: |
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if (hw->soc->drive_get) |
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err = hw->soc->drive_get(hw, desc, &ret); |
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else |
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err = -ENOTSUPP; |
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break; |
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case MTK_PIN_CONFIG_TDSEL: |
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case MTK_PIN_CONFIG_RDSEL: |
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reg = (param == MTK_PIN_CONFIG_TDSEL) ? |
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PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; |
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err = mtk_hw_get_value(hw, desc, reg, &ret); |
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break; |
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case MTK_PIN_CONFIG_PU_ADV: |
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case MTK_PIN_CONFIG_PD_ADV: |
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if (hw->soc->adv_pull_get) { |
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pullup = param == MTK_PIN_CONFIG_PU_ADV; |
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err = hw->soc->adv_pull_get(hw, desc, pullup, &ret); |
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} else |
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err = -ENOTSUPP; |
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break; |
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case MTK_PIN_CONFIG_DRV_ADV: |
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if (hw->soc->adv_drive_get) |
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err = hw->soc->adv_drive_get(hw, desc, &ret); |
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else |
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err = -ENOTSUPP; |
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break; |
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default: |
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err = -ENOTSUPP; |
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} |
|
|
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out: |
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if (!err) |
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*config = pinconf_to_config_packed(param, ret); |
|
|
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return err; |
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} |
|
|
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static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, |
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enum pin_config_param param, |
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enum pin_config_param arg) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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const struct mtk_pin_desc *desc; |
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int err = 0; |
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u32 reg; |
|
|
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if (pin >= hw->soc->npins) { |
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err = -EINVAL; |
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goto err; |
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} |
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin]; |
|
|
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switch ((u32)param) { |
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case PIN_CONFIG_BIAS_DISABLE: |
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if (hw->soc->bias_set_combo) |
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err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE); |
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else |
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err = -ENOTSUPP; |
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break; |
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case PIN_CONFIG_BIAS_PULL_UP: |
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if (hw->soc->bias_set_combo) |
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err = hw->soc->bias_set_combo(hw, desc, 1, arg); |
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else |
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err = -ENOTSUPP; |
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break; |
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case PIN_CONFIG_BIAS_PULL_DOWN: |
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if (hw->soc->bias_set_combo) |
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err = hw->soc->bias_set_combo(hw, desc, 0, arg); |
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else |
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err = -ENOTSUPP; |
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break; |
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case PIN_CONFIG_OUTPUT_ENABLE: |
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, |
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MTK_DISABLE); |
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/* Keep set direction to consider the case that a GPIO pin |
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* does not have SMT control |
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*/ |
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if (err != -ENOTSUPP) |
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goto err; |
|
|
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, |
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MTK_OUTPUT); |
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break; |
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case PIN_CONFIG_INPUT_ENABLE: |
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/* regard all non-zero value as enable */ |
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES, !!arg); |
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if (err) |
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goto err; |
|
|
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, |
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MTK_INPUT); |
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break; |
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case PIN_CONFIG_SLEW_RATE: |
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/* regard all non-zero value as enable */ |
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR, !!arg); |
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break; |
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case PIN_CONFIG_OUTPUT: |
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, |
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arg); |
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if (err) |
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goto err; |
|
|
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, |
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MTK_OUTPUT); |
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break; |
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case PIN_CONFIG_INPUT_SCHMITT: |
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case PIN_CONFIG_INPUT_SCHMITT_ENABLE: |
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/* arg = 1: Input mode & SMT enable ; |
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* arg = 0: Output mode & SMT disable |
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*/ |
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !arg); |
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if (err) |
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goto err; |
|
|
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err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT, !!arg); |
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break; |
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case PIN_CONFIG_DRIVE_STRENGTH: |
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if (hw->soc->drive_set) |
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err = hw->soc->drive_set(hw, desc, arg); |
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else |
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err = -ENOTSUPP; |
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break; |
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case MTK_PIN_CONFIG_TDSEL: |
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case MTK_PIN_CONFIG_RDSEL: |
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reg = (param == MTK_PIN_CONFIG_TDSEL) ? |
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PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL; |
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err = mtk_hw_set_value(hw, desc, reg, arg); |
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break; |
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case MTK_PIN_CONFIG_PU_ADV: |
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case MTK_PIN_CONFIG_PD_ADV: |
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if (hw->soc->adv_pull_set) { |
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bool pullup; |
|
|
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pullup = param == MTK_PIN_CONFIG_PU_ADV; |
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err = hw->soc->adv_pull_set(hw, desc, pullup, |
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arg); |
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} else |
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err = -ENOTSUPP; |
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break; |
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case MTK_PIN_CONFIG_DRV_ADV: |
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if (hw->soc->adv_drive_set) |
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err = hw->soc->adv_drive_set(hw, desc, arg); |
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else |
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err = -ENOTSUPP; |
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break; |
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default: |
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err = -ENOTSUPP; |
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} |
|
|
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err: |
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return err; |
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} |
|
|
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static struct mtk_pinctrl_group * |
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mtk_pctrl_find_group_by_pin(struct mtk_pinctrl *hw, u32 pin) |
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{ |
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int i; |
|
|
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for (i = 0; i < hw->soc->ngrps; i++) { |
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struct mtk_pinctrl_group *grp = hw->groups + i; |
|
|
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if (grp->pin == pin) |
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return grp; |
|
} |
|
|
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return NULL; |
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} |
|
|
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static const struct mtk_func_desc * |
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mtk_pctrl_find_function_by_pin(struct mtk_pinctrl *hw, u32 pin_num, u32 fnum) |
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{ |
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const struct mtk_pin_desc *pin = hw->soc->pins + pin_num; |
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const struct mtk_func_desc *func = pin->funcs; |
|
|
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while (func && func->name) { |
|
if (func->muxval == fnum) |
|
return func; |
|
func++; |
|
} |
|
|
|
return NULL; |
|
} |
|
|
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static bool mtk_pctrl_is_function_valid(struct mtk_pinctrl *hw, u32 pin_num, |
|
u32 fnum) |
|
{ |
|
int i; |
|
|
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for (i = 0; i < hw->soc->npins; i++) { |
|
const struct mtk_pin_desc *pin = hw->soc->pins + i; |
|
|
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if (pin->number == pin_num) { |
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const struct mtk_func_desc *func = pin->funcs; |
|
|
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while (func && func->name) { |
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if (func->muxval == fnum) |
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return true; |
|
func++; |
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} |
|
|
|
break; |
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} |
|
} |
|
|
|
return false; |
|
} |
|
|
|
static int mtk_pctrl_dt_node_to_map_func(struct mtk_pinctrl *pctl, |
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u32 pin, u32 fnum, |
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struct mtk_pinctrl_group *grp, |
|
struct pinctrl_map **map, |
|
unsigned *reserved_maps, |
|
unsigned *num_maps) |
|
{ |
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bool ret; |
|
|
|
if (*num_maps == *reserved_maps) |
|
return -ENOSPC; |
|
|
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(*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP; |
|
(*map)[*num_maps].data.mux.group = grp->name; |
|
|
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ret = mtk_pctrl_is_function_valid(pctl, pin, fnum); |
|
if (!ret) { |
|
dev_err(pctl->dev, "invalid function %d on pin %d .\n", |
|
fnum, pin); |
|
return -EINVAL; |
|
} |
|
|
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(*map)[*num_maps].data.mux.function = mtk_gpio_functions[fnum]; |
|
(*num_maps)++; |
|
|
|
return 0; |
|
} |
|
|
|
static int mtk_pctrl_dt_subnode_to_map(struct pinctrl_dev *pctldev, |
|
struct device_node *node, |
|
struct pinctrl_map **map, |
|
unsigned *reserved_maps, |
|
unsigned *num_maps) |
|
{ |
|
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
|
int num_pins, num_funcs, maps_per_pin, i, err; |
|
struct mtk_pinctrl_group *grp; |
|
unsigned int num_configs; |
|
bool has_config = false; |
|
unsigned long *configs; |
|
u32 pinfunc, pin, func; |
|
struct property *pins; |
|
unsigned reserve = 0; |
|
|
|
pins = of_find_property(node, "pinmux", NULL); |
|
if (!pins) { |
|
dev_err(hw->dev, "missing pins property in node %pOFn .\n", |
|
node); |
|
return -EINVAL; |
|
} |
|
|
|
err = pinconf_generic_parse_dt_config(node, pctldev, &configs, |
|
&num_configs); |
|
if (err) |
|
return err; |
|
|
|
if (num_configs) |
|
has_config = true; |
|
|
|
num_pins = pins->length / sizeof(u32); |
|
num_funcs = num_pins; |
|
maps_per_pin = 0; |
|
if (num_funcs) |
|
maps_per_pin++; |
|
if (has_config && num_pins >= 1) |
|
maps_per_pin++; |
|
|
|
if (!num_pins || !maps_per_pin) { |
|
err = -EINVAL; |
|
goto exit; |
|
} |
|
|
|
reserve = num_pins * maps_per_pin; |
|
|
|
err = pinctrl_utils_reserve_map(pctldev, map, reserved_maps, num_maps, |
|
reserve); |
|
if (err < 0) |
|
goto exit; |
|
|
|
for (i = 0; i < num_pins; i++) { |
|
err = of_property_read_u32_index(node, "pinmux", i, &pinfunc); |
|
if (err) |
|
goto exit; |
|
|
|
pin = MTK_GET_PIN_NO(pinfunc); |
|
func = MTK_GET_PIN_FUNC(pinfunc); |
|
|
|
if (pin >= hw->soc->npins || |
|
func >= ARRAY_SIZE(mtk_gpio_functions)) { |
|
dev_err(hw->dev, "invalid pins value.\n"); |
|
err = -EINVAL; |
|
goto exit; |
|
} |
|
|
|
grp = mtk_pctrl_find_group_by_pin(hw, pin); |
|
if (!grp) { |
|
dev_err(hw->dev, "unable to match pin %d to group\n", |
|
pin); |
|
err = -EINVAL; |
|
goto exit; |
|
} |
|
|
|
err = mtk_pctrl_dt_node_to_map_func(hw, pin, func, grp, map, |
|
reserved_maps, num_maps); |
|
if (err < 0) |
|
goto exit; |
|
|
|
if (has_config) { |
|
err = pinctrl_utils_add_map_configs(pctldev, map, |
|
reserved_maps, |
|
num_maps, |
|
grp->name, |
|
configs, |
|
num_configs, |
|
PIN_MAP_TYPE_CONFIGS_GROUP); |
|
if (err < 0) |
|
goto exit; |
|
} |
|
} |
|
|
|
err = 0; |
|
|
|
exit: |
|
kfree(configs); |
|
return err; |
|
} |
|
|
|
static int mtk_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev, |
|
struct device_node *np_config, |
|
struct pinctrl_map **map, |
|
unsigned *num_maps) |
|
{ |
|
struct device_node *np; |
|
unsigned reserved_maps; |
|
int ret; |
|
|
|
*map = NULL; |
|
*num_maps = 0; |
|
reserved_maps = 0; |
|
|
|
for_each_child_of_node(np_config, np) { |
|
ret = mtk_pctrl_dt_subnode_to_map(pctldev, np, map, |
|
&reserved_maps, |
|
num_maps); |
|
if (ret < 0) { |
|
pinctrl_utils_free_map(pctldev, *map, *num_maps); |
|
of_node_put(np); |
|
return ret; |
|
} |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int mtk_pctrl_get_groups_count(struct pinctrl_dev *pctldev) |
|
{ |
|
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
|
|
|
return hw->soc->ngrps; |
|
} |
|
|
|
static const char *mtk_pctrl_get_group_name(struct pinctrl_dev *pctldev, |
|
unsigned group) |
|
{ |
|
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
|
|
|
return hw->groups[group].name; |
|
} |
|
|
|
static int mtk_pctrl_get_group_pins(struct pinctrl_dev *pctldev, |
|
unsigned group, const unsigned **pins, |
|
unsigned *num_pins) |
|
{ |
|
struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
|
|
|
*pins = (unsigned *)&hw->groups[group].pin; |
|
*num_pins = 1; |
|
|
|
return 0; |
|
} |
|
|
|
static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int field) |
|
{ |
|
const struct mtk_pin_desc *desc; |
|
int value, err; |
|
|
|
if (gpio >= hw->soc->npins) |
|
return -EINVAL; |
|
|
|
desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; |
|
|
|
err = mtk_hw_get_value(hw, desc, field, &value); |
|
if (err) |
|
return err; |
|
|
|
return value; |
|
} |
|
|
|
#define mtk_pctrl_get_pinmux(hw, gpio) \ |
|
mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_MODE) |
|
|
|
#define mtk_pctrl_get_direction(hw, gpio) \ |
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mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DIR) |
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|
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#define mtk_pctrl_get_out(hw, gpio) \ |
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mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DO) |
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|
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#define mtk_pctrl_get_in(hw, gpio) \ |
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mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DI) |
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|
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#define mtk_pctrl_get_smt(hw, gpio) \ |
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mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_SMT) |
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|
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#define mtk_pctrl_get_ies(hw, gpio) \ |
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mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_IES) |
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|
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#define mtk_pctrl_get_driving(hw, gpio) \ |
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mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV) |
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|
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ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw, |
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unsigned int gpio, char *buf, unsigned int bufLen) |
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{ |
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int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1; |
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const struct mtk_pin_desc *desc; |
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|
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if (gpio >= hw->soc->npins) |
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return -EINVAL; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; |
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pinmux = mtk_pctrl_get_pinmux(hw, gpio); |
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if (pinmux >= hw->soc->nfuncs) |
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pinmux -= hw->soc->nfuncs; |
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|
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mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen); |
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if (pullen == MTK_PUPD_SET_R1R0_00) { |
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pullen = 0; |
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r1 = 0; |
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r0 = 0; |
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} else if (pullen == MTK_PUPD_SET_R1R0_01) { |
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pullen = 1; |
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r1 = 0; |
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r0 = 1; |
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} else if (pullen == MTK_PUPD_SET_R1R0_10) { |
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pullen = 1; |
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r1 = 1; |
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r0 = 0; |
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} else if (pullen == MTK_PUPD_SET_R1R0_11) { |
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pullen = 1; |
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r1 = 1; |
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r0 = 1; |
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} else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) { |
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pullen = 0; |
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} |
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len += scnprintf(buf + len, bufLen - len, |
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"%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d", |
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gpio, |
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pinmux, |
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mtk_pctrl_get_direction(hw, gpio), |
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mtk_pctrl_get_out(hw, gpio), |
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mtk_pctrl_get_in(hw, gpio), |
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mtk_pctrl_get_driving(hw, gpio), |
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mtk_pctrl_get_smt(hw, gpio), |
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mtk_pctrl_get_ies(hw, gpio), |
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pullen, |
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pullup); |
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|
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if (r1 != -1) { |
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len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n", |
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r1, r0); |
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} else { |
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len += scnprintf(buf + len, bufLen - len, "\n"); |
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} |
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|
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return len; |
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} |
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EXPORT_SYMBOL_GPL(mtk_pctrl_show_one_pin); |
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|
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#define PIN_DBG_BUF_SZ 96 |
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static void mtk_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, |
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unsigned int gpio) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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char buf[PIN_DBG_BUF_SZ]; |
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|
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(void)mtk_pctrl_show_one_pin(hw, gpio, buf, PIN_DBG_BUF_SZ); |
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|
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seq_printf(s, "%s", buf); |
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} |
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|
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static const struct pinctrl_ops mtk_pctlops = { |
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.dt_node_to_map = mtk_pctrl_dt_node_to_map, |
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.dt_free_map = pinctrl_utils_free_map, |
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.get_groups_count = mtk_pctrl_get_groups_count, |
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.get_group_name = mtk_pctrl_get_group_name, |
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.get_group_pins = mtk_pctrl_get_group_pins, |
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.pin_dbg_show = mtk_pctrl_dbg_show, |
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}; |
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|
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static int mtk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev) |
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{ |
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return ARRAY_SIZE(mtk_gpio_functions); |
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} |
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|
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static const char *mtk_pmx_get_func_name(struct pinctrl_dev *pctldev, |
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unsigned selector) |
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{ |
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return mtk_gpio_functions[selector]; |
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} |
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|
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static int mtk_pmx_get_func_groups(struct pinctrl_dev *pctldev, |
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unsigned function, |
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const char * const **groups, |
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unsigned * const num_groups) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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|
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*groups = hw->grp_names; |
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*num_groups = hw->soc->ngrps; |
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|
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return 0; |
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} |
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|
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static int mtk_pmx_set_mux(struct pinctrl_dev *pctldev, |
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unsigned function, |
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unsigned group) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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struct mtk_pinctrl_group *grp = hw->groups + group; |
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const struct mtk_func_desc *desc_func; |
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const struct mtk_pin_desc *desc; |
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bool ret; |
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|
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ret = mtk_pctrl_is_function_valid(hw, grp->pin, function); |
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if (!ret) { |
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dev_err(hw->dev, "invalid function %d on group %d .\n", |
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function, group); |
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return -EINVAL; |
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} |
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|
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desc_func = mtk_pctrl_find_function_by_pin(hw, grp->pin, function); |
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if (!desc_func) |
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return -EINVAL; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[grp->pin]; |
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mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE, desc_func->muxval); |
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|
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return 0; |
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} |
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|
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static const struct pinmux_ops mtk_pmxops = { |
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.get_functions_count = mtk_pmx_get_funcs_cnt, |
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.get_function_name = mtk_pmx_get_func_name, |
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.get_function_groups = mtk_pmx_get_func_groups, |
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.set_mux = mtk_pmx_set_mux, |
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.gpio_set_direction = mtk_pinmux_gpio_set_direction, |
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.gpio_request_enable = mtk_pinmux_gpio_request_enable, |
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}; |
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|
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static int mtk_pconf_group_get(struct pinctrl_dev *pctldev, unsigned group, |
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unsigned long *config) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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|
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*config = hw->groups[group].config; |
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|
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return 0; |
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} |
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|
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static int mtk_pconf_group_set(struct pinctrl_dev *pctldev, unsigned group, |
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unsigned long *configs, unsigned num_configs) |
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{ |
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struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev); |
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struct mtk_pinctrl_group *grp = &hw->groups[group]; |
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int i, ret; |
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|
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for (i = 0; i < num_configs; i++) { |
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ret = mtk_pinconf_set(pctldev, grp->pin, |
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pinconf_to_config_param(configs[i]), |
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pinconf_to_config_argument(configs[i])); |
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if (ret < 0) |
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return ret; |
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|
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grp->config = configs[i]; |
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} |
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|
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return 0; |
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} |
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|
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static const struct pinconf_ops mtk_confops = { |
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.pin_config_get = mtk_pinconf_get, |
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.pin_config_group_get = mtk_pconf_group_get, |
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.pin_config_group_set = mtk_pconf_group_set, |
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.is_generic = true, |
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}; |
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|
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static struct pinctrl_desc mtk_desc = { |
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.name = PINCTRL_PINCTRL_DEV, |
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.pctlops = &mtk_pctlops, |
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.pmxops = &mtk_pmxops, |
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.confops = &mtk_confops, |
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.owner = THIS_MODULE, |
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}; |
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|
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static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int gpio) |
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{ |
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struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
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const struct mtk_pin_desc *desc; |
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int value, err; |
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|
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if (gpio >= hw->soc->npins) |
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return -EINVAL; |
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|
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/* |
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* "Virtual" GPIOs are always and only used for interrupts |
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* Since they are only used for interrupts, they are always inputs |
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*/ |
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if (mtk_is_virt_gpio(hw, gpio)) |
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return 1; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; |
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|
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &value); |
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if (err) |
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return err; |
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|
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if (value) |
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return GPIO_LINE_DIRECTION_OUT; |
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|
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return GPIO_LINE_DIRECTION_IN; |
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} |
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|
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static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) |
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{ |
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struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
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const struct mtk_pin_desc *desc; |
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int value, err; |
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|
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if (gpio >= hw->soc->npins) |
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return -EINVAL; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; |
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|
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err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value); |
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if (err) |
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return err; |
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|
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return !!value; |
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} |
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|
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static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) |
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{ |
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struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
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const struct mtk_pin_desc *desc; |
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|
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if (gpio >= hw->soc->npins) |
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return; |
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|
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desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio]; |
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|
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mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value); |
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} |
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|
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static int mtk_gpio_direction_input(struct gpio_chip *chip, unsigned int gpio) |
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{ |
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struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
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|
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if (gpio >= hw->soc->npins) |
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return -EINVAL; |
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|
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return pinctrl_gpio_direction_input(chip->base + gpio); |
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} |
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|
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static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio, |
|
int value) |
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{ |
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struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
|
|
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if (gpio >= hw->soc->npins) |
|
return -EINVAL; |
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|
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mtk_gpio_set(chip, gpio, value); |
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|
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return pinctrl_gpio_direction_output(chip->base + gpio); |
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} |
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|
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static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) |
|
{ |
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struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
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const struct mtk_pin_desc *desc; |
|
|
|
if (!hw->eint) |
|
return -ENOTSUPP; |
|
|
|
desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; |
|
|
|
if (desc->eint.eint_n == EINT_NA) |
|
return -ENOTSUPP; |
|
|
|
return mtk_eint_find_irq(hw->eint, desc->eint.eint_n); |
|
} |
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|
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static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset, |
|
unsigned long config) |
|
{ |
|
struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
|
const struct mtk_pin_desc *desc; |
|
u32 debounce; |
|
|
|
desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset]; |
|
|
|
if (!hw->eint || |
|
pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE || |
|
desc->eint.eint_n == EINT_NA) |
|
return -ENOTSUPP; |
|
|
|
debounce = pinconf_to_config_argument(config); |
|
|
|
return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce); |
|
} |
|
|
|
static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) |
|
{ |
|
struct gpio_chip *chip = &hw->chip; |
|
int ret; |
|
|
|
chip->label = PINCTRL_PINCTRL_DEV; |
|
chip->parent = hw->dev; |
|
chip->request = gpiochip_generic_request; |
|
chip->free = gpiochip_generic_free; |
|
chip->get_direction = mtk_gpio_get_direction; |
|
chip->direction_input = mtk_gpio_direction_input; |
|
chip->direction_output = mtk_gpio_direction_output; |
|
chip->get = mtk_gpio_get; |
|
chip->set = mtk_gpio_set; |
|
chip->to_irq = mtk_gpio_to_irq; |
|
chip->set_config = mtk_gpio_set_config; |
|
chip->base = -1; |
|
chip->ngpio = hw->soc->npins; |
|
chip->of_node = np; |
|
chip->of_gpio_n_cells = 2; |
|
|
|
ret = gpiochip_add_data(chip, hw); |
|
if (ret < 0) |
|
return ret; |
|
|
|
return 0; |
|
} |
|
|
|
static int mtk_pctrl_build_state(struct platform_device *pdev) |
|
{ |
|
struct mtk_pinctrl *hw = platform_get_drvdata(pdev); |
|
int i; |
|
|
|
/* Allocate groups */ |
|
hw->groups = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, |
|
sizeof(*hw->groups), GFP_KERNEL); |
|
if (!hw->groups) |
|
return -ENOMEM; |
|
|
|
/* We assume that one pin is one group, use pin name as group name. */ |
|
hw->grp_names = devm_kmalloc_array(&pdev->dev, hw->soc->ngrps, |
|
sizeof(*hw->grp_names), GFP_KERNEL); |
|
if (!hw->grp_names) |
|
return -ENOMEM; |
|
|
|
for (i = 0; i < hw->soc->npins; i++) { |
|
const struct mtk_pin_desc *pin = hw->soc->pins + i; |
|
struct mtk_pinctrl_group *group = hw->groups + i; |
|
|
|
group->name = pin->name; |
|
group->pin = pin->number; |
|
|
|
hw->grp_names[i] = pin->name; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
int mtk_paris_pinctrl_probe(struct platform_device *pdev, |
|
const struct mtk_pin_soc *soc) |
|
{ |
|
struct pinctrl_pin_desc *pins; |
|
struct mtk_pinctrl *hw; |
|
int err, i; |
|
|
|
hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL); |
|
if (!hw) |
|
return -ENOMEM; |
|
|
|
platform_set_drvdata(pdev, hw); |
|
hw->soc = soc; |
|
hw->dev = &pdev->dev; |
|
|
|
if (!hw->soc->nbase_names) { |
|
dev_err(&pdev->dev, |
|
"SoC should be assigned at least one register base\n"); |
|
return -EINVAL; |
|
} |
|
|
|
hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names, |
|
sizeof(*hw->base), GFP_KERNEL); |
|
if (!hw->base) |
|
return -ENOMEM; |
|
|
|
for (i = 0; i < hw->soc->nbase_names; i++) { |
|
hw->base[i] = devm_platform_ioremap_resource_byname(pdev, |
|
hw->soc->base_names[i]); |
|
if (IS_ERR(hw->base[i])) |
|
return PTR_ERR(hw->base[i]); |
|
} |
|
|
|
hw->nbase = hw->soc->nbase_names; |
|
|
|
spin_lock_init(&hw->lock); |
|
|
|
err = mtk_pctrl_build_state(pdev); |
|
if (err) { |
|
dev_err(&pdev->dev, "build state failed: %d\n", err); |
|
return -EINVAL; |
|
} |
|
|
|
/* Copy from internal struct mtk_pin_desc to register to the core */ |
|
pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins), |
|
GFP_KERNEL); |
|
if (!pins) |
|
return -ENOMEM; |
|
|
|
for (i = 0; i < hw->soc->npins; i++) { |
|
pins[i].number = hw->soc->pins[i].number; |
|
pins[i].name = hw->soc->pins[i].name; |
|
} |
|
|
|
/* Setup pins descriptions per SoC types */ |
|
mtk_desc.pins = (const struct pinctrl_pin_desc *)pins; |
|
mtk_desc.npins = hw->soc->npins; |
|
mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings); |
|
mtk_desc.custom_params = mtk_custom_bindings; |
|
#ifdef CONFIG_DEBUG_FS |
|
mtk_desc.custom_conf_items = mtk_conf_items; |
|
#endif |
|
|
|
err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, |
|
&hw->pctrl); |
|
if (err) |
|
return err; |
|
|
|
err = pinctrl_enable(hw->pctrl); |
|
if (err) |
|
return err; |
|
|
|
err = mtk_build_eint(hw, pdev); |
|
if (err) |
|
dev_warn(&pdev->dev, |
|
"Failed to add EINT, but pinctrl still can work\n"); |
|
|
|
/* Build gpiochip should be after pinctrl_enable is done */ |
|
err = mtk_build_gpiochip(hw, pdev->dev.of_node); |
|
if (err) { |
|
dev_err(&pdev->dev, "Failed to add gpio_chip\n"); |
|
return err; |
|
} |
|
|
|
platform_set_drvdata(pdev, hw); |
|
|
|
return 0; |
|
} |
|
EXPORT_SYMBOL_GPL(mtk_paris_pinctrl_probe); |
|
|
|
static int mtk_paris_pinctrl_suspend(struct device *device) |
|
{ |
|
struct mtk_pinctrl *pctl = dev_get_drvdata(device); |
|
|
|
return mtk_eint_do_suspend(pctl->eint); |
|
} |
|
|
|
static int mtk_paris_pinctrl_resume(struct device *device) |
|
{ |
|
struct mtk_pinctrl *pctl = dev_get_drvdata(device); |
|
|
|
return mtk_eint_do_resume(pctl->eint); |
|
} |
|
|
|
const struct dev_pm_ops mtk_paris_pinctrl_pm_ops = { |
|
.suspend_noirq = mtk_paris_pinctrl_suspend, |
|
.resume_noirq = mtk_paris_pinctrl_resume, |
|
}; |
|
|
|
MODULE_LICENSE("GPL v2"); |
|
MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Paris");
|
|
|