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192 lines
4.5 KiB
192 lines
4.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Ralink RT288x/RT3xxx/MT76xx built-in hardware watchdog timer |
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* |
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* Copyright (C) 2011 Gabor Juhos <[email protected]> |
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* Copyright (C) 2013 John Crispin <[email protected]> |
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* |
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* This driver was based on: drivers/watchdog/softdog.c |
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*/ |
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#include <linux/clk.h> |
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#include <linux/reset.h> |
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#include <linux/module.h> |
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#include <linux/kernel.h> |
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#include <linux/watchdog.h> |
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#include <linux/moduleparam.h> |
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#include <linux/platform_device.h> |
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#include <linux/mod_devicetable.h> |
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#include <asm/mach-ralink/ralink_regs.h> |
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#define SYSC_RSTSTAT 0x38 |
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#define WDT_RST_CAUSE BIT(1) |
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#define RALINK_WDT_TIMEOUT 30 |
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#define RALINK_WDT_PRESCALE 65536 |
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#define TIMER_REG_TMR1LOAD 0x00 |
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#define TIMER_REG_TMR1CTL 0x08 |
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#define TMRSTAT_TMR1RST BIT(5) |
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#define TMR1CTL_ENABLE BIT(7) |
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#define TMR1CTL_MODE_SHIFT 4 |
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#define TMR1CTL_MODE_MASK 0x3 |
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#define TMR1CTL_MODE_FREE_RUNNING 0x0 |
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#define TMR1CTL_MODE_PERIODIC 0x1 |
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#define TMR1CTL_MODE_TIMEOUT 0x2 |
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#define TMR1CTL_MODE_WDT 0x3 |
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#define TMR1CTL_PRESCALE_MASK 0xf |
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#define TMR1CTL_PRESCALE_65536 0xf |
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static struct clk *rt288x_wdt_clk; |
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static unsigned long rt288x_wdt_freq; |
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static void __iomem *rt288x_wdt_base; |
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static struct reset_control *rt288x_wdt_reset; |
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static bool nowayout = WATCHDOG_NOWAYOUT; |
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module_param(nowayout, bool, 0); |
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MODULE_PARM_DESC(nowayout, |
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"Watchdog cannot be stopped once started (default=" |
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__MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
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static inline void rt_wdt_w32(unsigned reg, u32 val) |
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{ |
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iowrite32(val, rt288x_wdt_base + reg); |
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} |
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static inline u32 rt_wdt_r32(unsigned reg) |
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{ |
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return ioread32(rt288x_wdt_base + reg); |
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} |
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static int rt288x_wdt_ping(struct watchdog_device *w) |
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{ |
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rt_wdt_w32(TIMER_REG_TMR1LOAD, w->timeout * rt288x_wdt_freq); |
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return 0; |
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} |
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static int rt288x_wdt_start(struct watchdog_device *w) |
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{ |
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u32 t; |
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t = rt_wdt_r32(TIMER_REG_TMR1CTL); |
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t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT | |
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TMR1CTL_PRESCALE_MASK); |
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t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT | |
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TMR1CTL_PRESCALE_65536); |
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rt_wdt_w32(TIMER_REG_TMR1CTL, t); |
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rt288x_wdt_ping(w); |
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t = rt_wdt_r32(TIMER_REG_TMR1CTL); |
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t |= TMR1CTL_ENABLE; |
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rt_wdt_w32(TIMER_REG_TMR1CTL, t); |
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return 0; |
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} |
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static int rt288x_wdt_stop(struct watchdog_device *w) |
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{ |
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u32 t; |
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rt288x_wdt_ping(w); |
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t = rt_wdt_r32(TIMER_REG_TMR1CTL); |
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t &= ~TMR1CTL_ENABLE; |
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rt_wdt_w32(TIMER_REG_TMR1CTL, t); |
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return 0; |
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} |
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static int rt288x_wdt_set_timeout(struct watchdog_device *w, unsigned int t) |
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{ |
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w->timeout = t; |
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rt288x_wdt_ping(w); |
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return 0; |
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} |
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static int rt288x_wdt_bootcause(void) |
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{ |
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if (rt_sysc_r32(SYSC_RSTSTAT) & WDT_RST_CAUSE) |
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return WDIOF_CARDRESET; |
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return 0; |
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} |
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static const struct watchdog_info rt288x_wdt_info = { |
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.identity = "Ralink Watchdog", |
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
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}; |
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static const struct watchdog_ops rt288x_wdt_ops = { |
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.owner = THIS_MODULE, |
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.start = rt288x_wdt_start, |
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.stop = rt288x_wdt_stop, |
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.ping = rt288x_wdt_ping, |
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.set_timeout = rt288x_wdt_set_timeout, |
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}; |
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static struct watchdog_device rt288x_wdt_dev = { |
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.info = &rt288x_wdt_info, |
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.ops = &rt288x_wdt_ops, |
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.min_timeout = 1, |
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}; |
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static int rt288x_wdt_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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int ret; |
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rt288x_wdt_base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(rt288x_wdt_base)) |
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return PTR_ERR(rt288x_wdt_base); |
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rt288x_wdt_clk = devm_clk_get(dev, NULL); |
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if (IS_ERR(rt288x_wdt_clk)) |
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return PTR_ERR(rt288x_wdt_clk); |
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rt288x_wdt_reset = devm_reset_control_get_exclusive(dev, NULL); |
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if (!IS_ERR(rt288x_wdt_reset)) |
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reset_control_deassert(rt288x_wdt_reset); |
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rt288x_wdt_freq = clk_get_rate(rt288x_wdt_clk) / RALINK_WDT_PRESCALE; |
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rt288x_wdt_dev.bootstatus = rt288x_wdt_bootcause(); |
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rt288x_wdt_dev.max_timeout = (0xfffful / rt288x_wdt_freq); |
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rt288x_wdt_dev.parent = dev; |
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watchdog_init_timeout(&rt288x_wdt_dev, rt288x_wdt_dev.max_timeout, |
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dev); |
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watchdog_set_nowayout(&rt288x_wdt_dev, nowayout); |
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watchdog_stop_on_reboot(&rt288x_wdt_dev); |
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ret = devm_watchdog_register_device(dev, &rt288x_wdt_dev); |
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if (!ret) |
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dev_info(dev, "Initialized\n"); |
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return 0; |
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} |
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static const struct of_device_id rt288x_wdt_match[] = { |
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{ .compatible = "ralink,rt2880-wdt" }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, rt288x_wdt_match); |
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static struct platform_driver rt288x_wdt_driver = { |
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.probe = rt288x_wdt_probe, |
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.driver = { |
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.name = KBUILD_MODNAME, |
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.of_match_table = rt288x_wdt_match, |
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}, |
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}; |
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module_platform_driver(rt288x_wdt_driver); |
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MODULE_DESCRIPTION("MediaTek/Ralink RT288x/RT3xxx hardware watchdog driver"); |
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MODULE_AUTHOR("Gabor Juhos <[email protected]"); |
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MODULE_LICENSE("GPL v2");
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