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1062 lines
30 KiB
1062 lines
30 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright 2018 Google LLC. |
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* |
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* Driver for Semtech's SX9310/SX9311 capacitive proximity/button solution. |
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* Based on SX9500 driver and Semtech driver using the input framework |
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* <https://my.syncplicity.com/share/teouwsim8niiaud/ |
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* linux-driver-SX9310_NoSmartHSensing>. |
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* Reworked in April 2019 by Evan Green <[email protected]> |
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* and in January 2020 by Daniel Campello <[email protected]>. |
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*/ |
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|
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#include <linux/bitfield.h> |
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#include <linux/delay.h> |
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#include <linux/i2c.h> |
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#include <linux/interrupt.h> |
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#include <linux/kernel.h> |
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#include <linux/log2.h> |
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#include <linux/mod_devicetable.h> |
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#include <linux/module.h> |
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#include <linux/pm.h> |
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#include <linux/property.h> |
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#include <linux/regmap.h> |
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#include <linux/iio/iio.h> |
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#include "sx_common.h" |
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|
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/* Register definitions. */ |
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#define SX9310_REG_IRQ_SRC SX_COMMON_REG_IRQ_SRC |
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#define SX9310_REG_STAT0 0x01 |
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#define SX9310_REG_STAT1 0x02 |
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#define SX9310_REG_STAT1_COMPSTAT_MASK GENMASK(3, 0) |
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#define SX9310_REG_IRQ_MSK 0x03 |
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#define SX9310_CONVDONE_IRQ BIT(3) |
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#define SX9310_FAR_IRQ BIT(5) |
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#define SX9310_CLOSE_IRQ BIT(6) |
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#define SX9310_REG_IRQ_FUNC 0x04 |
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#define SX9310_REG_PROX_CTRL0 0x10 |
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#define SX9310_REG_PROX_CTRL0_SENSOREN_MASK GENMASK(3, 0) |
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#define SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK GENMASK(7, 4) |
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#define SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS 0x01 |
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#define SX9310_REG_PROX_CTRL1 0x11 |
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#define SX9310_REG_PROX_CTRL2 0x12 |
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#define SX9310_REG_PROX_CTRL2_COMBMODE_MASK GENMASK(7, 6) |
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#define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3 (0x03 << 6) |
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#define SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 (0x02 << 6) |
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#define SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1 (0x01 << 6) |
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#define SX9310_REG_PROX_CTRL2_COMBMODE_CS3 (0x00 << 6) |
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#define SX9310_REG_PROX_CTRL2_SHIELDEN_MASK GENMASK(3, 2) |
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#define SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC (0x01 << 2) |
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#define SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND (0x02 << 2) |
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#define SX9310_REG_PROX_CTRL3 0x13 |
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#define SX9310_REG_PROX_CTRL3_GAIN0_MASK GENMASK(3, 2) |
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#define SX9310_REG_PROX_CTRL3_GAIN0_X8 (0x03 << 2) |
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#define SX9310_REG_PROX_CTRL3_GAIN12_MASK GENMASK(1, 0) |
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#define SX9310_REG_PROX_CTRL3_GAIN12_X4 0x02 |
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#define SX9310_REG_PROX_CTRL4 0x14 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_MASK GENMASK(2, 0) |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST 0x07 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE 0x06 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_FINE 0x05 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM 0x04 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE 0x03 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE 0x02 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE 0x01 |
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#define SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST 0x00 |
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#define SX9310_REG_PROX_CTRL5 0x15 |
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#define SX9310_REG_PROX_CTRL5_RANGE_SMALL (0x03 << 6) |
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#define SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK GENMASK(3, 2) |
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#define SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 (0x01 << 2) |
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#define SX9310_REG_PROX_CTRL5_RAWFILT_MASK GENMASK(1, 0) |
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#define SX9310_REG_PROX_CTRL5_RAWFILT_SHIFT 0 |
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#define SX9310_REG_PROX_CTRL5_RAWFILT_1P25 0x02 |
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#define SX9310_REG_PROX_CTRL6 0x16 |
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#define SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT 0x20 |
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#define SX9310_REG_PROX_CTRL7 0x17 |
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#define SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 (0x01 << 3) |
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#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK GENMASK(2, 0) |
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#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_SHIFT 0 |
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#define SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 0x05 |
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#define SX9310_REG_PROX_CTRL8 0x18 |
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#define SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK GENMASK(7, 3) |
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#define SX9310_REG_PROX_CTRL9 0x19 |
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#define SX9310_REG_PROX_CTRL8_9_PTHRESH_28 (0x08 << 3) |
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#define SX9310_REG_PROX_CTRL8_9_PTHRESH_96 (0x11 << 3) |
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#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 0x03 |
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#define SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 0x05 |
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#define SX9310_REG_PROX_CTRL10 0x1a |
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#define SX9310_REG_PROX_CTRL10_HYST_MASK GENMASK(5, 4) |
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#define SX9310_REG_PROX_CTRL10_HYST_6PCT (0x01 << 4) |
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#define SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK GENMASK(3, 2) |
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#define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK GENMASK(1, 0) |
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#define SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 0x01 |
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#define SX9310_REG_PROX_CTRL11 0x1b |
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#define SX9310_REG_PROX_CTRL12 0x1c |
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#define SX9310_REG_PROX_CTRL13 0x1d |
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#define SX9310_REG_PROX_CTRL14 0x1e |
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#define SX9310_REG_PROX_CTRL15 0x1f |
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#define SX9310_REG_PROX_CTRL16 0x20 |
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#define SX9310_REG_PROX_CTRL17 0x21 |
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#define SX9310_REG_PROX_CTRL18 0x22 |
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#define SX9310_REG_PROX_CTRL19 0x23 |
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#define SX9310_REG_SAR_CTRL0 0x2a |
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#define SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES (0x02 << 5) |
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#define SX9310_REG_SAR_CTRL0_SARHYST_8 (0x02 << 3) |
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#define SX9310_REG_SAR_CTRL1 0x2b |
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/* Each increment of the slope register is 0.0078125. */ |
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#define SX9310_REG_SAR_CTRL1_SLOPE(_hnslope) (_hnslope / 78125) |
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#define SX9310_REG_SAR_CTRL2 0x2c |
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#define SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT 0x3c |
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|
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#define SX9310_REG_SENSOR_SEL 0x30 |
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#define SX9310_REG_USE_MSB 0x31 |
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#define SX9310_REG_USE_LSB 0x32 |
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#define SX9310_REG_AVG_MSB 0x33 |
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#define SX9310_REG_AVG_LSB 0x34 |
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#define SX9310_REG_DIFF_MSB 0x35 |
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#define SX9310_REG_DIFF_LSB 0x36 |
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#define SX9310_REG_OFFSET_MSB 0x37 |
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#define SX9310_REG_OFFSET_LSB 0x38 |
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#define SX9310_REG_SAR_MSB 0x39 |
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#define SX9310_REG_SAR_LSB 0x3a |
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#define SX9310_REG_I2C_ADDR 0x40 |
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#define SX9310_REG_PAUSE 0x41 |
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#define SX9310_REG_WHOAMI 0x42 |
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#define SX9310_WHOAMI_VALUE 0x01 |
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#define SX9311_WHOAMI_VALUE 0x02 |
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#define SX9310_REG_RESET 0x7f |
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/* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */ |
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#define SX9310_NUM_CHANNELS 4 |
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static_assert(SX9310_NUM_CHANNELS <= SX_COMMON_MAX_NUM_CHANNELS); |
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|
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#define SX9310_NAMED_CHANNEL(idx, name) \ |
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{ \ |
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.type = IIO_PROXIMITY, \ |
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ |
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BIT(IIO_CHAN_INFO_HARDWAREGAIN), \ |
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.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
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.info_mask_separate_available = \ |
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BIT(IIO_CHAN_INFO_HARDWAREGAIN), \ |
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.info_mask_shared_by_all_available = \ |
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BIT(IIO_CHAN_INFO_SAMP_FREQ), \ |
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.indexed = 1, \ |
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.channel = idx, \ |
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.extend_name = name, \ |
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.address = SX9310_REG_DIFF_MSB, \ |
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.event_spec = sx_common_events, \ |
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.num_event_specs = ARRAY_SIZE(sx_common_events), \ |
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.scan_index = idx, \ |
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.scan_type = { \ |
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.sign = 's', \ |
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.realbits = 12, \ |
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.storagebits = 16, \ |
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.endianness = IIO_BE, \ |
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}, \ |
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} |
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#define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL) |
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static const struct iio_chan_spec sx9310_channels[] = { |
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SX9310_CHANNEL(0), /* CS0 */ |
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SX9310_CHANNEL(1), /* CS1 */ |
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SX9310_CHANNEL(2), /* CS2 */ |
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SX9310_NAMED_CHANNEL(3, "comb"), /* COMB */ |
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IIO_CHAN_SOFT_TIMESTAMP(4), |
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}; |
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/* |
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* Each entry contains the integer part (val) and the fractional part, in micro |
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* seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO. |
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*/ |
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static const struct { |
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int val; |
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int val2; |
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} sx9310_samp_freq_table[] = { |
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{ 500, 0 }, /* 0000: Min (no idle time) */ |
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{ 66, 666666 }, /* 0001: 15 ms */ |
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{ 33, 333333 }, /* 0010: 30 ms (Typ.) */ |
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{ 22, 222222 }, /* 0011: 45 ms */ |
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{ 16, 666666 }, /* 0100: 60 ms */ |
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{ 11, 111111 }, /* 0101: 90 ms */ |
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{ 8, 333333 }, /* 0110: 120 ms */ |
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{ 5, 0 }, /* 0111: 200 ms */ |
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{ 2, 500000 }, /* 1000: 400 ms */ |
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{ 1, 666666 }, /* 1001: 600 ms */ |
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{ 1, 250000 }, /* 1010: 800 ms */ |
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{ 1, 0 }, /* 1011: 1 s */ |
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{ 0, 500000 }, /* 1100: 2 s */ |
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{ 0, 333333 }, /* 1101: 3 s */ |
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{ 0, 250000 }, /* 1110: 4 s */ |
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{ 0, 200000 }, /* 1111: 5 s */ |
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}; |
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static const unsigned int sx9310_scan_period_table[] = { |
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2, 15, 30, 45, 60, 90, 120, 200, |
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400, 600, 800, 1000, 2000, 3000, 4000, 5000, |
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}; |
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static const struct regmap_range sx9310_writable_reg_ranges[] = { |
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regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC), |
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regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19), |
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regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2), |
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regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL), |
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regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB), |
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regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE), |
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regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), |
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}; |
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static const struct regmap_access_table sx9310_writeable_regs = { |
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.yes_ranges = sx9310_writable_reg_ranges, |
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.n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges), |
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}; |
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static const struct regmap_range sx9310_readable_reg_ranges[] = { |
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regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC), |
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regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19), |
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regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2), |
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regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB), |
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regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI), |
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regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), |
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}; |
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static const struct regmap_access_table sx9310_readable_regs = { |
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.yes_ranges = sx9310_readable_reg_ranges, |
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.n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges), |
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}; |
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static const struct regmap_range sx9310_volatile_reg_ranges[] = { |
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regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1), |
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regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB), |
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regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB), |
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regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET), |
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}; |
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static const struct regmap_access_table sx9310_volatile_regs = { |
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.yes_ranges = sx9310_volatile_reg_ranges, |
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.n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges), |
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}; |
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static const struct regmap_config sx9310_regmap_config = { |
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.reg_bits = 8, |
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.val_bits = 8, |
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.max_register = SX9310_REG_RESET, |
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.cache_type = REGCACHE_RBTREE, |
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.wr_table = &sx9310_writeable_regs, |
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.rd_table = &sx9310_readable_regs, |
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.volatile_table = &sx9310_volatile_regs, |
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}; |
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static int sx9310_read_prox_data(struct sx_common_data *data, |
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const struct iio_chan_spec *chan, __be16 *val) |
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{ |
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int ret; |
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ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel); |
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if (ret) |
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return ret; |
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return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val)); |
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} |
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/* |
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* If we have no interrupt support, we have to wait for a scan period |
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* after enabling a channel to get a result. |
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*/ |
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static int sx9310_wait_for_sample(struct sx_common_data *data) |
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{ |
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int ret; |
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unsigned int val; |
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ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val); |
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if (ret) |
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return ret; |
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val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val); |
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msleep(sx9310_scan_period_table[val]); |
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return 0; |
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} |
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static int sx9310_read_gain(struct sx_common_data *data, |
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const struct iio_chan_spec *chan, int *val) |
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{ |
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unsigned int regval, gain; |
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int ret; |
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ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, ®val); |
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if (ret) |
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return ret; |
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switch (chan->channel) { |
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case 0: |
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case 3: |
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gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval); |
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break; |
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case 1: |
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case 2: |
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gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval); |
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break; |
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default: |
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return -EINVAL; |
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} |
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*val = 1 << gain; |
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return IIO_VAL_INT; |
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} |
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static int sx9310_read_samp_freq(struct sx_common_data *data, int *val, int *val2) |
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{ |
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unsigned int regval; |
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int ret; |
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ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, ®val); |
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if (ret) |
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return ret; |
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regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval); |
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*val = sx9310_samp_freq_table[regval].val; |
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*val2 = sx9310_samp_freq_table[regval].val2; |
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return IIO_VAL_INT_PLUS_MICRO; |
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} |
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static int sx9310_read_raw(struct iio_dev *indio_dev, |
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const struct iio_chan_spec *chan, int *val, |
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int *val2, long mask) |
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{ |
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struct sx_common_data *data = iio_priv(indio_dev); |
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int ret; |
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if (chan->type != IIO_PROXIMITY) |
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return -EINVAL; |
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switch (mask) { |
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case IIO_CHAN_INFO_RAW: |
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ret = iio_device_claim_direct_mode(indio_dev); |
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if (ret) |
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return ret; |
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ret = sx_common_read_proximity(data, chan, val); |
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iio_device_release_direct_mode(indio_dev); |
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return ret; |
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case IIO_CHAN_INFO_HARDWAREGAIN: |
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ret = iio_device_claim_direct_mode(indio_dev); |
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if (ret) |
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return ret; |
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ret = sx9310_read_gain(data, chan, val); |
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iio_device_release_direct_mode(indio_dev); |
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return ret; |
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case IIO_CHAN_INFO_SAMP_FREQ: |
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return sx9310_read_samp_freq(data, val, val2); |
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default: |
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return -EINVAL; |
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} |
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} |
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|
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static const int sx9310_gain_vals[] = { 1, 2, 4, 8 }; |
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|
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static int sx9310_read_avail(struct iio_dev *indio_dev, |
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struct iio_chan_spec const *chan, |
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const int **vals, int *type, int *length, |
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long mask) |
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{ |
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if (chan->type != IIO_PROXIMITY) |
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return -EINVAL; |
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|
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switch (mask) { |
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case IIO_CHAN_INFO_HARDWAREGAIN: |
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*type = IIO_VAL_INT; |
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*length = ARRAY_SIZE(sx9310_gain_vals); |
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*vals = sx9310_gain_vals; |
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return IIO_AVAIL_LIST; |
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case IIO_CHAN_INFO_SAMP_FREQ: |
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*type = IIO_VAL_INT_PLUS_MICRO; |
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*length = ARRAY_SIZE(sx9310_samp_freq_table) * 2; |
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*vals = (int *)sx9310_samp_freq_table; |
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return IIO_AVAIL_LIST; |
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default: |
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return -EINVAL; |
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} |
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} |
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|
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static const unsigned int sx9310_pthresh_codes[] = { |
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2, 4, 6, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112, |
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128, 144, 160, 192, 224, 256, 320, 384, 512, 640, 768, 1024, 1536 |
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}; |
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|
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static int sx9310_get_thresh_reg(unsigned int channel) |
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{ |
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switch (channel) { |
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case 0: |
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case 3: |
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return SX9310_REG_PROX_CTRL8; |
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case 1: |
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case 2: |
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return SX9310_REG_PROX_CTRL9; |
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default: |
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return -EINVAL; |
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} |
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} |
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|
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static int sx9310_read_thresh(struct sx_common_data *data, |
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const struct iio_chan_spec *chan, int *val) |
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{ |
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unsigned int reg; |
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unsigned int regval; |
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int ret; |
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|
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reg = ret = sx9310_get_thresh_reg(chan->channel); |
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if (ret < 0) |
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return ret; |
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|
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ret = regmap_read(data->regmap, reg, ®val); |
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if (ret) |
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return ret; |
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|
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regval = FIELD_GET(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval); |
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if (regval >= ARRAY_SIZE(sx9310_pthresh_codes)) |
|
return -EINVAL; |
|
|
|
*val = sx9310_pthresh_codes[regval]; |
|
return IIO_VAL_INT; |
|
} |
|
|
|
static int sx9310_read_hysteresis(struct sx_common_data *data, |
|
const struct iio_chan_spec *chan, int *val) |
|
{ |
|
unsigned int regval, pthresh; |
|
int ret; |
|
|
|
ret = sx9310_read_thresh(data, chan, &pthresh); |
|
if (ret < 0) |
|
return ret; |
|
|
|
ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val); |
|
if (ret) |
|
return ret; |
|
|
|
regval = FIELD_GET(SX9310_REG_PROX_CTRL10_HYST_MASK, regval); |
|
if (!regval) |
|
regval = 5; |
|
|
|
/* regval is at most 5 */ |
|
*val = pthresh >> (5 - regval); |
|
|
|
return IIO_VAL_INT; |
|
} |
|
|
|
static int sx9310_read_far_debounce(struct sx_common_data *data, int *val) |
|
{ |
|
unsigned int regval; |
|
int ret; |
|
|
|
ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val); |
|
if (ret) |
|
return ret; |
|
|
|
regval = FIELD_GET(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, regval); |
|
if (regval) |
|
*val = 1 << regval; |
|
else |
|
*val = 0; |
|
|
|
return IIO_VAL_INT; |
|
} |
|
|
|
static int sx9310_read_close_debounce(struct sx_common_data *data, int *val) |
|
{ |
|
unsigned int regval; |
|
int ret; |
|
|
|
ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, ®val); |
|
if (ret) |
|
return ret; |
|
|
|
regval = FIELD_GET(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, regval); |
|
if (regval) |
|
*val = 1 << regval; |
|
else |
|
*val = 0; |
|
|
|
return IIO_VAL_INT; |
|
} |
|
|
|
static int sx9310_read_event_val(struct iio_dev *indio_dev, |
|
const struct iio_chan_spec *chan, |
|
enum iio_event_type type, |
|
enum iio_event_direction dir, |
|
enum iio_event_info info, int *val, int *val2) |
|
{ |
|
struct sx_common_data *data = iio_priv(indio_dev); |
|
|
|
if (chan->type != IIO_PROXIMITY) |
|
return -EINVAL; |
|
|
|
switch (info) { |
|
case IIO_EV_INFO_VALUE: |
|
return sx9310_read_thresh(data, chan, val); |
|
case IIO_EV_INFO_PERIOD: |
|
switch (dir) { |
|
case IIO_EV_DIR_RISING: |
|
return sx9310_read_far_debounce(data, val); |
|
case IIO_EV_DIR_FALLING: |
|
return sx9310_read_close_debounce(data, val); |
|
default: |
|
return -EINVAL; |
|
} |
|
case IIO_EV_INFO_HYSTERESIS: |
|
return sx9310_read_hysteresis(data, chan, val); |
|
default: |
|
return -EINVAL; |
|
} |
|
} |
|
|
|
static int sx9310_write_thresh(struct sx_common_data *data, |
|
const struct iio_chan_spec *chan, int val) |
|
{ |
|
unsigned int reg; |
|
unsigned int regval; |
|
int ret, i; |
|
|
|
reg = ret = sx9310_get_thresh_reg(chan->channel); |
|
if (ret < 0) |
|
return ret; |
|
|
|
for (i = 0; i < ARRAY_SIZE(sx9310_pthresh_codes); i++) { |
|
if (sx9310_pthresh_codes[i] == val) { |
|
regval = i; |
|
break; |
|
} |
|
} |
|
|
|
if (i == ARRAY_SIZE(sx9310_pthresh_codes)) |
|
return -EINVAL; |
|
|
|
regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval); |
|
mutex_lock(&data->mutex); |
|
ret = regmap_update_bits(data->regmap, reg, |
|
SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval); |
|
mutex_unlock(&data->mutex); |
|
|
|
return ret; |
|
} |
|
|
|
static int sx9310_write_hysteresis(struct sx_common_data *data, |
|
const struct iio_chan_spec *chan, int _val) |
|
{ |
|
unsigned int hyst, val = _val; |
|
int ret, pthresh; |
|
|
|
ret = sx9310_read_thresh(data, chan, &pthresh); |
|
if (ret < 0) |
|
return ret; |
|
|
|
if (val == 0) |
|
hyst = 0; |
|
else if (val == pthresh >> 2) |
|
hyst = 3; |
|
else if (val == pthresh >> 3) |
|
hyst = 2; |
|
else if (val == pthresh >> 4) |
|
hyst = 1; |
|
else |
|
return -EINVAL; |
|
|
|
hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst); |
|
mutex_lock(&data->mutex); |
|
ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10, |
|
SX9310_REG_PROX_CTRL10_HYST_MASK, hyst); |
|
mutex_unlock(&data->mutex); |
|
|
|
return ret; |
|
} |
|
|
|
static int sx9310_write_far_debounce(struct sx_common_data *data, int val) |
|
{ |
|
int ret; |
|
unsigned int regval; |
|
|
|
if (val > 0) |
|
val = ilog2(val); |
|
if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val)) |
|
return -EINVAL; |
|
|
|
regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val); |
|
|
|
mutex_lock(&data->mutex); |
|
ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10, |
|
SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, |
|
regval); |
|
mutex_unlock(&data->mutex); |
|
|
|
return ret; |
|
} |
|
|
|
static int sx9310_write_close_debounce(struct sx_common_data *data, int val) |
|
{ |
|
int ret; |
|
unsigned int regval; |
|
|
|
if (val > 0) |
|
val = ilog2(val); |
|
if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val)) |
|
return -EINVAL; |
|
|
|
regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val); |
|
|
|
mutex_lock(&data->mutex); |
|
ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10, |
|
SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, |
|
regval); |
|
mutex_unlock(&data->mutex); |
|
|
|
return ret; |
|
} |
|
|
|
static int sx9310_write_event_val(struct iio_dev *indio_dev, |
|
const struct iio_chan_spec *chan, |
|
enum iio_event_type type, |
|
enum iio_event_direction dir, |
|
enum iio_event_info info, int val, int val2) |
|
{ |
|
struct sx_common_data *data = iio_priv(indio_dev); |
|
|
|
if (chan->type != IIO_PROXIMITY) |
|
return -EINVAL; |
|
|
|
switch (info) { |
|
case IIO_EV_INFO_VALUE: |
|
return sx9310_write_thresh(data, chan, val); |
|
case IIO_EV_INFO_PERIOD: |
|
switch (dir) { |
|
case IIO_EV_DIR_RISING: |
|
return sx9310_write_far_debounce(data, val); |
|
case IIO_EV_DIR_FALLING: |
|
return sx9310_write_close_debounce(data, val); |
|
default: |
|
return -EINVAL; |
|
} |
|
case IIO_EV_INFO_HYSTERESIS: |
|
return sx9310_write_hysteresis(data, chan, val); |
|
default: |
|
return -EINVAL; |
|
} |
|
} |
|
|
|
static int sx9310_set_samp_freq(struct sx_common_data *data, int val, int val2) |
|
{ |
|
int i, ret; |
|
|
|
for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++) |
|
if (val == sx9310_samp_freq_table[i].val && |
|
val2 == sx9310_samp_freq_table[i].val2) |
|
break; |
|
|
|
if (i == ARRAY_SIZE(sx9310_samp_freq_table)) |
|
return -EINVAL; |
|
|
|
mutex_lock(&data->mutex); |
|
|
|
ret = regmap_update_bits( |
|
data->regmap, SX9310_REG_PROX_CTRL0, |
|
SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, |
|
FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i)); |
|
|
|
mutex_unlock(&data->mutex); |
|
|
|
return ret; |
|
} |
|
|
|
static int sx9310_write_gain(struct sx_common_data *data, |
|
const struct iio_chan_spec *chan, int val) |
|
{ |
|
unsigned int gain, mask; |
|
int ret; |
|
|
|
gain = ilog2(val); |
|
|
|
switch (chan->channel) { |
|
case 0: |
|
case 3: |
|
mask = SX9310_REG_PROX_CTRL3_GAIN0_MASK; |
|
gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain); |
|
break; |
|
case 1: |
|
case 2: |
|
mask = SX9310_REG_PROX_CTRL3_GAIN12_MASK; |
|
gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain); |
|
break; |
|
default: |
|
return -EINVAL; |
|
} |
|
|
|
mutex_lock(&data->mutex); |
|
ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL3, mask, |
|
gain); |
|
mutex_unlock(&data->mutex); |
|
|
|
return ret; |
|
} |
|
|
|
static int sx9310_write_raw(struct iio_dev *indio_dev, |
|
const struct iio_chan_spec *chan, int val, int val2, |
|
long mask) |
|
{ |
|
struct sx_common_data *data = iio_priv(indio_dev); |
|
|
|
if (chan->type != IIO_PROXIMITY) |
|
return -EINVAL; |
|
|
|
switch (mask) { |
|
case IIO_CHAN_INFO_SAMP_FREQ: |
|
return sx9310_set_samp_freq(data, val, val2); |
|
case IIO_CHAN_INFO_HARDWAREGAIN: |
|
return sx9310_write_gain(data, chan, val); |
|
default: |
|
return -EINVAL; |
|
} |
|
} |
|
|
|
static const struct sx_common_reg_default sx9310_default_regs[] = { |
|
{ SX9310_REG_IRQ_MSK, 0x00 }, |
|
{ SX9310_REG_IRQ_FUNC, 0x00 }, |
|
/* |
|
* The lower 4 bits should not be set as it enable sensors measurements. |
|
* Turning the detection on before the configuration values are set to |
|
* good values can cause the device to return erroneous readings. |
|
*/ |
|
{ SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS }, |
|
{ SX9310_REG_PROX_CTRL1, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 | |
|
SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC }, |
|
{ SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 | |
|
SX9310_REG_PROX_CTRL3_GAIN12_X4 }, |
|
{ SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST }, |
|
{ SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL | |
|
SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 | |
|
SX9310_REG_PROX_CTRL5_RAWFILT_1P25 }, |
|
{ SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT }, |
|
{ SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 | |
|
SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 }, |
|
{ SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 | |
|
SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 }, |
|
{ SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 | |
|
SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 }, |
|
{ SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT | |
|
SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 }, |
|
{ SX9310_REG_PROX_CTRL11, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL12, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL13, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL14, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL15, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL16, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL17, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL18, 0x00 }, |
|
{ SX9310_REG_PROX_CTRL19, 0x00 }, |
|
{ SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES | |
|
SX9310_REG_SAR_CTRL0_SARHYST_8 }, |
|
{ SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) }, |
|
{ SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT }, |
|
}; |
|
|
|
/* Activate all channels and perform an initial compensation. */ |
|
static int sx9310_init_compensation(struct iio_dev *indio_dev) |
|
{ |
|
struct sx_common_data *data = iio_priv(indio_dev); |
|
int ret; |
|
unsigned int val; |
|
unsigned int ctrl0; |
|
|
|
ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0); |
|
if (ret) |
|
return ret; |
|
|
|
/* run the compensation phase on all channels */ |
|
ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, |
|
ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK); |
|
if (ret) |
|
return ret; |
|
|
|
ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val, |
|
!(val & SX9310_REG_STAT1_COMPSTAT_MASK), |
|
20000, 2000000); |
|
if (ret) |
|
return ret; |
|
|
|
regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); |
|
return ret; |
|
} |
|
|
|
static const struct sx_common_reg_default * |
|
sx9310_get_default_reg(struct device *dev, int idx, |
|
struct sx_common_reg_default *reg_def) |
|
{ |
|
u32 combined[SX9310_NUM_CHANNELS]; |
|
u32 start = 0, raw = 0, pos = 0; |
|
unsigned long comb_mask = 0; |
|
int ret, i, count; |
|
const char *res; |
|
|
|
memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def)); |
|
switch (reg_def->reg) { |
|
case SX9310_REG_PROX_CTRL2: |
|
if (device_property_read_bool(dev, "semtech,cs0-ground")) { |
|
reg_def->def &= ~SX9310_REG_PROX_CTRL2_SHIELDEN_MASK; |
|
reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND; |
|
} |
|
|
|
count = device_property_count_u32(dev, "semtech,combined-sensors"); |
|
if (count < 0 || count > ARRAY_SIZE(combined)) |
|
break; |
|
ret = device_property_read_u32_array(dev, "semtech,combined-sensors", |
|
combined, count); |
|
if (ret) |
|
break; |
|
|
|
for (i = 0; i < count; i++) |
|
comb_mask |= BIT(combined[i]); |
|
|
|
reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK; |
|
if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0))) |
|
reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3; |
|
else if (comb_mask == (BIT(1) | BIT(2))) |
|
reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2; |
|
else if (comb_mask == (BIT(0) | BIT(1))) |
|
reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1; |
|
else if (comb_mask == BIT(3)) |
|
reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS3; |
|
|
|
break; |
|
case SX9310_REG_PROX_CTRL4: |
|
ret = device_property_read_string(dev, "semtech,resolution", &res); |
|
if (ret) |
|
break; |
|
|
|
reg_def->def &= ~SX9310_REG_PROX_CTRL4_RESOLUTION_MASK; |
|
if (!strcmp(res, "coarsest")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST; |
|
else if (!strcmp(res, "very-coarse")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE; |
|
else if (!strcmp(res, "coarse")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE; |
|
else if (!strcmp(res, "medium-coarse")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE; |
|
else if (!strcmp(res, "medium")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM; |
|
else if (!strcmp(res, "fine")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINE; |
|
else if (!strcmp(res, "very-fine")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE; |
|
else if (!strcmp(res, "finest")) |
|
reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST; |
|
|
|
break; |
|
case SX9310_REG_PROX_CTRL5: |
|
ret = device_property_read_u32(dev, "semtech,startup-sensor", &start); |
|
if (ret) { |
|
start = FIELD_GET(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK, |
|
reg_def->def); |
|
} |
|
|
|
reg_def->def &= ~SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK; |
|
reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK, |
|
start); |
|
|
|
ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw); |
|
if (ret) { |
|
raw = FIELD_GET(SX9310_REG_PROX_CTRL5_RAWFILT_MASK, |
|
reg_def->def); |
|
} else { |
|
raw = ilog2(raw); |
|
} |
|
|
|
reg_def->def &= ~SX9310_REG_PROX_CTRL5_RAWFILT_MASK; |
|
reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK, |
|
raw); |
|
break; |
|
case SX9310_REG_PROX_CTRL7: |
|
ret = device_property_read_u32(dev, "semtech,avg-pos-strength", &pos); |
|
if (ret) |
|
break; |
|
|
|
/* Powers of 2, except for a gap between 16 and 64 */ |
|
pos = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3); |
|
reg_def->def &= ~SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK; |
|
reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK, |
|
pos); |
|
break; |
|
} |
|
|
|
return reg_def; |
|
} |
|
|
|
static int sx9310_check_whoami(struct device *dev, |
|
struct iio_dev *indio_dev) |
|
{ |
|
struct sx_common_data *data = iio_priv(indio_dev); |
|
unsigned int long ddata; |
|
unsigned int whoami; |
|
int ret; |
|
|
|
ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &whoami); |
|
if (ret) |
|
return ret; |
|
|
|
ddata = (uintptr_t)device_get_match_data(dev); |
|
if (ddata != whoami) |
|
return -EINVAL; |
|
|
|
switch (whoami) { |
|
case SX9310_WHOAMI_VALUE: |
|
indio_dev->name = "sx9310"; |
|
break; |
|
case SX9311_WHOAMI_VALUE: |
|
indio_dev->name = "sx9311"; |
|
break; |
|
default: |
|
return -ENODEV; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static const struct sx_common_chip_info sx9310_chip_info = { |
|
.reg_stat = SX9310_REG_STAT0, |
|
.reg_irq_msk = SX9310_REG_IRQ_MSK, |
|
.reg_enable_chan = SX9310_REG_PROX_CTRL0, |
|
.reg_reset = SX9310_REG_RESET, |
|
|
|
.mask_enable_chan = SX9310_REG_STAT1_COMPSTAT_MASK, |
|
.irq_msk_offset = 3, |
|
.num_channels = SX9310_NUM_CHANNELS, |
|
.num_default_regs = ARRAY_SIZE(sx9310_default_regs), |
|
|
|
.ops = { |
|
.read_prox_data = sx9310_read_prox_data, |
|
.check_whoami = sx9310_check_whoami, |
|
.init_compensation = sx9310_init_compensation, |
|
.wait_for_sample = sx9310_wait_for_sample, |
|
.get_default_reg = sx9310_get_default_reg, |
|
}, |
|
|
|
.iio_channels = sx9310_channels, |
|
.num_iio_channels = ARRAY_SIZE(sx9310_channels), |
|
.iio_info = { |
|
.read_raw = sx9310_read_raw, |
|
.read_avail = sx9310_read_avail, |
|
.read_event_value = sx9310_read_event_val, |
|
.write_event_value = sx9310_write_event_val, |
|
.write_raw = sx9310_write_raw, |
|
.read_event_config = sx_common_read_event_config, |
|
.write_event_config = sx_common_write_event_config, |
|
}, |
|
}; |
|
|
|
static int sx9310_probe(struct i2c_client *client) |
|
{ |
|
return sx_common_probe(client, &sx9310_chip_info, &sx9310_regmap_config); |
|
} |
|
|
|
static int __maybe_unused sx9310_suspend(struct device *dev) |
|
{ |
|
struct sx_common_data *data = iio_priv(dev_get_drvdata(dev)); |
|
u8 ctrl0; |
|
int ret; |
|
|
|
disable_irq_nosync(data->client->irq); |
|
|
|
mutex_lock(&data->mutex); |
|
ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, |
|
&data->suspend_ctrl); |
|
if (ret) |
|
goto out; |
|
|
|
ctrl0 = data->suspend_ctrl & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK; |
|
ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0); |
|
if (ret) |
|
goto out; |
|
|
|
ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0); |
|
|
|
out: |
|
mutex_unlock(&data->mutex); |
|
return ret; |
|
} |
|
|
|
static int __maybe_unused sx9310_resume(struct device *dev) |
|
{ |
|
struct sx_common_data *data = iio_priv(dev_get_drvdata(dev)); |
|
int ret; |
|
|
|
mutex_lock(&data->mutex); |
|
ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1); |
|
if (ret) |
|
goto out; |
|
|
|
ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, |
|
data->suspend_ctrl); |
|
|
|
out: |
|
mutex_unlock(&data->mutex); |
|
if (ret) |
|
return ret; |
|
|
|
enable_irq(data->client->irq); |
|
return 0; |
|
} |
|
|
|
static SIMPLE_DEV_PM_OPS(sx9310_pm_ops, sx9310_suspend, sx9310_resume); |
|
|
|
static const struct acpi_device_id sx9310_acpi_match[] = { |
|
{ "STH9310", SX9310_WHOAMI_VALUE }, |
|
{ "STH9311", SX9311_WHOAMI_VALUE }, |
|
{} |
|
}; |
|
MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match); |
|
|
|
static const struct of_device_id sx9310_of_match[] = { |
|
{ .compatible = "semtech,sx9310", (void *)SX9310_WHOAMI_VALUE }, |
|
{ .compatible = "semtech,sx9311", (void *)SX9311_WHOAMI_VALUE }, |
|
{} |
|
}; |
|
MODULE_DEVICE_TABLE(of, sx9310_of_match); |
|
|
|
static const struct i2c_device_id sx9310_id[] = { |
|
{ "sx9310", SX9310_WHOAMI_VALUE }, |
|
{ "sx9311", SX9311_WHOAMI_VALUE }, |
|
{} |
|
}; |
|
MODULE_DEVICE_TABLE(i2c, sx9310_id); |
|
|
|
static struct i2c_driver sx9310_driver = { |
|
.driver = { |
|
.name = "sx9310", |
|
.acpi_match_table = sx9310_acpi_match, |
|
.of_match_table = sx9310_of_match, |
|
.pm = &sx9310_pm_ops, |
|
|
|
/* |
|
* Lots of i2c transfers in probe + over 200 ms waiting in |
|
* sx9310_init_compensation() mean a slow probe; prefer async |
|
* so we don't delay boot if we're builtin to the kernel. |
|
*/ |
|
.probe_type = PROBE_PREFER_ASYNCHRONOUS, |
|
}, |
|
.probe_new = sx9310_probe, |
|
.id_table = sx9310_id, |
|
}; |
|
module_i2c_driver(sx9310_driver); |
|
|
|
MODULE_AUTHOR("Gwendal Grignou <[email protected]>"); |
|
MODULE_AUTHOR("Daniel Campello <[email protected]>"); |
|
MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor"); |
|
MODULE_LICENSE("GPL v2"); |
|
MODULE_IMPORT_NS(SEMTECH_PROX);
|
|
|