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695 lines
16 KiB
695 lines
16 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* An i2c driver for the Xicor/Intersil X1205 RTC |
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* Copyright 2004 Karen Spearel |
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* Copyright 2005 Alessandro Zummo |
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* |
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* please send all reports to: |
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* Karen Spearel <kas111 at gmail dot com> |
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* Alessandro Zummo <[email protected]> |
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* |
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* based on a lot of other RTC drivers. |
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* |
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* Information and datasheet: |
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* http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html |
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*/ |
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|
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#include <linux/i2c.h> |
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#include <linux/bcd.h> |
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#include <linux/rtc.h> |
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#include <linux/delay.h> |
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#include <linux/module.h> |
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#include <linux/bitops.h> |
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|
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/* offsets into CCR area */ |
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|
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#define CCR_SEC 0 |
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#define CCR_MIN 1 |
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#define CCR_HOUR 2 |
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#define CCR_MDAY 3 |
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#define CCR_MONTH 4 |
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#define CCR_YEAR 5 |
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#define CCR_WDAY 6 |
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#define CCR_Y2K 7 |
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#define X1205_REG_SR 0x3F /* status register */ |
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#define X1205_REG_Y2K 0x37 |
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#define X1205_REG_DW 0x36 |
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#define X1205_REG_YR 0x35 |
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#define X1205_REG_MO 0x34 |
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#define X1205_REG_DT 0x33 |
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#define X1205_REG_HR 0x32 |
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#define X1205_REG_MN 0x31 |
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#define X1205_REG_SC 0x30 |
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#define X1205_REG_DTR 0x13 |
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#define X1205_REG_ATR 0x12 |
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#define X1205_REG_INT 0x11 |
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#define X1205_REG_0 0x10 |
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#define X1205_REG_Y2K1 0x0F |
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#define X1205_REG_DWA1 0x0E |
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#define X1205_REG_YRA1 0x0D |
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#define X1205_REG_MOA1 0x0C |
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#define X1205_REG_DTA1 0x0B |
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#define X1205_REG_HRA1 0x0A |
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#define X1205_REG_MNA1 0x09 |
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#define X1205_REG_SCA1 0x08 |
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#define X1205_REG_Y2K0 0x07 |
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#define X1205_REG_DWA0 0x06 |
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#define X1205_REG_YRA0 0x05 |
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#define X1205_REG_MOA0 0x04 |
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#define X1205_REG_DTA0 0x03 |
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#define X1205_REG_HRA0 0x02 |
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#define X1205_REG_MNA0 0x01 |
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#define X1205_REG_SCA0 0x00 |
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#define X1205_CCR_BASE 0x30 /* Base address of CCR */ |
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#define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */ |
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#define X1205_SR_RTCF 0x01 /* Clock failure */ |
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#define X1205_SR_WEL 0x02 /* Write Enable Latch */ |
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#define X1205_SR_RWEL 0x04 /* Register Write Enable */ |
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#define X1205_SR_AL0 0x20 /* Alarm 0 match */ |
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#define X1205_DTR_DTR0 0x01 |
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#define X1205_DTR_DTR1 0x02 |
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#define X1205_DTR_DTR2 0x04 |
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#define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */ |
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#define X1205_INT_AL0E 0x20 /* Alarm 0 enable */ |
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static struct i2c_driver x1205_driver; |
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/* |
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* In the routines that deal directly with the x1205 hardware, we use |
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* rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch |
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* Epoch is initialized as 2000. Time is set to UTC. |
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*/ |
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static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm, |
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unsigned char reg_base) |
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{ |
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unsigned char dt_addr[2] = { 0, reg_base }; |
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unsigned char buf[8]; |
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int i; |
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struct i2c_msg msgs[] = { |
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{/* setup read ptr */ |
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.addr = client->addr, |
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.len = 2, |
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.buf = dt_addr |
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}, |
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{/* read date */ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 8, |
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.buf = buf |
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}, |
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}; |
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/* read date registers */ |
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { |
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dev_err(&client->dev, "%s: read error\n", __func__); |
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return -EIO; |
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} |
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dev_dbg(&client->dev, |
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"%s: raw read data - sec=%02x, min=%02x, hr=%02x, " |
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"mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", |
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__func__, |
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buf[0], buf[1], buf[2], buf[3], |
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buf[4], buf[5], buf[6], buf[7]); |
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/* Mask out the enable bits if these are alarm registers */ |
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if (reg_base < X1205_CCR_BASE) |
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for (i = 0; i <= 4; i++) |
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buf[i] &= 0x7F; |
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tm->tm_sec = bcd2bin(buf[CCR_SEC]); |
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tm->tm_min = bcd2bin(buf[CCR_MIN]); |
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tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ |
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tm->tm_mday = bcd2bin(buf[CCR_MDAY]); |
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tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */ |
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tm->tm_year = bcd2bin(buf[CCR_YEAR]) |
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+ (bcd2bin(buf[CCR_Y2K]) * 100) - 1900; |
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tm->tm_wday = buf[CCR_WDAY]; |
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dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " |
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"mday=%d, mon=%d, year=%d, wday=%d\n", |
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__func__, |
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tm->tm_sec, tm->tm_min, tm->tm_hour, |
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tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); |
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return 0; |
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} |
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static int x1205_get_status(struct i2c_client *client, unsigned char *sr) |
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{ |
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static unsigned char sr_addr[2] = { 0, X1205_REG_SR }; |
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struct i2c_msg msgs[] = { |
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{ /* setup read ptr */ |
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.addr = client->addr, |
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.len = 2, |
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.buf = sr_addr |
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}, |
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{ /* read status */ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 1, |
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.buf = sr |
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}, |
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}; |
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/* read status register */ |
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { |
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dev_err(&client->dev, "%s: read error\n", __func__); |
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return -EIO; |
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} |
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return 0; |
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} |
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static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm, |
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u8 reg_base, unsigned char alm_enable) |
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{ |
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int i, xfer; |
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unsigned char rdata[10] = { 0, reg_base }; |
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unsigned char *buf = rdata + 2; |
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static const unsigned char wel[3] = { 0, X1205_REG_SR, |
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X1205_SR_WEL }; |
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static const unsigned char rwel[3] = { 0, X1205_REG_SR, |
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X1205_SR_WEL | X1205_SR_RWEL }; |
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static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 }; |
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dev_dbg(&client->dev, |
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"%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n", |
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__func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday, |
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tm->tm_mon, tm->tm_year, tm->tm_wday); |
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buf[CCR_SEC] = bin2bcd(tm->tm_sec); |
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buf[CCR_MIN] = bin2bcd(tm->tm_min); |
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/* set hour and 24hr bit */ |
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buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL; |
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buf[CCR_MDAY] = bin2bcd(tm->tm_mday); |
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/* month, 1 - 12 */ |
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buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1); |
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/* year, since the rtc epoch*/ |
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buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100); |
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buf[CCR_WDAY] = tm->tm_wday & 0x07; |
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buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100); |
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/* If writing alarm registers, set compare bits on registers 0-4 */ |
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if (reg_base < X1205_CCR_BASE) |
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for (i = 0; i <= 4; i++) |
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buf[i] |= 0x80; |
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/* this sequence is required to unlock the chip */ |
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xfer = i2c_master_send(client, wel, 3); |
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if (xfer != 3) { |
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dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer); |
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return -EIO; |
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} |
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xfer = i2c_master_send(client, rwel, 3); |
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if (xfer != 3) { |
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dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer); |
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return -EIO; |
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} |
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xfer = i2c_master_send(client, rdata, sizeof(rdata)); |
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if (xfer != sizeof(rdata)) { |
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dev_err(&client->dev, |
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"%s: result=%d addr=%02x, data=%02x\n", |
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__func__, |
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xfer, rdata[1], rdata[2]); |
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return -EIO; |
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} |
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/* If we wrote to the nonvolatile region, wait 10msec for write cycle*/ |
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if (reg_base < X1205_CCR_BASE) { |
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unsigned char al0e[3] = { 0, X1205_REG_INT, 0 }; |
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msleep(10); |
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/* ...and set or clear the AL0E bit in the INT register */ |
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/* Need to set RWEL again as the write has cleared it */ |
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xfer = i2c_master_send(client, rwel, 3); |
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if (xfer != 3) { |
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dev_err(&client->dev, |
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"%s: aloe rwel - %d\n", |
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__func__, |
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xfer); |
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return -EIO; |
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} |
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if (alm_enable) |
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al0e[2] = X1205_INT_AL0E; |
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xfer = i2c_master_send(client, al0e, 3); |
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if (xfer != 3) { |
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dev_err(&client->dev, |
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"%s: al0e - %d\n", |
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__func__, |
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xfer); |
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return -EIO; |
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} |
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/* and wait 10msec again for this write to complete */ |
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msleep(10); |
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} |
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/* disable further writes */ |
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xfer = i2c_master_send(client, diswe, 3); |
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if (xfer != 3) { |
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dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer); |
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return -EIO; |
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} |
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return 0; |
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} |
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static int x1205_fix_osc(struct i2c_client *client) |
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{ |
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int err; |
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struct rtc_time tm; |
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memset(&tm, 0, sizeof(tm)); |
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err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0); |
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if (err < 0) |
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dev_err(&client->dev, "unable to restart the oscillator\n"); |
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return err; |
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} |
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static int x1205_get_dtrim(struct i2c_client *client, int *trim) |
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{ |
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unsigned char dtr; |
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static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR }; |
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struct i2c_msg msgs[] = { |
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{ /* setup read ptr */ |
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.addr = client->addr, |
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.len = 2, |
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.buf = dtr_addr |
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}, |
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{ /* read dtr */ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 1, |
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.buf = &dtr |
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}, |
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}; |
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/* read dtr register */ |
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { |
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dev_err(&client->dev, "%s: read error\n", __func__); |
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return -EIO; |
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} |
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dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr); |
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*trim = 0; |
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if (dtr & X1205_DTR_DTR0) |
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*trim += 20; |
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if (dtr & X1205_DTR_DTR1) |
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*trim += 10; |
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if (dtr & X1205_DTR_DTR2) |
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*trim = -*trim; |
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return 0; |
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} |
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static int x1205_get_atrim(struct i2c_client *client, int *trim) |
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{ |
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s8 atr; |
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static unsigned char atr_addr[2] = { 0, X1205_REG_ATR }; |
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struct i2c_msg msgs[] = { |
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{/* setup read ptr */ |
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.addr = client->addr, |
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.len = 2, |
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.buf = atr_addr |
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}, |
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{/* read atr */ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 1, |
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.buf = &atr |
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}, |
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}; |
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/* read atr register */ |
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { |
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dev_err(&client->dev, "%s: read error\n", __func__); |
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return -EIO; |
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} |
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dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr); |
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/* atr is a two's complement value on 6 bits, |
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* perform sign extension. The formula is |
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* Catr = (atr * 0.25pF) + 11.00pF. |
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*/ |
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atr = sign_extend32(atr, 5); |
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dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr); |
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*trim = (atr * 250) + 11000; |
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dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim); |
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return 0; |
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} |
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struct x1205_limit { |
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unsigned char reg, mask, min, max; |
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}; |
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static int x1205_validate_client(struct i2c_client *client) |
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{ |
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int i, xfer; |
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/* Probe array. We will read the register at the specified |
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* address and check if the given bits are zero. |
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*/ |
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static const unsigned char probe_zero_pattern[] = { |
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/* register, mask */ |
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X1205_REG_SR, 0x18, |
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X1205_REG_DTR, 0xF8, |
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X1205_REG_ATR, 0xC0, |
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X1205_REG_INT, 0x18, |
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X1205_REG_0, 0xFF, |
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}; |
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static const struct x1205_limit probe_limits_pattern[] = { |
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/* register, mask, min, max */ |
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{ X1205_REG_Y2K, 0xFF, 19, 20 }, |
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{ X1205_REG_DW, 0xFF, 0, 6 }, |
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{ X1205_REG_YR, 0xFF, 0, 99 }, |
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{ X1205_REG_MO, 0xFF, 0, 12 }, |
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{ X1205_REG_DT, 0xFF, 0, 31 }, |
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{ X1205_REG_HR, 0x7F, 0, 23 }, |
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{ X1205_REG_MN, 0xFF, 0, 59 }, |
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{ X1205_REG_SC, 0xFF, 0, 59 }, |
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{ X1205_REG_Y2K1, 0xFF, 19, 20 }, |
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{ X1205_REG_Y2K0, 0xFF, 19, 20 }, |
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}; |
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/* check that registers have bits a 0 where expected */ |
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for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) { |
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unsigned char buf; |
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unsigned char addr[2] = { 0, probe_zero_pattern[i] }; |
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struct i2c_msg msgs[2] = { |
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{ |
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.addr = client->addr, |
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.len = 2, |
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.buf = addr |
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}, |
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{ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 1, |
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.buf = &buf |
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}, |
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}; |
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xfer = i2c_transfer(client->adapter, msgs, 2); |
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if (xfer != 2) { |
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dev_err(&client->dev, |
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"%s: could not read register %x\n", |
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__func__, probe_zero_pattern[i]); |
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return -EIO; |
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} |
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if ((buf & probe_zero_pattern[i+1]) != 0) { |
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dev_err(&client->dev, |
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"%s: register=%02x, zero pattern=%d, value=%x\n", |
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__func__, probe_zero_pattern[i], i, buf); |
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return -ENODEV; |
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} |
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} |
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/* check limits (only registers with bcd values) */ |
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for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) { |
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unsigned char reg, value; |
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unsigned char addr[2] = { 0, probe_limits_pattern[i].reg }; |
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struct i2c_msg msgs[2] = { |
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{ |
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.addr = client->addr, |
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.len = 2, |
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.buf = addr |
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}, |
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{ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 1, |
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.buf = ® |
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}, |
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}; |
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xfer = i2c_transfer(client->adapter, msgs, 2); |
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if (xfer != 2) { |
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dev_err(&client->dev, |
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"%s: could not read register %x\n", |
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__func__, probe_limits_pattern[i].reg); |
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return -EIO; |
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} |
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value = bcd2bin(reg & probe_limits_pattern[i].mask); |
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if (value > probe_limits_pattern[i].max || |
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value < probe_limits_pattern[i].min) { |
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dev_dbg(&client->dev, |
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"%s: register=%x, lim pattern=%d, value=%d\n", |
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__func__, probe_limits_pattern[i].reg, |
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i, value); |
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return -ENODEV; |
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} |
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} |
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return 0; |
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} |
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static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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int err; |
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unsigned char intreg, status; |
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static unsigned char int_addr[2] = { 0, X1205_REG_INT }; |
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struct i2c_client *client = to_i2c_client(dev); |
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struct i2c_msg msgs[] = { |
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{ /* setup read ptr */ |
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.addr = client->addr, |
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.len = 2, |
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.buf = int_addr |
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}, |
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{/* read INT register */ |
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.addr = client->addr, |
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.flags = I2C_M_RD, |
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.len = 1, |
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.buf = &intreg |
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}, |
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}; |
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|
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/* read interrupt register and status register */ |
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if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { |
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dev_err(&client->dev, "%s: read error\n", __func__); |
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return -EIO; |
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} |
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err = x1205_get_status(client, &status); |
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if (err == 0) { |
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alrm->pending = (status & X1205_SR_AL0) ? 1 : 0; |
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alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0; |
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err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE); |
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} |
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return err; |
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} |
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static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) |
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{ |
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return x1205_set_datetime(to_i2c_client(dev), |
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&alrm->time, X1205_ALM0_BASE, alrm->enabled); |
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} |
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static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm) |
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{ |
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return x1205_get_datetime(to_i2c_client(dev), |
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tm, X1205_CCR_BASE); |
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} |
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|
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static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm) |
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{ |
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return x1205_set_datetime(to_i2c_client(dev), |
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tm, X1205_CCR_BASE, 0); |
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} |
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|
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static int x1205_rtc_proc(struct device *dev, struct seq_file *seq) |
|
{ |
|
int err, dtrim, atrim; |
|
|
|
err = x1205_get_dtrim(to_i2c_client(dev), &dtrim); |
|
if (!err) |
|
seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim); |
|
|
|
err = x1205_get_atrim(to_i2c_client(dev), &atrim); |
|
if (!err) |
|
seq_printf(seq, "analog_trim\t: %d.%02d pF\n", |
|
atrim / 1000, atrim % 1000); |
|
return 0; |
|
} |
|
|
|
static const struct rtc_class_ops x1205_rtc_ops = { |
|
.proc = x1205_rtc_proc, |
|
.read_time = x1205_rtc_read_time, |
|
.set_time = x1205_rtc_set_time, |
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.read_alarm = x1205_rtc_read_alarm, |
|
.set_alarm = x1205_rtc_set_alarm, |
|
}; |
|
|
|
static ssize_t x1205_sysfs_show_atrim(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
int err, atrim; |
|
|
|
err = x1205_get_atrim(to_i2c_client(dev), &atrim); |
|
if (err) |
|
return err; |
|
|
|
return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000); |
|
} |
|
static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL); |
|
|
|
static ssize_t x1205_sysfs_show_dtrim(struct device *dev, |
|
struct device_attribute *attr, char *buf) |
|
{ |
|
int err, dtrim; |
|
|
|
err = x1205_get_dtrim(to_i2c_client(dev), &dtrim); |
|
if (err) |
|
return err; |
|
|
|
return sprintf(buf, "%d ppm\n", dtrim); |
|
} |
|
static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL); |
|
|
|
static int x1205_sysfs_register(struct device *dev) |
|
{ |
|
int err; |
|
|
|
err = device_create_file(dev, &dev_attr_atrim); |
|
if (err) |
|
return err; |
|
|
|
err = device_create_file(dev, &dev_attr_dtrim); |
|
if (err) |
|
device_remove_file(dev, &dev_attr_atrim); |
|
|
|
return err; |
|
} |
|
|
|
static void x1205_sysfs_unregister(struct device *dev) |
|
{ |
|
device_remove_file(dev, &dev_attr_atrim); |
|
device_remove_file(dev, &dev_attr_dtrim); |
|
} |
|
|
|
|
|
static int x1205_probe(struct i2c_client *client, |
|
const struct i2c_device_id *id) |
|
{ |
|
int err = 0; |
|
unsigned char sr; |
|
struct rtc_device *rtc; |
|
|
|
dev_dbg(&client->dev, "%s\n", __func__); |
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) |
|
return -ENODEV; |
|
|
|
if (x1205_validate_client(client) < 0) |
|
return -ENODEV; |
|
|
|
rtc = devm_rtc_device_register(&client->dev, x1205_driver.driver.name, |
|
&x1205_rtc_ops, THIS_MODULE); |
|
|
|
if (IS_ERR(rtc)) |
|
return PTR_ERR(rtc); |
|
|
|
i2c_set_clientdata(client, rtc); |
|
|
|
/* Check for power failures and eventually enable the osc */ |
|
err = x1205_get_status(client, &sr); |
|
if (!err) { |
|
if (sr & X1205_SR_RTCF) { |
|
dev_err(&client->dev, |
|
"power failure detected, " |
|
"please set the clock\n"); |
|
udelay(50); |
|
x1205_fix_osc(client); |
|
} |
|
} else { |
|
dev_err(&client->dev, "couldn't read status\n"); |
|
} |
|
|
|
err = x1205_sysfs_register(&client->dev); |
|
if (err) |
|
dev_err(&client->dev, "Unable to create sysfs entries\n"); |
|
|
|
return 0; |
|
} |
|
|
|
static int x1205_remove(struct i2c_client *client) |
|
{ |
|
x1205_sysfs_unregister(&client->dev); |
|
return 0; |
|
} |
|
|
|
static const struct i2c_device_id x1205_id[] = { |
|
{ "x1205", 0 }, |
|
{ } |
|
}; |
|
MODULE_DEVICE_TABLE(i2c, x1205_id); |
|
|
|
static const struct of_device_id x1205_dt_ids[] = { |
|
{ .compatible = "xircom,x1205", }, |
|
{}, |
|
}; |
|
MODULE_DEVICE_TABLE(of, x1205_dt_ids); |
|
|
|
static struct i2c_driver x1205_driver = { |
|
.driver = { |
|
.name = "rtc-x1205", |
|
.of_match_table = x1205_dt_ids, |
|
}, |
|
.probe = x1205_probe, |
|
.remove = x1205_remove, |
|
.id_table = x1205_id, |
|
}; |
|
|
|
module_i2c_driver(x1205_driver); |
|
|
|
MODULE_AUTHOR( |
|
"Karen Spearel <kas111 at gmail dot com>, " |
|
"Alessandro Zummo <[email protected]>"); |
|
MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver"); |
|
MODULE_LICENSE("GPL");
|
|
|