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499 lines
14 KiB
499 lines
14 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* gpio-max3191x.c - GPIO driver for Maxim MAX3191x industrial serializer |
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* |
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* Copyright (C) 2017 KUNBUS GmbH |
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* |
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* The MAX3191x makes 8 digital 24V inputs available via SPI. |
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* Multiple chips can be daisy-chained, the spec does not impose |
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* a limit on the number of chips and neither does this driver. |
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* |
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* Either of two modes is selectable: In 8-bit mode, only the state |
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* of the inputs is clocked out to achieve high readout speeds; |
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* In 16-bit mode, an additional status byte is clocked out with |
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* a CRC and indicator bits for undervoltage and overtemperature. |
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* The driver returns an error instead of potentially bogus data |
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* if any of these fault conditions occur. However it does allow |
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* readout of non-faulting chips in the same daisy-chain. |
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* |
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* MAX3191x supports four debounce settings and the driver is |
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* capable of configuring these differently for each chip in the |
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* daisy-chain. |
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* |
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* If the chips are hardwired to 8-bit mode ("modesel" pulled high), |
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* gpio-pisosr.c can be used alternatively to this driver. |
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* |
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* https://datasheets.maximintegrated.com/en/ds/MAX31910.pdf |
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* https://datasheets.maximintegrated.com/en/ds/MAX31911.pdf |
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* https://datasheets.maximintegrated.com/en/ds/MAX31912.pdf |
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* https://datasheets.maximintegrated.com/en/ds/MAX31913.pdf |
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* https://datasheets.maximintegrated.com/en/ds/MAX31953-MAX31963.pdf |
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*/ |
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#include <linux/bitmap.h> |
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#include <linux/bitops.h> |
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#include <linux/crc8.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/gpio/driver.h> |
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#include <linux/module.h> |
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#include <linux/spi/spi.h> |
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enum max3191x_mode { |
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STATUS_BYTE_ENABLED, |
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STATUS_BYTE_DISABLED, |
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}; |
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|
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/** |
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* struct max3191x_chip - max3191x daisy-chain |
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* @gpio: GPIO controller struct |
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* @lock: protects read sequences |
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* @nchips: number of chips in the daisy-chain |
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* @mode: current mode, 0 for 16-bit, 1 for 8-bit; |
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* for simplicity, all chips in the daisy-chain are assumed |
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* to use the same mode |
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* @modesel_pins: GPIO pins to configure modesel of each chip |
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* @fault_pins: GPIO pins to detect fault of each chip |
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* @db0_pins: GPIO pins to configure debounce of each chip |
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* @db1_pins: GPIO pins to configure debounce of each chip |
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* @mesg: SPI message to perform a readout |
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* @xfer: SPI transfer used by @mesg |
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* @crc_error: bitmap signaling CRC error for each chip |
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* @overtemp: bitmap signaling overtemperature alarm for each chip |
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* @undervolt1: bitmap signaling undervoltage alarm for each chip |
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* @undervolt2: bitmap signaling undervoltage warning for each chip |
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* @fault: bitmap signaling assertion of @fault_pins for each chip |
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* @ignore_uv: whether to ignore undervoltage alarms; |
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* set by a device property if the chips are powered through |
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* 5VOUT instead of VCC24V, in which case they will constantly |
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* signal undervoltage; |
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* for simplicity, all chips in the daisy-chain are assumed |
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* to be powered the same way |
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*/ |
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struct max3191x_chip { |
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struct gpio_chip gpio; |
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struct mutex lock; |
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u32 nchips; |
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enum max3191x_mode mode; |
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struct gpio_descs *modesel_pins; |
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struct gpio_descs *fault_pins; |
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struct gpio_descs *db0_pins; |
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struct gpio_descs *db1_pins; |
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struct spi_message mesg; |
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struct spi_transfer xfer; |
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unsigned long *crc_error; |
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unsigned long *overtemp; |
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unsigned long *undervolt1; |
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unsigned long *undervolt2; |
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unsigned long *fault; |
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bool ignore_uv; |
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}; |
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#define MAX3191X_NGPIO 8 |
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#define MAX3191X_CRC8_POLYNOMIAL 0xa8 /* (x^5) + x^4 + x^2 + x^0 */ |
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DECLARE_CRC8_TABLE(max3191x_crc8); |
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static int max3191x_get_direction(struct gpio_chip *gpio, unsigned int offset) |
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{ |
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return GPIO_LINE_DIRECTION_IN; /* always in */ |
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} |
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static int max3191x_direction_input(struct gpio_chip *gpio, unsigned int offset) |
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{ |
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return 0; |
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} |
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static int max3191x_direction_output(struct gpio_chip *gpio, |
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unsigned int offset, int value) |
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{ |
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return -EINVAL; |
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} |
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static void max3191x_set(struct gpio_chip *gpio, unsigned int offset, int value) |
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{ } |
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static void max3191x_set_multiple(struct gpio_chip *gpio, unsigned long *mask, |
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unsigned long *bits) |
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{ } |
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static unsigned int max3191x_wordlen(struct max3191x_chip *max3191x) |
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{ |
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return max3191x->mode == STATUS_BYTE_ENABLED ? 2 : 1; |
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} |
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static int max3191x_readout_locked(struct max3191x_chip *max3191x) |
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{ |
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struct device *dev = max3191x->gpio.parent; |
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struct spi_device *spi = to_spi_device(dev); |
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int val, i, ot = 0, uv1 = 0; |
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val = spi_sync(spi, &max3191x->mesg); |
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if (val) { |
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dev_err_ratelimited(dev, "SPI receive error %d\n", val); |
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return val; |
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} |
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for (i = 0; i < max3191x->nchips; i++) { |
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if (max3191x->mode == STATUS_BYTE_ENABLED) { |
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u8 in = ((u8 *)max3191x->xfer.rx_buf)[i * 2]; |
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u8 status = ((u8 *)max3191x->xfer.rx_buf)[i * 2 + 1]; |
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val = (status & 0xf8) != crc8(max3191x_crc8, &in, 1, 0); |
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__assign_bit(i, max3191x->crc_error, val); |
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if (val) |
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dev_err_ratelimited(dev, |
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"chip %d: CRC error\n", i); |
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ot = (status >> 1) & 1; |
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__assign_bit(i, max3191x->overtemp, ot); |
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if (ot) |
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dev_err_ratelimited(dev, |
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"chip %d: overtemperature\n", i); |
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if (!max3191x->ignore_uv) { |
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uv1 = !((status >> 2) & 1); |
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__assign_bit(i, max3191x->undervolt1, uv1); |
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if (uv1) |
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dev_err_ratelimited(dev, |
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"chip %d: undervoltage\n", i); |
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val = !(status & 1); |
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__assign_bit(i, max3191x->undervolt2, val); |
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if (val && !uv1) |
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dev_warn_ratelimited(dev, |
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"chip %d: voltage warn\n", i); |
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} |
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} |
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if (max3191x->fault_pins && !max3191x->ignore_uv) { |
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/* fault pin shared by all chips or per chip */ |
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struct gpio_desc *fault_pin = |
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(max3191x->fault_pins->ndescs == 1) |
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? max3191x->fault_pins->desc[0] |
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: max3191x->fault_pins->desc[i]; |
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val = gpiod_get_value_cansleep(fault_pin); |
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if (val < 0) { |
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dev_err_ratelimited(dev, |
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"GPIO read error %d\n", val); |
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return val; |
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} |
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__assign_bit(i, max3191x->fault, val); |
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if (val && !uv1 && !ot) |
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dev_err_ratelimited(dev, |
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"chip %d: fault\n", i); |
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} |
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} |
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return 0; |
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} |
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static bool max3191x_chip_is_faulting(struct max3191x_chip *max3191x, |
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unsigned int chipnum) |
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{ |
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/* without status byte the only diagnostic is the fault pin */ |
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if (!max3191x->ignore_uv && test_bit(chipnum, max3191x->fault)) |
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return true; |
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if (max3191x->mode == STATUS_BYTE_DISABLED) |
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return false; |
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return test_bit(chipnum, max3191x->crc_error) || |
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test_bit(chipnum, max3191x->overtemp) || |
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(!max3191x->ignore_uv && |
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test_bit(chipnum, max3191x->undervolt1)); |
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} |
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static int max3191x_get(struct gpio_chip *gpio, unsigned int offset) |
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{ |
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struct max3191x_chip *max3191x = gpiochip_get_data(gpio); |
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int ret, chipnum, wordlen = max3191x_wordlen(max3191x); |
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u8 in; |
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mutex_lock(&max3191x->lock); |
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ret = max3191x_readout_locked(max3191x); |
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if (ret) |
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goto out_unlock; |
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chipnum = offset / MAX3191X_NGPIO; |
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if (max3191x_chip_is_faulting(max3191x, chipnum)) { |
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ret = -EIO; |
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goto out_unlock; |
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} |
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in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen]; |
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ret = (in >> (offset % MAX3191X_NGPIO)) & 1; |
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out_unlock: |
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mutex_unlock(&max3191x->lock); |
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return ret; |
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} |
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static int max3191x_get_multiple(struct gpio_chip *gpio, unsigned long *mask, |
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unsigned long *bits) |
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{ |
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struct max3191x_chip *max3191x = gpiochip_get_data(gpio); |
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const unsigned int wordlen = max3191x_wordlen(max3191x); |
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int ret; |
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unsigned long bit; |
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unsigned long gpio_mask; |
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unsigned long in; |
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mutex_lock(&max3191x->lock); |
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ret = max3191x_readout_locked(max3191x); |
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if (ret) |
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goto out_unlock; |
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bitmap_zero(bits, gpio->ngpio); |
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for_each_set_clump8(bit, gpio_mask, mask, gpio->ngpio) { |
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unsigned int chipnum = bit / MAX3191X_NGPIO; |
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if (max3191x_chip_is_faulting(max3191x, chipnum)) { |
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ret = -EIO; |
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goto out_unlock; |
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} |
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in = ((u8 *)max3191x->xfer.rx_buf)[chipnum * wordlen]; |
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in &= gpio_mask; |
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bitmap_set_value8(bits, in, bit); |
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} |
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out_unlock: |
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mutex_unlock(&max3191x->lock); |
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return ret; |
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} |
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static int max3191x_set_config(struct gpio_chip *gpio, unsigned int offset, |
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unsigned long config) |
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{ |
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struct max3191x_chip *max3191x = gpiochip_get_data(gpio); |
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u32 debounce, chipnum, db0_val, db1_val; |
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if (pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE) |
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return -ENOTSUPP; |
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if (!max3191x->db0_pins || !max3191x->db1_pins) |
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return -EINVAL; |
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debounce = pinconf_to_config_argument(config); |
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switch (debounce) { |
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case 0: |
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db0_val = 0; |
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db1_val = 0; |
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break; |
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case 1 ... 25: |
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db0_val = 0; |
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db1_val = 1; |
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break; |
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case 26 ... 750: |
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db0_val = 1; |
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db1_val = 0; |
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break; |
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case 751 ... 3000: |
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db0_val = 1; |
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db1_val = 1; |
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break; |
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default: |
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return -EINVAL; |
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} |
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if (max3191x->db0_pins->ndescs == 1) |
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chipnum = 0; /* all chips use the same pair of debounce pins */ |
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else |
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chipnum = offset / MAX3191X_NGPIO; /* per chip debounce pins */ |
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mutex_lock(&max3191x->lock); |
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gpiod_set_value_cansleep(max3191x->db0_pins->desc[chipnum], db0_val); |
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gpiod_set_value_cansleep(max3191x->db1_pins->desc[chipnum], db1_val); |
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mutex_unlock(&max3191x->lock); |
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return 0; |
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} |
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static void gpiod_set_array_single_value_cansleep(unsigned int ndescs, |
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struct gpio_desc **desc, |
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struct gpio_array *info, |
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int value) |
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{ |
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unsigned long *values; |
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values = bitmap_alloc(ndescs, GFP_KERNEL); |
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if (!values) |
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return; |
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if (value) |
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bitmap_fill(values, ndescs); |
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else |
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bitmap_zero(values, ndescs); |
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gpiod_set_array_value_cansleep(ndescs, desc, info, values); |
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bitmap_free(values); |
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} |
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static struct gpio_descs *devm_gpiod_get_array_optional_count( |
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struct device *dev, const char *con_id, |
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enum gpiod_flags flags, unsigned int expected) |
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{ |
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struct gpio_descs *descs; |
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int found = gpiod_count(dev, con_id); |
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if (found == -ENOENT) |
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return NULL; |
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if (found != expected && found != 1) { |
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dev_err(dev, "ignoring %s-gpios: found %d, expected %u or 1\n", |
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con_id, found, expected); |
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return NULL; |
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} |
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descs = devm_gpiod_get_array_optional(dev, con_id, flags); |
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if (IS_ERR(descs)) { |
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dev_err(dev, "failed to get %s-gpios: %ld\n", |
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con_id, PTR_ERR(descs)); |
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return NULL; |
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} |
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return descs; |
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} |
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static int max3191x_probe(struct spi_device *spi) |
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{ |
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struct device *dev = &spi->dev; |
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struct max3191x_chip *max3191x; |
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int n, ret; |
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max3191x = devm_kzalloc(dev, sizeof(*max3191x), GFP_KERNEL); |
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if (!max3191x) |
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return -ENOMEM; |
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spi_set_drvdata(spi, max3191x); |
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max3191x->nchips = 1; |
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device_property_read_u32(dev, "#daisy-chained-devices", |
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&max3191x->nchips); |
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n = BITS_TO_LONGS(max3191x->nchips); |
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max3191x->crc_error = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL); |
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max3191x->undervolt1 = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL); |
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max3191x->undervolt2 = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL); |
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max3191x->overtemp = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL); |
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max3191x->fault = devm_kcalloc(dev, n, sizeof(long), GFP_KERNEL); |
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max3191x->xfer.rx_buf = devm_kcalloc(dev, max3191x->nchips, |
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2, GFP_KERNEL); |
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if (!max3191x->crc_error || !max3191x->undervolt1 || |
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!max3191x->overtemp || !max3191x->undervolt2 || |
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!max3191x->fault || !max3191x->xfer.rx_buf) |
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return -ENOMEM; |
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max3191x->modesel_pins = devm_gpiod_get_array_optional_count(dev, |
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"maxim,modesel", GPIOD_ASIS, max3191x->nchips); |
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max3191x->fault_pins = devm_gpiod_get_array_optional_count(dev, |
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"maxim,fault", GPIOD_IN, max3191x->nchips); |
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max3191x->db0_pins = devm_gpiod_get_array_optional_count(dev, |
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"maxim,db0", GPIOD_OUT_LOW, max3191x->nchips); |
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max3191x->db1_pins = devm_gpiod_get_array_optional_count(dev, |
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"maxim,db1", GPIOD_OUT_LOW, max3191x->nchips); |
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max3191x->mode = device_property_read_bool(dev, "maxim,modesel-8bit") |
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? STATUS_BYTE_DISABLED : STATUS_BYTE_ENABLED; |
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if (max3191x->modesel_pins) |
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gpiod_set_array_single_value_cansleep( |
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max3191x->modesel_pins->ndescs, |
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max3191x->modesel_pins->desc, |
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max3191x->modesel_pins->info, max3191x->mode); |
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max3191x->ignore_uv = device_property_read_bool(dev, |
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"maxim,ignore-undervoltage"); |
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if (max3191x->db0_pins && max3191x->db1_pins && |
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max3191x->db0_pins->ndescs != max3191x->db1_pins->ndescs) { |
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dev_err(dev, "ignoring maxim,db*-gpios: array len mismatch\n"); |
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devm_gpiod_put_array(dev, max3191x->db0_pins); |
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devm_gpiod_put_array(dev, max3191x->db1_pins); |
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max3191x->db0_pins = NULL; |
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max3191x->db1_pins = NULL; |
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} |
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max3191x->xfer.len = max3191x->nchips * max3191x_wordlen(max3191x); |
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spi_message_init_with_transfers(&max3191x->mesg, &max3191x->xfer, 1); |
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max3191x->gpio.label = spi->modalias; |
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max3191x->gpio.owner = THIS_MODULE; |
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max3191x->gpio.parent = dev; |
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max3191x->gpio.base = -1; |
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max3191x->gpio.ngpio = max3191x->nchips * MAX3191X_NGPIO; |
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max3191x->gpio.can_sleep = true; |
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max3191x->gpio.get_direction = max3191x_get_direction; |
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max3191x->gpio.direction_input = max3191x_direction_input; |
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max3191x->gpio.direction_output = max3191x_direction_output; |
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max3191x->gpio.set = max3191x_set; |
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max3191x->gpio.set_multiple = max3191x_set_multiple; |
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max3191x->gpio.get = max3191x_get; |
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max3191x->gpio.get_multiple = max3191x_get_multiple; |
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max3191x->gpio.set_config = max3191x_set_config; |
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mutex_init(&max3191x->lock); |
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ret = gpiochip_add_data(&max3191x->gpio, max3191x); |
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if (ret) { |
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mutex_destroy(&max3191x->lock); |
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return ret; |
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} |
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return 0; |
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} |
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static int max3191x_remove(struct spi_device *spi) |
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{ |
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struct max3191x_chip *max3191x = spi_get_drvdata(spi); |
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gpiochip_remove(&max3191x->gpio); |
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mutex_destroy(&max3191x->lock); |
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return 0; |
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} |
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static int __init max3191x_register_driver(struct spi_driver *sdrv) |
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{ |
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crc8_populate_msb(max3191x_crc8, MAX3191X_CRC8_POLYNOMIAL); |
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return spi_register_driver(sdrv); |
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} |
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|
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#ifdef CONFIG_OF |
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static const struct of_device_id max3191x_of_id[] = { |
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{ .compatible = "maxim,max31910" }, |
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{ .compatible = "maxim,max31911" }, |
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{ .compatible = "maxim,max31912" }, |
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{ .compatible = "maxim,max31913" }, |
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{ .compatible = "maxim,max31953" }, |
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{ .compatible = "maxim,max31963" }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, max3191x_of_id); |
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#endif |
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static const struct spi_device_id max3191x_spi_id[] = { |
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{ "max31910" }, |
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{ "max31911" }, |
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{ "max31912" }, |
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{ "max31913" }, |
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{ "max31953" }, |
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{ "max31963" }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(spi, max3191x_spi_id); |
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|
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static struct spi_driver max3191x_driver = { |
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.driver = { |
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.name = "max3191x", |
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.of_match_table = of_match_ptr(max3191x_of_id), |
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}, |
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.probe = max3191x_probe, |
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.remove = max3191x_remove, |
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.id_table = max3191x_spi_id, |
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}; |
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module_driver(max3191x_driver, max3191x_register_driver, spi_unregister_driver); |
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|
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MODULE_AUTHOR("Lukas Wunner <[email protected]>"); |
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MODULE_DESCRIPTION("GPIO driver for Maxim MAX3191x industrial serializer"); |
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MODULE_LICENSE("GPL v2");
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