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a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
86 lines
1.7 KiB
YAML
86 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) bindings
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maintainers:
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- Christophe Kerello <christophe.kerello@foss.st.com>
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- Patrice Chotard <patrice.chotard@foss.st.com>
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allOf:
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- $ref: "spi-controller.yaml#"
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properties:
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compatible:
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const: st,stm32f469-qspi
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reg:
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items:
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- description: registers
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- description: memory mapping
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reg-names:
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items:
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- const: qspi
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- const: qspi_mm
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clocks:
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maxItems: 1
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interrupts:
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maxItems: 1
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resets:
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maxItems: 1
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dmas:
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items:
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- description: tx DMA channel
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- description: rx DMA channel
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dma-names:
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items:
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- const: tx
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- const: rx
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- interrupts
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/stm32mp1-clks.h>
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#include <dt-bindings/reset/stm32mp1-resets.h>
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spi@58003000 {
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compatible = "st,stm32f469-qspi";
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reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
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reg-names = "qspi", "qspi_mm";
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
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<&mdma1 22 0x10 0x100008 0x0 0x0>;
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dma-names = "tx", "rx";
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clocks = <&rcc QSPI_K>;
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resets = <&rcc QSPI_R>;
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#address-cells = <1>;
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#size-cells = <0>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <108000000>;
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};
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};
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...
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