mirror of
https://github.com/Qortal/Brooklyn.git
synced 2025-02-12 02:05:54 +00:00
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
25 lines
837 B
Plaintext
25 lines
837 B
Plaintext
QCOM Top Control and Status Register
|
|
|
|
Qualcomm devices have a set of registers that provide various control and status
|
|
functions for their peripherals. This node is intended to allow access to these
|
|
registers via syscon.
|
|
|
|
Required properties:
|
|
- compatible: Should contain:
|
|
"qcom,tcsr-ipq6018", "syscon", "simple-mfd" for IPQ6018
|
|
"qcom,tcsr-ipq8064", "syscon" for IPQ8064
|
|
"qcom,tcsr-apq8064", "syscon" for APQ8064
|
|
"qcom,tcsr-msm8660", "syscon" for MSM8660
|
|
"qcom,tcsr-msm8953", "syscon" for MSM8953
|
|
"qcom,tcsr-msm8960", "syscon" for MSM8960
|
|
"qcom,tcsr-msm8974", "syscon" for MSM8974
|
|
"qcom,tcsr-apq8084", "syscon" for APQ8084
|
|
"qcom,tcsr-msm8916", "syscon" for MSM8916
|
|
- reg: Address range for TCSR registers
|
|
|
|
Example:
|
|
tcsr: syscon@1a400000 {
|
|
compatible = "qcom,tcsr-msm8960", "syscon";
|
|
reg = <0x1a400000 0x100>;
|
|
};
|