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516 lines
17 KiB
516 lines
17 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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// |
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// SLG51000 High PSRR, Multi-Output Regulators |
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// Copyright (C) 2019 Dialog Semiconductor |
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// |
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// Author: Eric Jeong <[email protected]> |
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#include <linux/err.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/i2c.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/irq.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/regmap.h> |
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#include <linux/regulator/driver.h> |
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#include <linux/regulator/machine.h> |
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#include <linux/regulator/of_regulator.h> |
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#include "slg51000-regulator.h" |
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#define SLG51000_SCTL_EVT 7 |
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#define SLG51000_MAX_EVT_REGISTER 8 |
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#define SLG51000_LDOHP_LV_MIN 1200000 |
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#define SLG51000_LDOHP_HV_MIN 2400000 |
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enum slg51000_regulators { |
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SLG51000_REGULATOR_LDO1 = 0, |
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SLG51000_REGULATOR_LDO2, |
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SLG51000_REGULATOR_LDO3, |
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SLG51000_REGULATOR_LDO4, |
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SLG51000_REGULATOR_LDO5, |
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SLG51000_REGULATOR_LDO6, |
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SLG51000_REGULATOR_LDO7, |
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SLG51000_MAX_REGULATORS, |
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}; |
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struct slg51000 { |
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struct device *dev; |
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struct regmap *regmap; |
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struct regulator_desc *rdesc[SLG51000_MAX_REGULATORS]; |
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struct regulator_dev *rdev[SLG51000_MAX_REGULATORS]; |
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struct gpio_desc *cs_gpiod; |
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int chip_irq; |
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}; |
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struct slg51000_evt_sta { |
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unsigned int ereg; |
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unsigned int sreg; |
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}; |
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static const struct slg51000_evt_sta es_reg[SLG51000_MAX_EVT_REGISTER] = { |
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{SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS}, |
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{SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS}, |
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{SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS}, |
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{SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS}, |
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{SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS}, |
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{SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS}, |
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{SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS}, |
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{SLG51000_SYSCTL_EVENT, SLG51000_SYSCTL_STATUS}, |
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}; |
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static const struct regmap_range slg51000_writeable_ranges[] = { |
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regmap_reg_range(SLG51000_SYSCTL_MATRIX_CONF_A, |
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SLG51000_SYSCTL_MATRIX_CONF_A), |
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regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL), |
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regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV), |
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regmap_reg_range(SLG51000_LDO1_IRQ_MASK, SLG51000_LDO1_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL), |
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regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV), |
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regmap_reg_range(SLG51000_LDO2_IRQ_MASK, SLG51000_LDO2_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL), |
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regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV), |
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regmap_reg_range(SLG51000_LDO3_IRQ_MASK, SLG51000_LDO3_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL), |
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regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV), |
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regmap_reg_range(SLG51000_LDO4_IRQ_MASK, SLG51000_LDO4_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL), |
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regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV), |
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regmap_reg_range(SLG51000_LDO5_IRQ_MASK, SLG51000_LDO5_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL), |
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regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV), |
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regmap_reg_range(SLG51000_LDO6_IRQ_MASK, SLG51000_LDO6_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL), |
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regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV), |
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regmap_reg_range(SLG51000_LDO7_IRQ_MASK, SLG51000_LDO7_IRQ_MASK), |
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regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK), |
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}; |
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static const struct regmap_range slg51000_readable_ranges[] = { |
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regmap_reg_range(SLG51000_SYSCTL_PATN_ID_B0, |
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SLG51000_SYSCTL_PATN_ID_B2), |
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regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_A, |
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SLG51000_SYSCTL_SYS_CONF_A), |
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regmap_reg_range(SLG51000_SYSCTL_SYS_CONF_D, |
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SLG51000_SYSCTL_MATRIX_CONF_B), |
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regmap_reg_range(SLG51000_SYSCTL_REFGEN_CONF_C, |
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SLG51000_SYSCTL_UVLO_CONF_A), |
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regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_IRQ_MASK), |
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regmap_reg_range(SLG51000_IO_GPIO1_CONF, SLG51000_IO_GPIO_STATUS), |
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regmap_reg_range(SLG51000_LUTARRAY_LUT_VAL_0, |
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SLG51000_LUTARRAY_LUT_VAL_11), |
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regmap_reg_range(SLG51000_MUXARRAY_INPUT_SEL_0, |
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SLG51000_MUXARRAY_INPUT_SEL_63), |
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regmap_reg_range(SLG51000_PWRSEQ_RESOURCE_EN_0, |
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SLG51000_PWRSEQ_INPUT_SENSE_CONF_B), |
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regmap_reg_range(SLG51000_LDO1_VSEL, SLG51000_LDO1_VSEL), |
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regmap_reg_range(SLG51000_LDO1_MINV, SLG51000_LDO1_MAXV), |
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regmap_reg_range(SLG51000_LDO1_MISC1, SLG51000_LDO1_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO2_VSEL, SLG51000_LDO2_VSEL), |
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regmap_reg_range(SLG51000_LDO2_MINV, SLG51000_LDO2_MAXV), |
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regmap_reg_range(SLG51000_LDO2_MISC1, SLG51000_LDO2_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO3_VSEL, SLG51000_LDO3_VSEL), |
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regmap_reg_range(SLG51000_LDO3_MINV, SLG51000_LDO3_MAXV), |
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regmap_reg_range(SLG51000_LDO3_CONF1, SLG51000_LDO3_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO4_VSEL, SLG51000_LDO4_VSEL), |
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regmap_reg_range(SLG51000_LDO4_MINV, SLG51000_LDO4_MAXV), |
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regmap_reg_range(SLG51000_LDO4_CONF1, SLG51000_LDO4_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO5_VSEL, SLG51000_LDO5_VSEL), |
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regmap_reg_range(SLG51000_LDO5_MINV, SLG51000_LDO5_MAXV), |
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regmap_reg_range(SLG51000_LDO5_TRIM2, SLG51000_LDO5_TRIM2), |
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regmap_reg_range(SLG51000_LDO5_CONF1, SLG51000_LDO5_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO6_VSEL, SLG51000_LDO6_VSEL), |
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regmap_reg_range(SLG51000_LDO6_MINV, SLG51000_LDO6_MAXV), |
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regmap_reg_range(SLG51000_LDO6_TRIM2, SLG51000_LDO6_TRIM2), |
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regmap_reg_range(SLG51000_LDO6_CONF1, SLG51000_LDO6_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_IRQ_MASK), |
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regmap_reg_range(SLG51000_LDO7_VSEL, SLG51000_LDO7_VSEL), |
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regmap_reg_range(SLG51000_LDO7_MINV, SLG51000_LDO7_MAXV), |
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regmap_reg_range(SLG51000_LDO7_CONF1, SLG51000_LDO7_VSEL_ACTUAL), |
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regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_IRQ_MASK), |
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regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT), |
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regmap_reg_range(SLG51000_OTP_IRQ_MASK, SLG51000_OTP_IRQ_MASK), |
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regmap_reg_range(SLG51000_OTP_LOCK_OTP_PROG, SLG51000_OTP_LOCK_CTRL), |
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regmap_reg_range(SLG51000_LOCK_GLOBAL_LOCK_CTRL1, |
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SLG51000_LOCK_GLOBAL_LOCK_CTRL1), |
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}; |
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static const struct regmap_range slg51000_volatile_ranges[] = { |
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regmap_reg_range(SLG51000_SYSCTL_FAULT_LOG1, SLG51000_SYSCTL_STATUS), |
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regmap_reg_range(SLG51000_IO_GPIO_STATUS, SLG51000_IO_GPIO_STATUS), |
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regmap_reg_range(SLG51000_LDO1_EVENT, SLG51000_LDO1_STATUS), |
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regmap_reg_range(SLG51000_LDO2_EVENT, SLG51000_LDO2_STATUS), |
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regmap_reg_range(SLG51000_LDO3_EVENT, SLG51000_LDO3_STATUS), |
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regmap_reg_range(SLG51000_LDO4_EVENT, SLG51000_LDO4_STATUS), |
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regmap_reg_range(SLG51000_LDO5_EVENT, SLG51000_LDO5_STATUS), |
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regmap_reg_range(SLG51000_LDO6_EVENT, SLG51000_LDO6_STATUS), |
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regmap_reg_range(SLG51000_LDO7_EVENT, SLG51000_LDO7_STATUS), |
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regmap_reg_range(SLG51000_OTP_EVENT, SLG51000_OTP_EVENT), |
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}; |
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static const struct regmap_access_table slg51000_writeable_table = { |
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.yes_ranges = slg51000_writeable_ranges, |
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.n_yes_ranges = ARRAY_SIZE(slg51000_writeable_ranges), |
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}; |
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static const struct regmap_access_table slg51000_readable_table = { |
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.yes_ranges = slg51000_readable_ranges, |
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.n_yes_ranges = ARRAY_SIZE(slg51000_readable_ranges), |
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}; |
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static const struct regmap_access_table slg51000_volatile_table = { |
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.yes_ranges = slg51000_volatile_ranges, |
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.n_yes_ranges = ARRAY_SIZE(slg51000_volatile_ranges), |
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}; |
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static const struct regmap_config slg51000_regmap_config = { |
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.reg_bits = 16, |
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.val_bits = 8, |
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.max_register = 0x8000, |
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.wr_table = &slg51000_writeable_table, |
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.rd_table = &slg51000_readable_table, |
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.volatile_table = &slg51000_volatile_table, |
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}; |
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static const struct regulator_ops slg51000_regl_ops = { |
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.enable = regulator_enable_regmap, |
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.disable = regulator_disable_regmap, |
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.is_enabled = regulator_is_enabled_regmap, |
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.list_voltage = regulator_list_voltage_linear, |
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.map_voltage = regulator_map_voltage_linear, |
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.get_voltage_sel = regulator_get_voltage_sel_regmap, |
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.set_voltage_sel = regulator_set_voltage_sel_regmap, |
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}; |
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static const struct regulator_ops slg51000_switch_ops = { |
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.enable = regulator_enable_regmap, |
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.disable = regulator_disable_regmap, |
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.is_enabled = regulator_is_enabled_regmap, |
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}; |
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static int slg51000_of_parse_cb(struct device_node *np, |
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const struct regulator_desc *desc, |
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struct regulator_config *config) |
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{ |
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struct gpio_desc *ena_gpiod; |
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ena_gpiod = fwnode_gpiod_get_index(of_fwnode_handle(np), "enable", 0, |
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GPIOD_OUT_LOW | |
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GPIOD_FLAGS_BIT_NONEXCLUSIVE, |
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"gpio-en-ldo"); |
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if (!IS_ERR(ena_gpiod)) |
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config->ena_gpiod = ena_gpiod; |
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return 0; |
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} |
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#define SLG51000_REGL_DESC(_id, _name, _s_name, _min, _step) \ |
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[SLG51000_REGULATOR_##_id] = { \ |
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.name = #_name, \ |
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.supply_name = _s_name, \ |
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.id = SLG51000_REGULATOR_##_id, \ |
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.of_match = of_match_ptr(#_name), \ |
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.of_parse_cb = slg51000_of_parse_cb, \ |
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.ops = &slg51000_regl_ops, \ |
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.regulators_node = of_match_ptr("regulators"), \ |
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.n_voltages = 256, \ |
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.min_uV = _min, \ |
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.uV_step = _step, \ |
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.linear_min_sel = 0, \ |
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.vsel_mask = SLG51000_VSEL_MASK, \ |
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.vsel_reg = SLG51000_##_id##_VSEL, \ |
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.enable_reg = SLG51000_SYSCTL_MATRIX_CONF_A, \ |
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.enable_mask = BIT(SLG51000_REGULATOR_##_id), \ |
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.type = REGULATOR_VOLTAGE, \ |
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.owner = THIS_MODULE, \ |
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} |
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static struct regulator_desc regls_desc[SLG51000_MAX_REGULATORS] = { |
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SLG51000_REGL_DESC(LDO1, ldo1, NULL, 2400000, 5000), |
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SLG51000_REGL_DESC(LDO2, ldo2, NULL, 2400000, 5000), |
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SLG51000_REGL_DESC(LDO3, ldo3, "vin3", 1200000, 10000), |
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SLG51000_REGL_DESC(LDO4, ldo4, "vin4", 1200000, 10000), |
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SLG51000_REGL_DESC(LDO5, ldo5, "vin5", 400000, 5000), |
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SLG51000_REGL_DESC(LDO6, ldo6, "vin6", 400000, 5000), |
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SLG51000_REGL_DESC(LDO7, ldo7, "vin7", 1200000, 10000), |
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}; |
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static int slg51000_regulator_init(struct slg51000 *chip) |
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{ |
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struct regulator_config config = { }; |
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struct regulator_desc *rdesc; |
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unsigned int reg, val; |
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u8 vsel_range[2]; |
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int id, ret = 0; |
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const unsigned int min_regs[SLG51000_MAX_REGULATORS] = { |
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SLG51000_LDO1_MINV, SLG51000_LDO2_MINV, SLG51000_LDO3_MINV, |
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SLG51000_LDO4_MINV, SLG51000_LDO5_MINV, SLG51000_LDO6_MINV, |
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SLG51000_LDO7_MINV, |
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}; |
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for (id = 0; id < SLG51000_MAX_REGULATORS; id++) { |
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chip->rdesc[id] = ®ls_desc[id]; |
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rdesc = chip->rdesc[id]; |
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config.regmap = chip->regmap; |
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config.dev = chip->dev; |
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config.driver_data = chip; |
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ret = regmap_bulk_read(chip->regmap, min_regs[id], |
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vsel_range, 2); |
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if (ret < 0) { |
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dev_err(chip->dev, |
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"Failed to read the MIN register\n"); |
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return ret; |
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} |
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switch (id) { |
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case SLG51000_REGULATOR_LDO1: |
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case SLG51000_REGULATOR_LDO2: |
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if (id == SLG51000_REGULATOR_LDO1) |
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reg = SLG51000_LDO1_MISC1; |
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else |
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reg = SLG51000_LDO2_MISC1; |
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ret = regmap_read(chip->regmap, reg, &val); |
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if (ret < 0) { |
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dev_err(chip->dev, |
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"Failed to read voltage range of ldo%d\n", |
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id + 1); |
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return ret; |
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} |
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rdesc->linear_min_sel = vsel_range[0]; |
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rdesc->n_voltages = vsel_range[1] + 1; |
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if (val & SLG51000_SEL_VRANGE_MASK) |
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rdesc->min_uV = SLG51000_LDOHP_HV_MIN |
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+ (vsel_range[0] |
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* rdesc->uV_step); |
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else |
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rdesc->min_uV = SLG51000_LDOHP_LV_MIN |
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+ (vsel_range[0] |
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* rdesc->uV_step); |
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break; |
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case SLG51000_REGULATOR_LDO5: |
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case SLG51000_REGULATOR_LDO6: |
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if (id == SLG51000_REGULATOR_LDO5) |
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reg = SLG51000_LDO5_TRIM2; |
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else |
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reg = SLG51000_LDO6_TRIM2; |
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ret = regmap_read(chip->regmap, reg, &val); |
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if (ret < 0) { |
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dev_err(chip->dev, |
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"Failed to read LDO mode register\n"); |
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return ret; |
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} |
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if (val & SLG51000_SEL_BYP_MODE_MASK) { |
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rdesc->ops = &slg51000_switch_ops; |
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rdesc->n_voltages = 0; |
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rdesc->min_uV = 0; |
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rdesc->uV_step = 0; |
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rdesc->linear_min_sel = 0; |
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break; |
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} |
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fallthrough; /* to the check below */ |
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default: |
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rdesc->linear_min_sel = vsel_range[0]; |
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rdesc->n_voltages = vsel_range[1] + 1; |
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rdesc->min_uV = rdesc->min_uV |
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+ (vsel_range[0] * rdesc->uV_step); |
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break; |
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} |
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chip->rdev[id] = devm_regulator_register(chip->dev, rdesc, |
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&config); |
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if (IS_ERR(chip->rdev[id])) { |
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ret = PTR_ERR(chip->rdev[id]); |
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dev_err(chip->dev, |
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"Failed to register regulator(%s):%d\n", |
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chip->rdesc[id]->name, ret); |
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return ret; |
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} |
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} |
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return 0; |
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} |
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static irqreturn_t slg51000_irq_handler(int irq, void *data) |
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{ |
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struct slg51000 *chip = data; |
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struct regmap *regmap = chip->regmap; |
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enum { R0 = 0, R1, R2, REG_MAX }; |
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u8 evt[SLG51000_MAX_EVT_REGISTER][REG_MAX]; |
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int ret, i, handled = IRQ_NONE; |
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unsigned int evt_otp, mask_otp; |
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|
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/* Read event[R0], status[R1] and mask[R2] register */ |
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for (i = 0; i < SLG51000_MAX_EVT_REGISTER; i++) { |
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ret = regmap_bulk_read(regmap, es_reg[i].ereg, evt[i], REG_MAX); |
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if (ret < 0) { |
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dev_err(chip->dev, |
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"Failed to read event registers(%d)\n", ret); |
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return IRQ_NONE; |
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} |
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} |
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ret = regmap_read(regmap, SLG51000_OTP_EVENT, &evt_otp); |
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if (ret < 0) { |
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dev_err(chip->dev, |
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"Failed to read otp event registers(%d)\n", ret); |
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return IRQ_NONE; |
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} |
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ret = regmap_read(regmap, SLG51000_OTP_IRQ_MASK, &mask_otp); |
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if (ret < 0) { |
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dev_err(chip->dev, |
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"Failed to read otp mask register(%d)\n", ret); |
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return IRQ_NONE; |
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} |
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if ((evt_otp & SLG51000_EVT_CRC_MASK) && |
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!(mask_otp & SLG51000_IRQ_CRC_MASK)) { |
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dev_info(chip->dev, |
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"OTP has been read or OTP crc is not zero\n"); |
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handled = IRQ_HANDLED; |
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} |
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for (i = 0; i < SLG51000_MAX_REGULATORS; i++) { |
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if (!(evt[i][R2] & SLG51000_IRQ_ILIM_FLAG_MASK) && |
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(evt[i][R0] & SLG51000_EVT_ILIM_FLAG_MASK)) { |
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regulator_notifier_call_chain(chip->rdev[i], |
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REGULATOR_EVENT_OVER_CURRENT, NULL); |
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if (evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) |
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dev_warn(chip->dev, |
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"Over-current limit(ldo%d)\n", i + 1); |
|
handled = IRQ_HANDLED; |
|
} |
|
} |
|
|
|
if (!(evt[SLG51000_SCTL_EVT][R2] & SLG51000_IRQ_HIGH_TEMP_WARN_MASK) && |
|
(evt[SLG51000_SCTL_EVT][R0] & SLG51000_EVT_HIGH_TEMP_WARN_MASK)) { |
|
for (i = 0; i < SLG51000_MAX_REGULATORS; i++) { |
|
if (!(evt[i][R1] & SLG51000_STA_ILIM_FLAG_MASK) && |
|
(evt[i][R1] & SLG51000_STA_VOUT_OK_FLAG_MASK)) { |
|
regulator_notifier_call_chain(chip->rdev[i], |
|
REGULATOR_EVENT_OVER_TEMP, NULL); |
|
} |
|
} |
|
handled = IRQ_HANDLED; |
|
if (evt[SLG51000_SCTL_EVT][R1] & |
|
SLG51000_STA_HIGH_TEMP_WARN_MASK) |
|
dev_warn(chip->dev, "High temperature warning!\n"); |
|
} |
|
|
|
return handled; |
|
} |
|
|
|
static void slg51000_clear_fault_log(struct slg51000 *chip) |
|
{ |
|
unsigned int val = 0; |
|
int ret = 0; |
|
|
|
ret = regmap_read(chip->regmap, SLG51000_SYSCTL_FAULT_LOG1, &val); |
|
if (ret < 0) { |
|
dev_err(chip->dev, "Failed to read Fault log register\n"); |
|
return; |
|
} |
|
|
|
if (val & SLG51000_FLT_OVER_TEMP_MASK) |
|
dev_dbg(chip->dev, "Fault log: FLT_OVER_TEMP\n"); |
|
if (val & SLG51000_FLT_POWER_SEQ_CRASH_REQ_MASK) |
|
dev_dbg(chip->dev, "Fault log: FLT_POWER_SEQ_CRASH_REQ\n"); |
|
if (val & SLG51000_FLT_RST_MASK) |
|
dev_dbg(chip->dev, "Fault log: FLT_RST\n"); |
|
if (val & SLG51000_FLT_POR_MASK) |
|
dev_dbg(chip->dev, "Fault log: FLT_POR\n"); |
|
} |
|
|
|
static int slg51000_i2c_probe(struct i2c_client *client) |
|
{ |
|
struct device *dev = &client->dev; |
|
struct slg51000 *chip; |
|
struct gpio_desc *cs_gpiod; |
|
int error, ret; |
|
|
|
chip = devm_kzalloc(dev, sizeof(struct slg51000), GFP_KERNEL); |
|
if (!chip) |
|
return -ENOMEM; |
|
|
|
cs_gpiod = devm_gpiod_get_optional(dev, "dlg,cs", |
|
GPIOD_OUT_HIGH | |
|
GPIOD_FLAGS_BIT_NONEXCLUSIVE); |
|
if (IS_ERR(cs_gpiod)) |
|
return PTR_ERR(cs_gpiod); |
|
|
|
if (cs_gpiod) { |
|
dev_info(dev, "Found chip selector property\n"); |
|
chip->cs_gpiod = cs_gpiod; |
|
} |
|
|
|
i2c_set_clientdata(client, chip); |
|
chip->chip_irq = client->irq; |
|
chip->dev = dev; |
|
chip->regmap = devm_regmap_init_i2c(client, &slg51000_regmap_config); |
|
if (IS_ERR(chip->regmap)) { |
|
error = PTR_ERR(chip->regmap); |
|
dev_err(dev, "Failed to allocate register map: %d\n", |
|
error); |
|
return error; |
|
} |
|
|
|
ret = slg51000_regulator_init(chip); |
|
if (ret < 0) { |
|
dev_err(chip->dev, "Failed to init regulator(%d)\n", ret); |
|
return ret; |
|
} |
|
|
|
slg51000_clear_fault_log(chip); |
|
|
|
if (chip->chip_irq) { |
|
ret = devm_request_threaded_irq(dev, chip->chip_irq, NULL, |
|
slg51000_irq_handler, |
|
(IRQF_TRIGGER_HIGH | |
|
IRQF_ONESHOT), |
|
"slg51000-irq", chip); |
|
if (ret != 0) { |
|
dev_err(dev, "Failed to request IRQ: %d\n", |
|
chip->chip_irq); |
|
return ret; |
|
} |
|
} else { |
|
dev_info(dev, "No IRQ configured\n"); |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static const struct i2c_device_id slg51000_i2c_id[] = { |
|
{"slg51000", 0}, |
|
{}, |
|
}; |
|
MODULE_DEVICE_TABLE(i2c, slg51000_i2c_id); |
|
|
|
static struct i2c_driver slg51000_regulator_driver = { |
|
.driver = { |
|
.name = "slg51000-regulator", |
|
}, |
|
.probe_new = slg51000_i2c_probe, |
|
.id_table = slg51000_i2c_id, |
|
}; |
|
|
|
module_i2c_driver(slg51000_regulator_driver); |
|
|
|
MODULE_AUTHOR("Eric Jeong <[email protected]>"); |
|
MODULE_DESCRIPTION("SLG51000 regulator driver"); |
|
MODULE_LICENSE("GPL"); |
|
|
|
|