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552 lines
14 KiB
552 lines
14 KiB
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
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/* QLogic qede NIC Driver |
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* Copyright (c) 2015-2017 QLogic Corporation |
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* Copyright (c) 2019-2020 Marvell International Ltd. |
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*/ |
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|
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#include "qede_ptp.h" |
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#define QEDE_PTP_TX_TIMEOUT (2 * HZ) |
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|
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struct qede_ptp { |
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const struct qed_eth_ptp_ops *ops; |
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struct ptp_clock_info clock_info; |
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struct cyclecounter cc; |
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struct timecounter tc; |
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struct ptp_clock *clock; |
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struct work_struct work; |
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unsigned long ptp_tx_start; |
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struct qede_dev *edev; |
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struct sk_buff *tx_skb; |
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|
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/* ptp spinlock is used for protecting the cycle/time counter fields |
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* and, also for serializing the qed PTP API invocations. |
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*/ |
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spinlock_t lock; |
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bool hw_ts_ioctl_called; |
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u16 tx_type; |
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u16 rx_filter; |
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}; |
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|
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/** |
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* qede_ptp_adjfreq() - Adjust the frequency of the PTP cycle counter. |
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* |
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* @info: The PTP clock info structure. |
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* @ppb: Parts per billion adjustment from base. |
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* |
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* Return: Zero on success, negative errno otherwise. |
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*/ |
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static int qede_ptp_adjfreq(struct ptp_clock_info *info, s32 ppb) |
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{ |
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struct qede_ptp *ptp = container_of(info, struct qede_ptp, clock_info); |
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struct qede_dev *edev = ptp->edev; |
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int rc; |
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__qede_lock(edev); |
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if (edev->state == QEDE_STATE_OPEN) { |
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spin_lock_bh(&ptp->lock); |
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rc = ptp->ops->adjfreq(edev->cdev, ppb); |
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spin_unlock_bh(&ptp->lock); |
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} else { |
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DP_ERR(edev, "PTP adjfreq called while interface is down\n"); |
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rc = -EFAULT; |
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} |
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__qede_unlock(edev); |
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return rc; |
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} |
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static int qede_ptp_adjtime(struct ptp_clock_info *info, s64 delta) |
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{ |
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struct qede_dev *edev; |
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struct qede_ptp *ptp; |
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ptp = container_of(info, struct qede_ptp, clock_info); |
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edev = ptp->edev; |
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP adjtime called, delta = %llx\n", |
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delta); |
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spin_lock_bh(&ptp->lock); |
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timecounter_adjtime(&ptp->tc, delta); |
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spin_unlock_bh(&ptp->lock); |
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return 0; |
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} |
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static int qede_ptp_gettime(struct ptp_clock_info *info, struct timespec64 *ts) |
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{ |
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struct qede_dev *edev; |
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struct qede_ptp *ptp; |
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u64 ns; |
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ptp = container_of(info, struct qede_ptp, clock_info); |
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edev = ptp->edev; |
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spin_lock_bh(&ptp->lock); |
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ns = timecounter_read(&ptp->tc); |
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spin_unlock_bh(&ptp->lock); |
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP gettime called, ns = %llu\n", ns); |
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*ts = ns_to_timespec64(ns); |
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return 0; |
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} |
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static int qede_ptp_settime(struct ptp_clock_info *info, |
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const struct timespec64 *ts) |
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{ |
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struct qede_dev *edev; |
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struct qede_ptp *ptp; |
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u64 ns; |
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ptp = container_of(info, struct qede_ptp, clock_info); |
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edev = ptp->edev; |
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ns = timespec64_to_ns(ts); |
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PTP settime called, ns = %llu\n", ns); |
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/* Re-init the timecounter */ |
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spin_lock_bh(&ptp->lock); |
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timecounter_init(&ptp->tc, &ptp->cc, ns); |
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spin_unlock_bh(&ptp->lock); |
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return 0; |
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} |
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/* Enable (or disable) ancillary features of the phc subsystem */ |
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static int qede_ptp_ancillary_feature_enable(struct ptp_clock_info *info, |
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struct ptp_clock_request *rq, |
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int on) |
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{ |
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struct qede_dev *edev; |
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struct qede_ptp *ptp; |
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ptp = container_of(info, struct qede_ptp, clock_info); |
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edev = ptp->edev; |
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DP_ERR(edev, "PHC ancillary features are not supported\n"); |
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return -ENOTSUPP; |
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} |
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static void qede_ptp_task(struct work_struct *work) |
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{ |
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struct skb_shared_hwtstamps shhwtstamps; |
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struct qede_dev *edev; |
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struct qede_ptp *ptp; |
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u64 timestamp, ns; |
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bool timedout; |
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int rc; |
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ptp = container_of(work, struct qede_ptp, work); |
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edev = ptp->edev; |
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timedout = time_is_before_jiffies(ptp->ptp_tx_start + |
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QEDE_PTP_TX_TIMEOUT); |
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|
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/* Read Tx timestamp registers */ |
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spin_lock_bh(&ptp->lock); |
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rc = ptp->ops->read_tx_ts(edev->cdev, ×tamp); |
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spin_unlock_bh(&ptp->lock); |
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if (rc) { |
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if (unlikely(timedout)) { |
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DP_INFO(edev, "Tx timestamp is not recorded\n"); |
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dev_kfree_skb_any(ptp->tx_skb); |
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ptp->tx_skb = NULL; |
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clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, |
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&edev->flags); |
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edev->ptp_skip_txts++; |
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} else { |
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/* Reschedule to keep checking for a valid TS value */ |
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schedule_work(&ptp->work); |
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} |
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return; |
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} |
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ns = timecounter_cyc2time(&ptp->tc, timestamp); |
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memset(&shhwtstamps, 0, sizeof(shhwtstamps)); |
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shhwtstamps.hwtstamp = ns_to_ktime(ns); |
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skb_tstamp_tx(ptp->tx_skb, &shhwtstamps); |
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dev_kfree_skb_any(ptp->tx_skb); |
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ptp->tx_skb = NULL; |
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clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags); |
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DP_VERBOSE(edev, QED_MSG_DEBUG, |
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"Tx timestamp, timestamp cycles = %llu, ns = %llu\n", |
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timestamp, ns); |
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} |
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/* Read the PHC. This API is invoked with ptp_lock held. */ |
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static u64 qede_ptp_read_cc(const struct cyclecounter *cc) |
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{ |
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struct qede_dev *edev; |
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struct qede_ptp *ptp; |
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u64 phc_cycles; |
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int rc; |
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ptp = container_of(cc, struct qede_ptp, cc); |
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edev = ptp->edev; |
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rc = ptp->ops->read_cc(edev->cdev, &phc_cycles); |
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if (rc) |
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WARN_ONCE(1, "PHC read err %d\n", rc); |
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DP_VERBOSE(edev, QED_MSG_DEBUG, "PHC read cycles = %llu\n", phc_cycles); |
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return phc_cycles; |
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} |
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static int qede_ptp_cfg_filters(struct qede_dev *edev) |
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{ |
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enum qed_ptp_hwtstamp_tx_type tx_type = QED_PTP_HWTSTAMP_TX_ON; |
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enum qed_ptp_filter_type rx_filter = QED_PTP_FILTER_NONE; |
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struct qede_ptp *ptp = edev->ptp; |
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if (!ptp) |
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return -EIO; |
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if (!ptp->hw_ts_ioctl_called) { |
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DP_INFO(edev, "TS IOCTL not called\n"); |
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return 0; |
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} |
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switch (ptp->tx_type) { |
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case HWTSTAMP_TX_ON: |
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set_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags); |
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tx_type = QED_PTP_HWTSTAMP_TX_ON; |
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break; |
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case HWTSTAMP_TX_OFF: |
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clear_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags); |
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tx_type = QED_PTP_HWTSTAMP_TX_OFF; |
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break; |
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case HWTSTAMP_TX_ONESTEP_SYNC: |
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case HWTSTAMP_TX_ONESTEP_P2P: |
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DP_ERR(edev, "One-step timestamping is not supported\n"); |
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return -ERANGE; |
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} |
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spin_lock_bh(&ptp->lock); |
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switch (ptp->rx_filter) { |
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case HWTSTAMP_FILTER_NONE: |
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rx_filter = QED_PTP_FILTER_NONE; |
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break; |
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case HWTSTAMP_FILTER_ALL: |
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case HWTSTAMP_FILTER_SOME: |
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case HWTSTAMP_FILTER_NTP_ALL: |
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ptp->rx_filter = HWTSTAMP_FILTER_NONE; |
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rx_filter = QED_PTP_FILTER_ALL; |
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break; |
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case HWTSTAMP_FILTER_PTP_V1_L4_EVENT: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; |
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rx_filter = QED_PTP_FILTER_V1_L4_EVENT; |
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break; |
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case HWTSTAMP_FILTER_PTP_V1_L4_SYNC: |
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case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V1_L4_EVENT; |
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/* Initialize PTP detection for UDP/IPv4 events */ |
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rx_filter = QED_PTP_FILTER_V1_L4_GEN; |
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break; |
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case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; |
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rx_filter = QED_PTP_FILTER_V2_L4_EVENT; |
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break; |
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case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: |
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case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L4_EVENT; |
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/* Initialize PTP detection for UDP/IPv4 or UDP/IPv6 events */ |
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rx_filter = QED_PTP_FILTER_V2_L4_GEN; |
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break; |
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case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; |
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rx_filter = QED_PTP_FILTER_V2_L2_EVENT; |
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break; |
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case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: |
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case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_L2_EVENT; |
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/* Initialize PTP detection L2 events */ |
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rx_filter = QED_PTP_FILTER_V2_L2_GEN; |
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break; |
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case HWTSTAMP_FILTER_PTP_V2_EVENT: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; |
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rx_filter = QED_PTP_FILTER_V2_EVENT; |
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break; |
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case HWTSTAMP_FILTER_PTP_V2_SYNC: |
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case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: |
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ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; |
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/* Initialize PTP detection L2, UDP/IPv4 or UDP/IPv6 events */ |
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rx_filter = QED_PTP_FILTER_V2_GEN; |
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break; |
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} |
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ptp->ops->cfg_filters(edev->cdev, rx_filter, tx_type); |
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spin_unlock_bh(&ptp->lock); |
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return 0; |
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} |
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int qede_ptp_hw_ts(struct qede_dev *edev, struct ifreq *ifr) |
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{ |
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struct hwtstamp_config config; |
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struct qede_ptp *ptp; |
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int rc; |
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ptp = edev->ptp; |
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if (!ptp) |
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return -EIO; |
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if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) |
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return -EFAULT; |
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DP_VERBOSE(edev, QED_MSG_DEBUG, |
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"HWTSTAMP IOCTL: Requested tx_type = %d, requested rx_filters = %d\n", |
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config.tx_type, config.rx_filter); |
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if (config.flags) { |
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DP_ERR(edev, "config.flags is reserved for future use\n"); |
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return -EINVAL; |
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} |
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ptp->hw_ts_ioctl_called = 1; |
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ptp->tx_type = config.tx_type; |
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ptp->rx_filter = config.rx_filter; |
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rc = qede_ptp_cfg_filters(edev); |
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if (rc) |
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return rc; |
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config.rx_filter = ptp->rx_filter; |
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return copy_to_user(ifr->ifr_data, &config, |
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sizeof(config)) ? -EFAULT : 0; |
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} |
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int qede_ptp_get_ts_info(struct qede_dev *edev, struct ethtool_ts_info *info) |
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{ |
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struct qede_ptp *ptp = edev->ptp; |
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if (!ptp) { |
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info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | |
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SOF_TIMESTAMPING_RX_SOFTWARE | |
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SOF_TIMESTAMPING_SOFTWARE; |
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info->phc_index = -1; |
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return 0; |
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} |
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info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | |
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SOF_TIMESTAMPING_RX_SOFTWARE | |
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SOF_TIMESTAMPING_SOFTWARE | |
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SOF_TIMESTAMPING_TX_HARDWARE | |
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SOF_TIMESTAMPING_RX_HARDWARE | |
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SOF_TIMESTAMPING_RAW_HARDWARE; |
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if (ptp->clock) |
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info->phc_index = ptp_clock_index(ptp->clock); |
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else |
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info->phc_index = -1; |
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info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | |
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BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | |
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BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | |
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BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | |
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BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ); |
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info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); |
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return 0; |
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} |
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void qede_ptp_disable(struct qede_dev *edev) |
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{ |
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struct qede_ptp *ptp; |
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ptp = edev->ptp; |
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if (!ptp) |
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return; |
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if (ptp->clock) { |
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ptp_clock_unregister(ptp->clock); |
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ptp->clock = NULL; |
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} |
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/* Cancel PTP work queue. Should be done after the Tx queues are |
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* drained to prevent additional scheduling. |
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*/ |
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cancel_work_sync(&ptp->work); |
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if (ptp->tx_skb) { |
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dev_kfree_skb_any(ptp->tx_skb); |
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ptp->tx_skb = NULL; |
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clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags); |
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} |
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/* Disable PTP in HW */ |
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spin_lock_bh(&ptp->lock); |
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ptp->ops->disable(edev->cdev); |
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spin_unlock_bh(&ptp->lock); |
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kfree(ptp); |
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edev->ptp = NULL; |
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} |
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static int qede_ptp_init(struct qede_dev *edev) |
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{ |
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struct qede_ptp *ptp; |
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int rc; |
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ptp = edev->ptp; |
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if (!ptp) |
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return -EINVAL; |
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spin_lock_init(&ptp->lock); |
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/* Configure PTP in HW */ |
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rc = ptp->ops->enable(edev->cdev); |
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if (rc) { |
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DP_INFO(edev, "PTP HW enable failed\n"); |
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return rc; |
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} |
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/* Init work queue for Tx timestamping */ |
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INIT_WORK(&ptp->work, qede_ptp_task); |
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|
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/* Init cyclecounter and timecounter */ |
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memset(&ptp->cc, 0, sizeof(ptp->cc)); |
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ptp->cc.read = qede_ptp_read_cc; |
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ptp->cc.mask = CYCLECOUNTER_MASK(64); |
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ptp->cc.shift = 0; |
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ptp->cc.mult = 1; |
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timecounter_init(&ptp->tc, &ptp->cc, ktime_to_ns(ktime_get_real())); |
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return 0; |
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} |
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int qede_ptp_enable(struct qede_dev *edev) |
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{ |
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struct qede_ptp *ptp; |
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int rc; |
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ptp = kzalloc(sizeof(*ptp), GFP_KERNEL); |
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if (!ptp) { |
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DP_INFO(edev, "Failed to allocate struct for PTP\n"); |
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return -ENOMEM; |
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} |
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ptp->edev = edev; |
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ptp->ops = edev->ops->ptp; |
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if (!ptp->ops) { |
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DP_INFO(edev, "PTP enable failed\n"); |
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rc = -EIO; |
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goto err1; |
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} |
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edev->ptp = ptp; |
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rc = qede_ptp_init(edev); |
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if (rc) |
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goto err1; |
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qede_ptp_cfg_filters(edev); |
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|
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/* Fill the ptp_clock_info struct and register PTP clock */ |
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ptp->clock_info.owner = THIS_MODULE; |
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snprintf(ptp->clock_info.name, 16, "%s", edev->ndev->name); |
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ptp->clock_info.max_adj = QED_MAX_PHC_DRIFT_PPB; |
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ptp->clock_info.n_alarm = 0; |
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ptp->clock_info.n_ext_ts = 0; |
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ptp->clock_info.n_per_out = 0; |
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ptp->clock_info.pps = 0; |
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ptp->clock_info.adjfreq = qede_ptp_adjfreq; |
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ptp->clock_info.adjtime = qede_ptp_adjtime; |
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ptp->clock_info.gettime64 = qede_ptp_gettime; |
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ptp->clock_info.settime64 = qede_ptp_settime; |
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ptp->clock_info.enable = qede_ptp_ancillary_feature_enable; |
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|
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ptp->clock = ptp_clock_register(&ptp->clock_info, &edev->pdev->dev); |
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if (IS_ERR(ptp->clock)) { |
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DP_ERR(edev, "PTP clock registration failed\n"); |
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qede_ptp_disable(edev); |
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rc = -EINVAL; |
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goto err2; |
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} |
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return 0; |
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err1: |
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kfree(ptp); |
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err2: |
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edev->ptp = NULL; |
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|
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return rc; |
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} |
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|
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void qede_ptp_tx_ts(struct qede_dev *edev, struct sk_buff *skb) |
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{ |
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struct qede_ptp *ptp; |
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ptp = edev->ptp; |
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if (!ptp) |
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return; |
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if (test_and_set_bit_lock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, |
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&edev->flags)) { |
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DP_ERR(edev, "Timestamping in progress\n"); |
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edev->ptp_skip_txts++; |
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return; |
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} |
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if (unlikely(!test_bit(QEDE_FLAGS_TX_TIMESTAMPING_EN, &edev->flags))) { |
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DP_ERR(edev, |
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"Tx timestamping was not enabled, this packet will not be timestamped\n"); |
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clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags); |
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edev->ptp_skip_txts++; |
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} else if (unlikely(ptp->tx_skb)) { |
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DP_ERR(edev, |
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"The device supports only a single outstanding packet to timestamp, this packet will not be timestamped\n"); |
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clear_bit_unlock(QEDE_FLAGS_PTP_TX_IN_PRORGESS, &edev->flags); |
|
edev->ptp_skip_txts++; |
|
} else { |
|
skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; |
|
/* schedule check for Tx timestamp */ |
|
ptp->tx_skb = skb_get(skb); |
|
ptp->ptp_tx_start = jiffies; |
|
schedule_work(&ptp->work); |
|
} |
|
} |
|
|
|
void qede_ptp_rx_ts(struct qede_dev *edev, struct sk_buff *skb) |
|
{ |
|
struct qede_ptp *ptp; |
|
u64 timestamp, ns; |
|
int rc; |
|
|
|
ptp = edev->ptp; |
|
if (!ptp) |
|
return; |
|
|
|
spin_lock_bh(&ptp->lock); |
|
rc = ptp->ops->read_rx_ts(edev->cdev, ×tamp); |
|
if (rc) { |
|
spin_unlock_bh(&ptp->lock); |
|
DP_INFO(edev, "Invalid Rx timestamp\n"); |
|
return; |
|
} |
|
|
|
ns = timecounter_cyc2time(&ptp->tc, timestamp); |
|
spin_unlock_bh(&ptp->lock); |
|
skb_hwtstamps(skb)->hwtstamp = ns_to_ktime(ns); |
|
DP_VERBOSE(edev, QED_MSG_DEBUG, |
|
"Rx timestamp, timestamp cycles = %llu, ns = %llu\n", |
|
timestamp, ns); |
|
}
|
|
|