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453 lines
13 KiB
453 lines
13 KiB
/* SPDX-License-Identifier: GPL-2.0-only */ |
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/* drivers/net/ethernet/micrel/ks8851.h |
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* |
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* Copyright 2009 Simtec Electronics |
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* Ben Dooks <[email protected]> |
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* |
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* KS8851 register definitions |
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*/ |
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#ifndef __KS8851_H__ |
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#define __KS8851_H__ |
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#include <linux/eeprom_93cx6.h> |
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#define KS_CCR 0x08 |
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#define CCR_LE (1 << 10) /* KSZ8851-16MLL */ |
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#define CCR_EEPROM (1 << 9) |
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#define CCR_SPI (1 << 8) /* KSZ8851SNL */ |
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#define CCR_8BIT (1 << 7) /* KSZ8851-16MLL */ |
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#define CCR_16BIT (1 << 6) /* KSZ8851-16MLL */ |
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#define CCR_32BIT (1 << 5) /* KSZ8851-16MLL */ |
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#define CCR_SHARED (1 << 4) /* KSZ8851-16MLL */ |
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#define CCR_48PIN (1 << 1) /* KSZ8851-16MLL */ |
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#define CCR_32PIN (1 << 0) /* KSZ8851SNL */ |
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/* MAC address registers */ |
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#define KS_MAR(_m) (0x14 - (_m)) |
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#define KS_MARL 0x10 |
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#define KS_MARM 0x12 |
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#define KS_MARH 0x14 |
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#define KS_OBCR 0x20 |
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#define OBCR_ODS_16mA (1 << 6) |
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#define KS_EEPCR 0x22 |
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#define EEPCR_EESRWA (1 << 5) |
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#define EEPCR_EESA (1 << 4) |
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#define EEPCR_EESB (1 << 3) |
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#define EEPCR_EEDO (1 << 2) |
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#define EEPCR_EESCK (1 << 1) |
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#define EEPCR_EECS (1 << 0) |
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#define KS_MBIR 0x24 |
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#define MBIR_TXMBF (1 << 12) |
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#define MBIR_TXMBFA (1 << 11) |
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#define MBIR_RXMBF (1 << 4) |
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#define MBIR_RXMBFA (1 << 3) |
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#define KS_GRR 0x26 |
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#define GRR_QMU (1 << 1) |
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#define GRR_GSR (1 << 0) |
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#define KS_WFCR 0x2A |
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#define WFCR_MPRXE (1 << 7) |
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#define WFCR_WF3E (1 << 3) |
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#define WFCR_WF2E (1 << 2) |
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#define WFCR_WF1E (1 << 1) |
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#define WFCR_WF0E (1 << 0) |
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#define KS_WF0CRC0 0x30 |
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#define KS_WF0CRC1 0x32 |
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#define KS_WF0BM0 0x34 |
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#define KS_WF0BM1 0x36 |
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#define KS_WF0BM2 0x38 |
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#define KS_WF0BM3 0x3A |
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#define KS_WF1CRC0 0x40 |
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#define KS_WF1CRC1 0x42 |
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#define KS_WF1BM0 0x44 |
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#define KS_WF1BM1 0x46 |
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#define KS_WF1BM2 0x48 |
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#define KS_WF1BM3 0x4A |
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#define KS_WF2CRC0 0x50 |
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#define KS_WF2CRC1 0x52 |
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#define KS_WF2BM0 0x54 |
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#define KS_WF2BM1 0x56 |
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#define KS_WF2BM2 0x58 |
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#define KS_WF2BM3 0x5A |
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#define KS_WF3CRC0 0x60 |
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#define KS_WF3CRC1 0x62 |
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#define KS_WF3BM0 0x64 |
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#define KS_WF3BM1 0x66 |
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#define KS_WF3BM2 0x68 |
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#define KS_WF3BM3 0x6A |
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#define KS_TXCR 0x70 |
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#define TXCR_TCGICMP (1 << 8) |
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#define TXCR_TCGUDP (1 << 7) |
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#define TXCR_TCGTCP (1 << 6) |
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#define TXCR_TCGIP (1 << 5) |
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#define TXCR_FTXQ (1 << 4) |
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#define TXCR_TXFCE (1 << 3) |
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#define TXCR_TXPE (1 << 2) |
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#define TXCR_TXCRC (1 << 1) |
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#define TXCR_TXE (1 << 0) |
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#define KS_TXSR 0x72 |
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#define TXSR_TXLC (1 << 13) |
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#define TXSR_TXMC (1 << 12) |
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#define TXSR_TXFID_MASK (0x3f << 0) |
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#define TXSR_TXFID_SHIFT (0) |
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#define TXSR_TXFID_GET(_v) (((_v) >> 0) & 0x3f) |
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#define KS_RXCR1 0x74 |
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#define RXCR1_FRXQ (1 << 15) |
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#define RXCR1_RXUDPFCC (1 << 14) |
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#define RXCR1_RXTCPFCC (1 << 13) |
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#define RXCR1_RXIPFCC (1 << 12) |
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#define RXCR1_RXPAFMA (1 << 11) |
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#define RXCR1_RXFCE (1 << 10) |
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#define RXCR1_RXEFE (1 << 9) |
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#define RXCR1_RXMAFMA (1 << 8) |
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#define RXCR1_RXBE (1 << 7) |
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#define RXCR1_RXME (1 << 6) |
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#define RXCR1_RXUE (1 << 5) |
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#define RXCR1_RXAE (1 << 4) |
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#define RXCR1_RXINVF (1 << 1) |
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#define RXCR1_RXE (1 << 0) |
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#define KS_RXCR2 0x76 |
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#define RXCR2_SRDBL_MASK (0x7 << 5) /* KSZ8851SNL */ |
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#define RXCR2_SRDBL_SHIFT (5) /* KSZ8851SNL */ |
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#define RXCR2_SRDBL_4B (0x0 << 5) /* KSZ8851SNL */ |
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#define RXCR2_SRDBL_8B (0x1 << 5) /* KSZ8851SNL */ |
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#define RXCR2_SRDBL_16B (0x2 << 5) /* KSZ8851SNL */ |
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#define RXCR2_SRDBL_32B (0x3 << 5) /* KSZ8851SNL */ |
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#define RXCR2_SRDBL_FRAME (0x4 << 5) /* KSZ8851SNL */ |
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#define RXCR2_IUFFP (1 << 4) |
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#define RXCR2_RXIUFCEZ (1 << 3) |
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#define RXCR2_UDPLFE (1 << 2) |
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#define RXCR2_RXICMPFCC (1 << 1) |
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#define RXCR2_RXSAF (1 << 0) |
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#define KS_TXMIR 0x78 |
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#define KS_RXFHSR 0x7C |
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#define RXFSHR_RXFV (1 << 15) |
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#define RXFSHR_RXICMPFCS (1 << 13) |
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#define RXFSHR_RXIPFCS (1 << 12) |
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#define RXFSHR_RXTCPFCS (1 << 11) |
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#define RXFSHR_RXUDPFCS (1 << 10) |
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#define RXFSHR_RXBF (1 << 7) |
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#define RXFSHR_RXMF (1 << 6) |
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#define RXFSHR_RXUF (1 << 5) |
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#define RXFSHR_RXMR (1 << 4) |
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#define RXFSHR_RXFT (1 << 3) |
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#define RXFSHR_RXFTL (1 << 2) |
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#define RXFSHR_RXRF (1 << 1) |
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#define RXFSHR_RXCE (1 << 0) |
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#define KS_RXFHBCR 0x7E |
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#define RXFHBCR_CNT_MASK (0xfff << 0) |
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#define KS_TXQCR 0x80 |
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#define TXQCR_AETFE (1 << 2) /* KSZ8851SNL */ |
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#define TXQCR_TXQMAM (1 << 1) |
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#define TXQCR_METFE (1 << 0) |
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#define KS_RXQCR 0x82 |
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#define RXQCR_RXDTTS (1 << 12) |
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#define RXQCR_RXDBCTS (1 << 11) |
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#define RXQCR_RXFCTS (1 << 10) |
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#define RXQCR_RXIPHTOE (1 << 9) |
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#define RXQCR_RXDTTE (1 << 7) |
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#define RXQCR_RXDBCTE (1 << 6) |
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#define RXQCR_RXFCTE (1 << 5) |
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#define RXQCR_ADRFE (1 << 4) |
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#define RXQCR_SDA (1 << 3) |
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#define RXQCR_RRXEF (1 << 0) |
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#define KS_TXFDPR 0x84 |
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#define TXFDPR_TXFPAI (1 << 14) |
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#define TXFDPR_TXFP_MASK (0x7ff << 0) |
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#define TXFDPR_TXFP_SHIFT (0) |
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#define KS_RXFDPR 0x86 |
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#define RXFDPR_RXFPAI (1 << 14) |
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#define RXFDPR_WST (1 << 12) /* KSZ8851-16MLL */ |
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#define RXFDPR_EMS (1 << 11) /* KSZ8851-16MLL */ |
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#define RXFDPR_RXFP_MASK (0x7ff << 0) |
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#define RXFDPR_RXFP_SHIFT (0) |
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#define KS_RXDTTR 0x8C |
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#define KS_RXDBCTR 0x8E |
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#define KS_IER 0x90 |
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#define KS_ISR 0x92 |
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#define IRQ_LCI (1 << 15) |
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#define IRQ_TXI (1 << 14) |
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#define IRQ_RXI (1 << 13) |
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#define IRQ_RXOI (1 << 11) |
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#define IRQ_TXPSI (1 << 9) |
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#define IRQ_RXPSI (1 << 8) |
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#define IRQ_TXSAI (1 << 6) |
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#define IRQ_RXWFDI (1 << 5) |
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#define IRQ_RXMPDI (1 << 4) |
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#define IRQ_LDI (1 << 3) |
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#define IRQ_EDI (1 << 2) |
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#define IRQ_SPIBEI (1 << 1) /* KSZ8851SNL */ |
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#define IRQ_DEDI (1 << 0) |
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#define KS_RXFCTR 0x9C |
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#define KS_RXFC 0x9D |
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#define RXFCTR_RXFC_MASK (0xff << 8) |
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#define RXFCTR_RXFC_SHIFT (8) |
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#define RXFCTR_RXFC_GET(_v) (((_v) >> 8) & 0xff) |
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#define RXFCTR_RXFCT_MASK (0xff << 0) |
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#define RXFCTR_RXFCT_SHIFT (0) |
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#define KS_TXNTFSR 0x9E |
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#define KS_MAHTR0 0xA0 |
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#define KS_MAHTR1 0xA2 |
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#define KS_MAHTR2 0xA4 |
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#define KS_MAHTR3 0xA6 |
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#define KS_FCLWR 0xB0 |
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#define KS_FCHWR 0xB2 |
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#define KS_FCOWR 0xB4 |
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#define KS_CIDER 0xC0 |
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#define CIDER_ID 0x8870 |
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#define CIDER_REV_MASK (0x7 << 1) |
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#define CIDER_REV_SHIFT (1) |
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#define CIDER_REV_GET(_v) (((_v) >> 1) & 0x7) |
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#define KS_CGCR 0xC6 |
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#define KS_IACR 0xC8 |
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#define IACR_RDEN (1 << 12) |
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#define IACR_TSEL_MASK (0x3 << 10) |
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#define IACR_TSEL_SHIFT (10) |
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#define IACR_TSEL_MIB (0x3 << 10) |
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#define IACR_ADDR_MASK (0x1f << 0) |
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#define IACR_ADDR_SHIFT (0) |
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#define KS_IADLR 0xD0 |
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#define KS_IAHDR 0xD2 |
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#define KS_PMECR 0xD4 |
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#define PMECR_PME_DELAY (1 << 14) |
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#define PMECR_PME_POL (1 << 12) |
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#define PMECR_WOL_WAKEUP (1 << 11) |
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#define PMECR_WOL_MAGICPKT (1 << 10) |
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#define PMECR_WOL_LINKUP (1 << 9) |
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#define PMECR_WOL_ENERGY (1 << 8) |
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#define PMECR_AUTO_WAKE_EN (1 << 7) |
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#define PMECR_WAKEUP_NORMAL (1 << 6) |
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#define PMECR_WKEVT_MASK (0xf << 2) |
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#define PMECR_WKEVT_SHIFT (2) |
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#define PMECR_WKEVT_GET(_v) (((_v) >> 2) & 0xf) |
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#define PMECR_WKEVT_ENERGY (0x1 << 2) |
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#define PMECR_WKEVT_LINK (0x2 << 2) |
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#define PMECR_WKEVT_MAGICPKT (0x4 << 2) |
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#define PMECR_WKEVT_FRAME (0x8 << 2) |
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#define PMECR_PM_MASK (0x3 << 0) |
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#define PMECR_PM_SHIFT (0) |
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#define PMECR_PM_NORMAL (0x0 << 0) |
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#define PMECR_PM_ENERGY (0x1 << 0) |
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#define PMECR_PM_SOFTDOWN (0x2 << 0) |
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#define PMECR_PM_POWERSAVE (0x3 << 0) |
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/* Standard MII PHY data */ |
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#define KS_P1MBCR 0xE4 |
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#define KS_P1MBSR 0xE6 |
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#define KS_PHY1ILR 0xE8 |
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#define KS_PHY1IHR 0xEA |
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#define KS_P1ANAR 0xEC |
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#define KS_P1ANLPR 0xEE |
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#define KS_P1SCLMD 0xF4 |
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#define KS_P1CR 0xF6 |
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#define P1CR_LEDOFF (1 << 15) |
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#define P1CR_TXIDS (1 << 14) |
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#define P1CR_RESTARTAN (1 << 13) |
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#define P1CR_DISAUTOMDIX (1 << 10) |
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#define P1CR_FORCEMDIX (1 << 9) |
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#define P1CR_AUTONEGEN (1 << 7) |
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#define P1CR_FORCE100 (1 << 6) |
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#define P1CR_FORCEFDX (1 << 5) |
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#define P1CR_ADV_FLOW (1 << 4) |
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#define P1CR_ADV_100BT_FDX (1 << 3) |
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#define P1CR_ADV_100BT_HDX (1 << 2) |
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#define P1CR_ADV_10BT_FDX (1 << 1) |
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#define P1CR_ADV_10BT_HDX (1 << 0) |
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#define KS_P1SR 0xF8 |
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#define P1SR_HP_MDIX (1 << 15) |
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#define P1SR_REV_POL (1 << 13) |
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#define P1SR_OP_100M (1 << 10) |
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#define P1SR_OP_FDX (1 << 9) |
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#define P1SR_OP_MDI (1 << 7) |
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#define P1SR_AN_DONE (1 << 6) |
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#define P1SR_LINK_GOOD (1 << 5) |
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#define P1SR_PNTR_FLOW (1 << 4) |
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#define P1SR_PNTR_100BT_FDX (1 << 3) |
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#define P1SR_PNTR_100BT_HDX (1 << 2) |
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#define P1SR_PNTR_10BT_FDX (1 << 1) |
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#define P1SR_PNTR_10BT_HDX (1 << 0) |
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/* TX Frame control */ |
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#define TXFR_TXIC (1 << 15) |
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#define TXFR_TXFID_MASK (0x3f << 0) |
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#define TXFR_TXFID_SHIFT (0) |
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/** |
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* struct ks8851_rxctrl - KS8851 driver rx control |
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* @mchash: Multicast hash-table data. |
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* @rxcr1: KS_RXCR1 register setting |
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* @rxcr2: KS_RXCR2 register setting |
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* |
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* Representation of the settings needs to control the receive filtering |
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* such as the multicast hash-filter and the receive register settings. This |
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* is used to make the job of working out if the receive settings change and |
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* then issuing the new settings to the worker that will send the necessary |
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* commands. |
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*/ |
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struct ks8851_rxctrl { |
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u16 mchash[4]; |
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u16 rxcr1; |
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u16 rxcr2; |
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}; |
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/** |
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* union ks8851_tx_hdr - tx header data |
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* @txb: The header as bytes |
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* @txw: The header as 16bit, little-endian words |
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* |
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* A dual representation of the tx header data to allow |
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* access to individual bytes, and to allow 16bit accesses |
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* with 16bit alignment. |
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*/ |
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union ks8851_tx_hdr { |
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u8 txb[6]; |
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__le16 txw[3]; |
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}; |
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/** |
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* struct ks8851_net - KS8851 driver private data |
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* @netdev: The network device we're bound to |
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* @statelock: Lock on this structure for tx list. |
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* @mii: The MII state information for the mii calls. |
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* @rxctrl: RX settings for @rxctrl_work. |
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* @rxctrl_work: Work queue for updating RX mode and multicast lists |
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* @txq: Queue of packets for transmission. |
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* @txh: Space for generating packet TX header in DMA-able data |
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* @rxd: Space for receiving SPI data, in DMA-able space. |
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* @txd: Space for transmitting SPI data, in DMA-able space. |
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* @msg_enable: The message flags controlling driver output (see ethtool). |
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* @fid: Incrementing frame id tag. |
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* @rc_ier: Cached copy of KS_IER. |
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* @rc_ccr: Cached copy of KS_CCR. |
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* @rc_rxqcr: Cached copy of KS_RXQCR. |
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* @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM. |
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* @vdd_reg: Optional regulator supplying the chip |
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* @vdd_io: Optional digital power supply for IO |
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* @gpio: Optional reset_n gpio |
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* @mii_bus: Pointer to MII bus structure |
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* @lock: Bus access lock callback |
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* @unlock: Bus access unlock callback |
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* @rdreg16: 16bit register read callback |
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* @wrreg16: 16bit register write callback |
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* @rdfifo: FIFO read callback |
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* @wrfifo: FIFO write callback |
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* @start_xmit: start_xmit() implementation callback |
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* @rx_skb: rx_skb() implementation callback |
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* @flush_tx_work: flush_tx_work() implementation callback |
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* |
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* The @statelock is used to protect information in the structure which may |
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* need to be accessed via several sources, such as the network driver layer |
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* or one of the work queues. |
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* |
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* We align the buffers we may use for rx/tx to ensure that if the SPI driver |
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* wants to DMA map them, it will not have any problems with data the driver |
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* modifies. |
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*/ |
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struct ks8851_net { |
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struct net_device *netdev; |
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spinlock_t statelock; |
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union ks8851_tx_hdr txh ____cacheline_aligned; |
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u8 rxd[8]; |
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u8 txd[8]; |
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u32 msg_enable ____cacheline_aligned; |
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u16 tx_space; |
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u8 fid; |
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u16 rc_ier; |
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u16 rc_rxqcr; |
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u16 rc_ccr; |
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struct mii_if_info mii; |
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struct ks8851_rxctrl rxctrl; |
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struct work_struct rxctrl_work; |
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struct sk_buff_head txq; |
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struct eeprom_93cx6 eeprom; |
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struct regulator *vdd_reg; |
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struct regulator *vdd_io; |
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int gpio; |
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struct mii_bus *mii_bus; |
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void (*lock)(struct ks8851_net *ks, |
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unsigned long *flags); |
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void (*unlock)(struct ks8851_net *ks, |
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unsigned long *flags); |
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unsigned int (*rdreg16)(struct ks8851_net *ks, |
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unsigned int reg); |
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void (*wrreg16)(struct ks8851_net *ks, |
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unsigned int reg, unsigned int val); |
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void (*rdfifo)(struct ks8851_net *ks, u8 *buff, |
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unsigned int len); |
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void (*wrfifo)(struct ks8851_net *ks, |
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struct sk_buff *txp, bool irq); |
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netdev_tx_t (*start_xmit)(struct sk_buff *skb, |
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struct net_device *dev); |
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void (*rx_skb)(struct ks8851_net *ks, |
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struct sk_buff *skb); |
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void (*flush_tx_work)(struct ks8851_net *ks); |
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}; |
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int ks8851_probe_common(struct net_device *netdev, struct device *dev, |
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int msg_en); |
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int ks8851_remove_common(struct device *dev); |
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int ks8851_suspend(struct device *dev); |
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int ks8851_resume(struct device *dev); |
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static __maybe_unused SIMPLE_DEV_PM_OPS(ks8851_pm_ops, |
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ks8851_suspend, ks8851_resume); |
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/** |
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* ks8851_done_tx - update and then free skbuff after transmitting |
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* @ks: The device state |
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* @txb: The buffer transmitted |
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*/ |
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static void __maybe_unused ks8851_done_tx(struct ks8851_net *ks, |
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struct sk_buff *txb) |
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{ |
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struct net_device *dev = ks->netdev; |
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dev->stats.tx_bytes += txb->len; |
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dev->stats.tx_packets++; |
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dev_kfree_skb(txb); |
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} |
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#endif /* __KS8851_H__ */
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