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490 lines
16 KiB
490 lines
16 KiB
/* |
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* AMD 10Gb Ethernet driver |
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* |
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* This file is available to you under your choice of the following two |
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* licenses: |
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* |
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* License 1: GPLv2 |
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* |
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* Copyright (c) 2014-2016 Advanced Micro Devices, Inc. |
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* |
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* This file is free software; you may copy, redistribute and/or modify |
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* it under the terms of the GNU General Public License as published by |
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* the Free Software Foundation, either version 2 of the License, or (at |
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* your option) any later version. |
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* |
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* This file is distributed in the hope that it will be useful, but |
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* WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* General Public License for more details. |
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* |
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* You should have received a copy of the GNU General Public License |
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* along with this program. If not, see <http://www.gnu.org/licenses/>. |
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* |
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* This file incorporates work covered by the following copyright and |
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* permission notice: |
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* The Synopsys DWC ETHER XGMAC Software Driver and documentation |
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* (hereinafter "Software") is an unsupported proprietary work of Synopsys, |
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* Inc. unless otherwise expressly agreed to in writing between Synopsys |
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* and you. |
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* |
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* The Software IS NOT an item of Licensed Software or Licensed Product |
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* under any End User Software License Agreement or Agreement for Licensed |
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* Product with Synopsys or any supplement thereto. Permission is hereby |
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* granted, free of charge, to any person obtaining a copy of this software |
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* annotated with this license and the Software, to deal in the Software |
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* without restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or sell copies |
|
* of the Software, and to permit persons to whom the Software is furnished |
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* to do so, subject to the following conditions: |
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* |
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* The above copyright notice and this permission notice shall be included |
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* in all copies or substantial portions of the Software. |
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* |
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* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" |
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* BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A |
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* PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS |
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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* THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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* |
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* License 2: Modified BSD |
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* |
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* Copyright (c) 2014-2016 Advanced Micro Devices, Inc. |
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* All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* * Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* * Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* * Neither the name of Advanced Micro Devices, Inc. nor the |
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* names of its contributors may be used to endorse or promote products |
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* derived from this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY |
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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* |
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* This file incorporates work covered by the following copyright and |
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* permission notice: |
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* The Synopsys DWC ETHER XGMAC Software Driver and documentation |
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* (hereinafter "Software") is an unsupported proprietary work of Synopsys, |
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* Inc. unless otherwise expressly agreed to in writing between Synopsys |
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* and you. |
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* |
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* The Software IS NOT an item of Licensed Software or Licensed Product |
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* under any End User Software License Agreement or Agreement for Licensed |
|
* Product with Synopsys or any supplement thereto. Permission is hereby |
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* granted, free of charge, to any person obtaining a copy of this software |
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* annotated with this license and the Software, to deal in the Software |
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* without restriction, including without limitation the rights to use, |
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* copy, modify, merge, publish, distribute, sublicense, and/or sell copies |
|
* of the Software, and to permit persons to whom the Software is furnished |
|
* to do so, subject to the following conditions: |
|
* |
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* The above copyright notice and this permission notice shall be included |
|
* in all copies or substantial portions of the Software. |
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* |
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* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" |
|
* BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A |
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* PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS |
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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* THE POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#include <linux/module.h> |
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#include <linux/device.h> |
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#include <linux/spinlock.h> |
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#include <linux/netdevice.h> |
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#include <linux/etherdevice.h> |
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#include <linux/io.h> |
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#include <linux/notifier.h> |
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#include "xgbe.h" |
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#include "xgbe-common.h" |
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MODULE_AUTHOR("Tom Lendacky <[email protected]>"); |
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MODULE_LICENSE("Dual BSD/GPL"); |
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MODULE_DESCRIPTION(XGBE_DRV_DESC); |
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static int debug = -1; |
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module_param(debug, int, 0644); |
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MODULE_PARM_DESC(debug, " Network interface message level setting"); |
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static const u32 default_msg_level = (NETIF_MSG_LINK | NETIF_MSG_IFDOWN | |
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NETIF_MSG_IFUP); |
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static void xgbe_default_config(struct xgbe_prv_data *pdata) |
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{ |
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DBGPR("-->xgbe_default_config\n"); |
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|
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pdata->blen = DMA_SBMR_BLEN_64; |
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pdata->pbl = DMA_PBL_128; |
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pdata->aal = 1; |
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pdata->rd_osr_limit = 8; |
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pdata->wr_osr_limit = 8; |
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pdata->tx_sf_mode = MTL_TSF_ENABLE; |
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pdata->tx_threshold = MTL_TX_THRESHOLD_64; |
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pdata->tx_osp_mode = DMA_OSP_ENABLE; |
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pdata->rx_sf_mode = MTL_RSF_DISABLE; |
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pdata->rx_threshold = MTL_RX_THRESHOLD_64; |
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pdata->pause_autoneg = 1; |
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pdata->tx_pause = 1; |
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pdata->rx_pause = 1; |
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pdata->phy_speed = SPEED_UNKNOWN; |
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pdata->power_down = 0; |
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DBGPR("<--xgbe_default_config\n"); |
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} |
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static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata) |
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{ |
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xgbe_init_function_ptrs_dev(&pdata->hw_if); |
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xgbe_init_function_ptrs_phy(&pdata->phy_if); |
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xgbe_init_function_ptrs_i2c(&pdata->i2c_if); |
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xgbe_init_function_ptrs_desc(&pdata->desc_if); |
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pdata->vdata->init_function_ptrs_phy_impl(&pdata->phy_if); |
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} |
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struct xgbe_prv_data *xgbe_alloc_pdata(struct device *dev) |
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{ |
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struct xgbe_prv_data *pdata; |
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struct net_device *netdev; |
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netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data), |
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XGBE_MAX_DMA_CHANNELS); |
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if (!netdev) { |
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dev_err(dev, "alloc_etherdev_mq failed\n"); |
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return ERR_PTR(-ENOMEM); |
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} |
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SET_NETDEV_DEV(netdev, dev); |
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pdata = netdev_priv(netdev); |
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pdata->netdev = netdev; |
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pdata->dev = dev; |
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spin_lock_init(&pdata->lock); |
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spin_lock_init(&pdata->xpcs_lock); |
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mutex_init(&pdata->rss_mutex); |
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spin_lock_init(&pdata->tstamp_lock); |
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mutex_init(&pdata->i2c_mutex); |
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init_completion(&pdata->i2c_complete); |
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init_completion(&pdata->mdio_complete); |
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pdata->msg_enable = netif_msg_init(debug, default_msg_level); |
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set_bit(XGBE_DOWN, &pdata->dev_state); |
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set_bit(XGBE_STOPPED, &pdata->dev_state); |
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return pdata; |
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} |
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void xgbe_free_pdata(struct xgbe_prv_data *pdata) |
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{ |
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struct net_device *netdev = pdata->netdev; |
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free_netdev(netdev); |
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} |
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void xgbe_set_counts(struct xgbe_prv_data *pdata) |
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{ |
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/* Set all the function pointers */ |
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xgbe_init_all_fptrs(pdata); |
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|
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/* Populate the hardware features */ |
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xgbe_get_all_hw_features(pdata); |
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/* Set default max values if not provided */ |
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if (!pdata->tx_max_channel_count) |
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pdata->tx_max_channel_count = pdata->hw_feat.tx_ch_cnt; |
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if (!pdata->rx_max_channel_count) |
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pdata->rx_max_channel_count = pdata->hw_feat.rx_ch_cnt; |
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if (!pdata->tx_max_q_count) |
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pdata->tx_max_q_count = pdata->hw_feat.tx_q_cnt; |
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if (!pdata->rx_max_q_count) |
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pdata->rx_max_q_count = pdata->hw_feat.rx_q_cnt; |
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|
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/* Calculate the number of Tx and Rx rings to be created |
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* -Tx (DMA) Channels map 1-to-1 to Tx Queues so set |
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* the number of Tx queues to the number of Tx channels |
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* enabled |
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* -Rx (DMA) Channels do not map 1-to-1 so use the actual |
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* number of Rx queues or maximum allowed |
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*/ |
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pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(), |
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pdata->hw_feat.tx_ch_cnt); |
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pdata->tx_ring_count = min_t(unsigned int, pdata->tx_ring_count, |
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pdata->tx_max_channel_count); |
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pdata->tx_ring_count = min_t(unsigned int, pdata->tx_ring_count, |
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pdata->tx_max_q_count); |
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pdata->tx_q_count = pdata->tx_ring_count; |
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pdata->rx_ring_count = min_t(unsigned int, num_online_cpus(), |
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pdata->hw_feat.rx_ch_cnt); |
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pdata->rx_ring_count = min_t(unsigned int, pdata->rx_ring_count, |
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pdata->rx_max_channel_count); |
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pdata->rx_q_count = min_t(unsigned int, pdata->hw_feat.rx_q_cnt, |
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pdata->rx_max_q_count); |
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if (netif_msg_probe(pdata)) { |
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dev_dbg(pdata->dev, "TX/RX DMA channel count = %u/%u\n", |
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pdata->tx_ring_count, pdata->rx_ring_count); |
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dev_dbg(pdata->dev, "TX/RX hardware queue count = %u/%u\n", |
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pdata->tx_q_count, pdata->rx_q_count); |
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} |
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} |
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int xgbe_config_netdev(struct xgbe_prv_data *pdata) |
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{ |
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struct net_device *netdev = pdata->netdev; |
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struct device *dev = pdata->dev; |
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int ret; |
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netdev->irq = pdata->dev_irq; |
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netdev->base_addr = (unsigned long)pdata->xgmac_regs; |
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memcpy(netdev->dev_addr, pdata->mac_addr, netdev->addr_len); |
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|
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/* Initialize ECC timestamps */ |
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pdata->tx_sec_period = jiffies; |
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pdata->tx_ded_period = jiffies; |
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pdata->rx_sec_period = jiffies; |
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pdata->rx_ded_period = jiffies; |
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pdata->desc_sec_period = jiffies; |
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pdata->desc_ded_period = jiffies; |
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/* Issue software reset to device */ |
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ret = pdata->hw_if.exit(pdata); |
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if (ret) { |
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dev_err(dev, "software reset failed\n"); |
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return ret; |
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} |
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/* Set default configuration data */ |
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xgbe_default_config(pdata); |
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|
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/* Set the DMA mask */ |
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ret = dma_set_mask_and_coherent(dev, |
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DMA_BIT_MASK(pdata->hw_feat.dma_width)); |
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if (ret) { |
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dev_err(dev, "dma_set_mask_and_coherent failed\n"); |
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return ret; |
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} |
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/* Set default max values if not provided */ |
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if (!pdata->tx_max_fifo_size) |
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pdata->tx_max_fifo_size = pdata->hw_feat.tx_fifo_size; |
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if (!pdata->rx_max_fifo_size) |
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pdata->rx_max_fifo_size = pdata->hw_feat.rx_fifo_size; |
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/* Set and validate the number of descriptors for a ring */ |
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BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT); |
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pdata->tx_desc_count = XGBE_TX_DESC_CNT; |
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BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT); |
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pdata->rx_desc_count = XGBE_RX_DESC_CNT; |
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/* Adjust the number of queues based on interrupts assigned */ |
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if (pdata->channel_irq_count) { |
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pdata->tx_ring_count = min_t(unsigned int, pdata->tx_ring_count, |
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pdata->channel_irq_count); |
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pdata->rx_ring_count = min_t(unsigned int, pdata->rx_ring_count, |
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pdata->channel_irq_count); |
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if (netif_msg_probe(pdata)) |
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dev_dbg(pdata->dev, |
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"adjusted TX/RX DMA channel count = %u/%u\n", |
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pdata->tx_ring_count, pdata->rx_ring_count); |
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} |
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/* Initialize RSS hash key */ |
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netdev_rss_key_fill(pdata->rss_key, sizeof(pdata->rss_key)); |
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XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, IP2TE, 1); |
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XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, TCP4TE, 1); |
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XGMAC_SET_BITS(pdata->rss_options, MAC_RSSCR, UDP4TE, 1); |
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|
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/* Call MDIO/PHY initialization routine */ |
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pdata->debugfs_an_cdr_workaround = pdata->vdata->an_cdr_workaround; |
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ret = pdata->phy_if.phy_init(pdata); |
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if (ret) |
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return ret; |
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/* Set device operations */ |
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netdev->netdev_ops = xgbe_get_netdev_ops(); |
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netdev->ethtool_ops = xgbe_get_ethtool_ops(); |
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#ifdef CONFIG_AMD_XGBE_DCB |
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netdev->dcbnl_ops = xgbe_get_dcbnl_ops(); |
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#endif |
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/* Set device features */ |
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netdev->hw_features = NETIF_F_SG | |
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NETIF_F_IP_CSUM | |
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NETIF_F_IPV6_CSUM | |
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NETIF_F_RXCSUM | |
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NETIF_F_TSO | |
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NETIF_F_TSO6 | |
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NETIF_F_GRO | |
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NETIF_F_HW_VLAN_CTAG_RX | |
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NETIF_F_HW_VLAN_CTAG_TX | |
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NETIF_F_HW_VLAN_CTAG_FILTER; |
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if (pdata->hw_feat.rss) |
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netdev->hw_features |= NETIF_F_RXHASH; |
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|
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if (pdata->hw_feat.vxn) { |
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netdev->hw_enc_features = NETIF_F_SG | |
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NETIF_F_IP_CSUM | |
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NETIF_F_IPV6_CSUM | |
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NETIF_F_RXCSUM | |
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NETIF_F_TSO | |
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NETIF_F_TSO6 | |
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NETIF_F_GRO | |
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NETIF_F_GSO_UDP_TUNNEL | |
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NETIF_F_GSO_UDP_TUNNEL_CSUM; |
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netdev->hw_features |= NETIF_F_GSO_UDP_TUNNEL | |
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NETIF_F_GSO_UDP_TUNNEL_CSUM; |
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netdev->udp_tunnel_nic_info = xgbe_get_udp_tunnel_info(); |
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} |
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netdev->vlan_features |= NETIF_F_SG | |
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NETIF_F_IP_CSUM | |
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NETIF_F_IPV6_CSUM | |
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NETIF_F_TSO | |
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NETIF_F_TSO6; |
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|
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netdev->features |= netdev->hw_features; |
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pdata->netdev_features = netdev->features; |
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|
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netdev->priv_flags |= IFF_UNICAST_FLT; |
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netdev->min_mtu = 0; |
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netdev->max_mtu = XGMAC_JUMBO_PACKET_MTU; |
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|
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/* Use default watchdog timeout */ |
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netdev->watchdog_timeo = 0; |
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|
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xgbe_init_rx_coalesce(pdata); |
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xgbe_init_tx_coalesce(pdata); |
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|
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netif_carrier_off(netdev); |
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ret = register_netdev(netdev); |
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if (ret) { |
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dev_err(dev, "net device registration failed\n"); |
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return ret; |
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} |
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|
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if (IS_REACHABLE(CONFIG_PTP_1588_CLOCK)) |
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xgbe_ptp_register(pdata); |
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xgbe_debugfs_init(pdata); |
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|
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netif_dbg(pdata, drv, pdata->netdev, "%u Tx software queues\n", |
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pdata->tx_ring_count); |
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netif_dbg(pdata, drv, pdata->netdev, "%u Rx software queues\n", |
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pdata->rx_ring_count); |
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|
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return 0; |
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} |
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|
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void xgbe_deconfig_netdev(struct xgbe_prv_data *pdata) |
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{ |
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struct net_device *netdev = pdata->netdev; |
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|
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xgbe_debugfs_exit(pdata); |
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|
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if (IS_REACHABLE(CONFIG_PTP_1588_CLOCK)) |
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xgbe_ptp_unregister(pdata); |
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unregister_netdev(netdev); |
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|
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pdata->phy_if.phy_exit(pdata); |
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} |
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|
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static int xgbe_netdev_event(struct notifier_block *nb, unsigned long event, |
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void *data) |
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{ |
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struct net_device *netdev = netdev_notifier_info_to_dev(data); |
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struct xgbe_prv_data *pdata = netdev_priv(netdev); |
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|
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if (netdev->netdev_ops != xgbe_get_netdev_ops()) |
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goto out; |
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|
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switch (event) { |
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case NETDEV_CHANGENAME: |
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xgbe_debugfs_rename(pdata); |
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break; |
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|
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default: |
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break; |
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} |
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|
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out: |
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return NOTIFY_DONE; |
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} |
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|
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static struct notifier_block xgbe_netdev_notifier = { |
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.notifier_call = xgbe_netdev_event, |
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}; |
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|
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static int __init xgbe_mod_init(void) |
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{ |
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int ret; |
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|
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ret = register_netdevice_notifier(&xgbe_netdev_notifier); |
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if (ret) |
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return ret; |
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|
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ret = xgbe_platform_init(); |
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if (ret) |
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goto err_platform_init; |
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|
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ret = xgbe_pci_init(); |
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if (ret) |
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goto err_pci_init; |
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return 0; |
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|
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err_pci_init: |
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xgbe_platform_exit(); |
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err_platform_init: |
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unregister_netdevice_notifier(&xgbe_netdev_notifier); |
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return ret; |
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} |
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|
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static void __exit xgbe_mod_exit(void) |
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{ |
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xgbe_pci_exit(); |
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|
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xgbe_platform_exit(); |
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|
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unregister_netdevice_notifier(&xgbe_netdev_notifier); |
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} |
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|
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module_init(xgbe_mod_init); |
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module_exit(xgbe_mod_exit);
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