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326 lines
8.7 KiB
326 lines
8.7 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Copyright (c) 2017-2019 Samuel Holland <[email protected]> |
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#include <linux/bitops.h> |
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#include <linux/clk.h> |
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#include <linux/device.h> |
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#include <linux/err.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/mailbox_controller.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_irq.h> |
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#include <linux/platform_device.h> |
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#include <linux/reset.h> |
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#include <linux/spinlock.h> |
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#define NUM_CHANS 8 |
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#define CTRL_REG(n) (0x0000 + 0x4 * ((n) / 4)) |
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#define CTRL_RX(n) BIT(0 + 8 * ((n) % 4)) |
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#define CTRL_TX(n) BIT(4 + 8 * ((n) % 4)) |
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#define REMOTE_IRQ_EN_REG 0x0040 |
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#define REMOTE_IRQ_STAT_REG 0x0050 |
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#define LOCAL_IRQ_EN_REG 0x0060 |
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#define LOCAL_IRQ_STAT_REG 0x0070 |
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#define RX_IRQ(n) BIT(0 + 2 * (n)) |
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#define RX_IRQ_MASK 0x5555 |
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#define TX_IRQ(n) BIT(1 + 2 * (n)) |
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#define TX_IRQ_MASK 0xaaaa |
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#define FIFO_STAT_REG(n) (0x0100 + 0x4 * (n)) |
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#define FIFO_STAT_MASK GENMASK(0, 0) |
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#define MSG_STAT_REG(n) (0x0140 + 0x4 * (n)) |
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#define MSG_STAT_MASK GENMASK(2, 0) |
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#define MSG_DATA_REG(n) (0x0180 + 0x4 * (n)) |
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#define mbox_dbg(mbox, ...) dev_dbg((mbox)->controller.dev, __VA_ARGS__) |
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struct sun6i_msgbox { |
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struct mbox_controller controller; |
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struct clk *clk; |
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spinlock_t lock; |
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void __iomem *regs; |
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}; |
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static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan); |
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static bool sun6i_msgbox_peek_data(struct mbox_chan *chan); |
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static inline int channel_number(struct mbox_chan *chan) |
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{ |
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return chan - chan->mbox->chans; |
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} |
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static inline struct sun6i_msgbox *to_sun6i_msgbox(struct mbox_chan *chan) |
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{ |
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return chan->con_priv; |
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} |
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static irqreturn_t sun6i_msgbox_irq(int irq, void *dev_id) |
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{ |
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struct sun6i_msgbox *mbox = dev_id; |
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uint32_t status; |
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int n; |
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/* Only examine channels that are currently enabled. */ |
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status = readl(mbox->regs + LOCAL_IRQ_EN_REG) & |
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readl(mbox->regs + LOCAL_IRQ_STAT_REG); |
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if (!(status & RX_IRQ_MASK)) |
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return IRQ_NONE; |
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for (n = 0; n < NUM_CHANS; ++n) { |
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struct mbox_chan *chan = &mbox->controller.chans[n]; |
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if (!(status & RX_IRQ(n))) |
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continue; |
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while (sun6i_msgbox_peek_data(chan)) { |
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uint32_t msg = readl(mbox->regs + MSG_DATA_REG(n)); |
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mbox_dbg(mbox, "Channel %d received 0x%08x\n", n, msg); |
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mbox_chan_received_data(chan, &msg); |
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} |
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/* The IRQ can be cleared only once the FIFO is empty. */ |
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writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); |
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} |
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return IRQ_HANDLED; |
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} |
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static int sun6i_msgbox_send_data(struct mbox_chan *chan, void *data) |
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{ |
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struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); |
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int n = channel_number(chan); |
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uint32_t msg = *(uint32_t *)data; |
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/* Using a channel backwards gets the hardware into a bad state. */ |
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if (WARN_ON_ONCE(!(readl(mbox->regs + CTRL_REG(n)) & CTRL_TX(n)))) |
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return 0; |
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writel(msg, mbox->regs + MSG_DATA_REG(n)); |
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mbox_dbg(mbox, "Channel %d sent 0x%08x\n", n, msg); |
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return 0; |
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} |
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static int sun6i_msgbox_startup(struct mbox_chan *chan) |
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{ |
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struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); |
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int n = channel_number(chan); |
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/* The coprocessor is responsible for setting channel directions. */ |
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if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) { |
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/* Flush the receive FIFO. */ |
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while (sun6i_msgbox_peek_data(chan)) |
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readl(mbox->regs + MSG_DATA_REG(n)); |
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writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); |
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/* Enable the receive IRQ. */ |
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spin_lock(&mbox->lock); |
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writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) | RX_IRQ(n), |
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mbox->regs + LOCAL_IRQ_EN_REG); |
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spin_unlock(&mbox->lock); |
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} |
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mbox_dbg(mbox, "Channel %d startup complete\n", n); |
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return 0; |
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} |
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static void sun6i_msgbox_shutdown(struct mbox_chan *chan) |
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{ |
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struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); |
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int n = channel_number(chan); |
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if (readl(mbox->regs + CTRL_REG(n)) & CTRL_RX(n)) { |
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/* Disable the receive IRQ. */ |
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spin_lock(&mbox->lock); |
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writel(readl(mbox->regs + LOCAL_IRQ_EN_REG) & ~RX_IRQ(n), |
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mbox->regs + LOCAL_IRQ_EN_REG); |
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spin_unlock(&mbox->lock); |
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/* Attempt to flush the FIFO until the IRQ is cleared. */ |
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do { |
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while (sun6i_msgbox_peek_data(chan)) |
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readl(mbox->regs + MSG_DATA_REG(n)); |
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writel(RX_IRQ(n), mbox->regs + LOCAL_IRQ_STAT_REG); |
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} while (readl(mbox->regs + LOCAL_IRQ_STAT_REG) & RX_IRQ(n)); |
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} |
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mbox_dbg(mbox, "Channel %d shutdown complete\n", n); |
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} |
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static bool sun6i_msgbox_last_tx_done(struct mbox_chan *chan) |
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{ |
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struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); |
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int n = channel_number(chan); |
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/* |
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* The hardware allows snooping on the remote user's IRQ statuses. |
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* We consider a message to be acknowledged only once the receive IRQ |
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* for that channel is cleared. Since the receive IRQ for a channel |
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* cannot be cleared until the FIFO for that channel is empty, this |
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* ensures that the message has actually been read. It also gives the |
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* recipient an opportunity to perform minimal processing before |
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* acknowledging the message. |
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*/ |
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return !(readl(mbox->regs + REMOTE_IRQ_STAT_REG) & RX_IRQ(n)); |
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} |
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static bool sun6i_msgbox_peek_data(struct mbox_chan *chan) |
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{ |
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struct sun6i_msgbox *mbox = to_sun6i_msgbox(chan); |
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int n = channel_number(chan); |
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return readl(mbox->regs + MSG_STAT_REG(n)) & MSG_STAT_MASK; |
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} |
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static const struct mbox_chan_ops sun6i_msgbox_chan_ops = { |
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.send_data = sun6i_msgbox_send_data, |
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.startup = sun6i_msgbox_startup, |
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.shutdown = sun6i_msgbox_shutdown, |
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.last_tx_done = sun6i_msgbox_last_tx_done, |
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.peek_data = sun6i_msgbox_peek_data, |
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}; |
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static int sun6i_msgbox_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct mbox_chan *chans; |
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struct reset_control *reset; |
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struct resource *res; |
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struct sun6i_msgbox *mbox; |
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int i, ret; |
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mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL); |
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if (!mbox) |
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return -ENOMEM; |
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chans = devm_kcalloc(dev, NUM_CHANS, sizeof(*chans), GFP_KERNEL); |
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if (!chans) |
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return -ENOMEM; |
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for (i = 0; i < NUM_CHANS; ++i) |
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chans[i].con_priv = mbox; |
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mbox->clk = devm_clk_get(dev, NULL); |
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if (IS_ERR(mbox->clk)) { |
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ret = PTR_ERR(mbox->clk); |
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dev_err(dev, "Failed to get clock: %d\n", ret); |
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return ret; |
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} |
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ret = clk_prepare_enable(mbox->clk); |
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if (ret) { |
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dev_err(dev, "Failed to enable clock: %d\n", ret); |
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return ret; |
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} |
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reset = devm_reset_control_get_exclusive(dev, NULL); |
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if (IS_ERR(reset)) { |
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ret = PTR_ERR(reset); |
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dev_err(dev, "Failed to get reset control: %d\n", ret); |
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goto err_disable_unprepare; |
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} |
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/* |
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* NOTE: We rely on platform firmware to preconfigure the channel |
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* directions, and we share this hardware block with other firmware |
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* that runs concurrently with Linux (e.g. a trusted monitor). |
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* |
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* Therefore, we do *not* assert the reset line if probing fails or |
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* when removing the device. |
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*/ |
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ret = reset_control_deassert(reset); |
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if (ret) { |
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dev_err(dev, "Failed to deassert reset: %d\n", ret); |
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goto err_disable_unprepare; |
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} |
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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if (!res) { |
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ret = -ENODEV; |
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goto err_disable_unprepare; |
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} |
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mbox->regs = devm_ioremap_resource(&pdev->dev, res); |
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if (IS_ERR(mbox->regs)) { |
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ret = PTR_ERR(mbox->regs); |
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dev_err(dev, "Failed to map MMIO resource: %d\n", ret); |
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goto err_disable_unprepare; |
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} |
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/* Disable all IRQs for this end of the msgbox. */ |
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writel(0, mbox->regs + LOCAL_IRQ_EN_REG); |
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ret = devm_request_irq(dev, irq_of_parse_and_map(dev->of_node, 0), |
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sun6i_msgbox_irq, 0, dev_name(dev), mbox); |
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if (ret) { |
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dev_err(dev, "Failed to register IRQ handler: %d\n", ret); |
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goto err_disable_unprepare; |
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} |
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mbox->controller.dev = dev; |
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mbox->controller.ops = &sun6i_msgbox_chan_ops; |
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mbox->controller.chans = chans; |
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mbox->controller.num_chans = NUM_CHANS; |
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mbox->controller.txdone_irq = false; |
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mbox->controller.txdone_poll = true; |
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mbox->controller.txpoll_period = 5; |
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spin_lock_init(&mbox->lock); |
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platform_set_drvdata(pdev, mbox); |
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ret = mbox_controller_register(&mbox->controller); |
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if (ret) { |
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dev_err(dev, "Failed to register controller: %d\n", ret); |
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goto err_disable_unprepare; |
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} |
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return 0; |
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err_disable_unprepare: |
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clk_disable_unprepare(mbox->clk); |
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return ret; |
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} |
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static int sun6i_msgbox_remove(struct platform_device *pdev) |
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{ |
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struct sun6i_msgbox *mbox = platform_get_drvdata(pdev); |
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mbox_controller_unregister(&mbox->controller); |
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/* See the comment in sun6i_msgbox_probe about the reset line. */ |
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clk_disable_unprepare(mbox->clk); |
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return 0; |
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} |
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static const struct of_device_id sun6i_msgbox_of_match[] = { |
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{ .compatible = "allwinner,sun6i-a31-msgbox", }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, sun6i_msgbox_of_match); |
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static struct platform_driver sun6i_msgbox_driver = { |
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.driver = { |
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.name = "sun6i-msgbox", |
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.of_match_table = sun6i_msgbox_of_match, |
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}, |
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.probe = sun6i_msgbox_probe, |
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.remove = sun6i_msgbox_remove, |
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}; |
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module_platform_driver(sun6i_msgbox_driver); |
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MODULE_AUTHOR("Samuel Holland <[email protected]>"); |
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MODULE_DESCRIPTION("Allwinner sun6i/sun8i/sun9i/sun50i Message Box"); |
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MODULE_LICENSE("GPL v2");
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