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527 lines
12 KiB
527 lines
12 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* I2C bus driver for Amlogic Meson SoCs |
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* |
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* Copyright (C) 2014 Beniamino Galvani <[email protected]> |
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*/ |
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#include <linux/bitfield.h> |
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#include <linux/clk.h> |
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#include <linux/completion.h> |
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#include <linux/i2c.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/iopoll.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/types.h> |
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/* Meson I2C register map */ |
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#define REG_CTRL 0x00 |
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#define REG_SLAVE_ADDR 0x04 |
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#define REG_TOK_LIST0 0x08 |
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#define REG_TOK_LIST1 0x0c |
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#define REG_TOK_WDATA0 0x10 |
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#define REG_TOK_WDATA1 0x14 |
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#define REG_TOK_RDATA0 0x18 |
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#define REG_TOK_RDATA1 0x1c |
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/* Control register fields */ |
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#define REG_CTRL_START BIT(0) |
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#define REG_CTRL_ACK_IGNORE BIT(1) |
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#define REG_CTRL_STATUS BIT(2) |
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#define REG_CTRL_ERROR BIT(3) |
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#define REG_CTRL_CLKDIV GENMASK(21, 12) |
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#define REG_CTRL_CLKDIVEXT GENMASK(29, 28) |
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#define REG_SLV_ADDR GENMASK(7, 0) |
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#define REG_SLV_SDA_FILTER GENMASK(10, 8) |
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#define REG_SLV_SCL_FILTER GENMASK(13, 11) |
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#define REG_SLV_SCL_LOW GENMASK(27, 16) |
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#define REG_SLV_SCL_LOW_EN BIT(28) |
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#define I2C_TIMEOUT_MS 500 |
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#define FILTER_DELAY 15 |
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enum { |
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TOKEN_END = 0, |
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TOKEN_START, |
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TOKEN_SLAVE_ADDR_WRITE, |
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TOKEN_SLAVE_ADDR_READ, |
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TOKEN_DATA, |
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TOKEN_DATA_LAST, |
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TOKEN_STOP, |
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}; |
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enum { |
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STATE_IDLE, |
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STATE_READ, |
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STATE_WRITE, |
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}; |
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struct meson_i2c_data { |
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unsigned char div_factor; |
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}; |
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/** |
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* struct meson_i2c - Meson I2C device private data |
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* |
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* @adap: I2C adapter instance |
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* @dev: Pointer to device structure |
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* @regs: Base address of the device memory mapped registers |
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* @clk: Pointer to clock structure |
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* @msg: Pointer to the current I2C message |
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* @state: Current state in the driver state machine |
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* @last: Flag set for the last message in the transfer |
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* @count: Number of bytes to be sent/received in current transfer |
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* @pos: Current position in the send/receive buffer |
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* @error: Flag set when an error is received |
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* @lock: To avoid race conditions between irq handler and xfer code |
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* @done: Completion used to wait for transfer termination |
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* @tokens: Sequence of tokens to be written to the device |
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* @num_tokens: Number of tokens |
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* @data: Pointer to the controlller's platform data |
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*/ |
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struct meson_i2c { |
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struct i2c_adapter adap; |
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struct device *dev; |
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void __iomem *regs; |
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struct clk *clk; |
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struct i2c_msg *msg; |
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int state; |
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bool last; |
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int count; |
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int pos; |
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int error; |
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spinlock_t lock; |
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struct completion done; |
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u32 tokens[2]; |
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int num_tokens; |
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const struct meson_i2c_data *data; |
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}; |
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static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask, |
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u32 val) |
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{ |
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u32 data; |
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data = readl(i2c->regs + reg); |
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data &= ~mask; |
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data |= val & mask; |
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writel(data, i2c->regs + reg); |
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} |
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static void meson_i2c_reset_tokens(struct meson_i2c *i2c) |
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{ |
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i2c->tokens[0] = 0; |
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i2c->tokens[1] = 0; |
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i2c->num_tokens = 0; |
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} |
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static void meson_i2c_add_token(struct meson_i2c *i2c, int token) |
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{ |
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if (i2c->num_tokens < 8) |
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i2c->tokens[0] |= (token & 0xf) << (i2c->num_tokens * 4); |
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else |
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i2c->tokens[1] |= (token & 0xf) << ((i2c->num_tokens % 8) * 4); |
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i2c->num_tokens++; |
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} |
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static void meson_i2c_set_clk_div(struct meson_i2c *i2c, unsigned int freq) |
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{ |
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unsigned long clk_rate = clk_get_rate(i2c->clk); |
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unsigned int div; |
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div = DIV_ROUND_UP(clk_rate, freq); |
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div -= FILTER_DELAY; |
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div = DIV_ROUND_UP(div, i2c->data->div_factor); |
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/* clock divider has 12 bits */ |
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if (div > GENMASK(11, 0)) { |
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dev_err(i2c->dev, "requested bus frequency too low\n"); |
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div = GENMASK(11, 0); |
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} |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIV, |
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FIELD_PREP(REG_CTRL_CLKDIV, div & GENMASK(9, 0))); |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_CLKDIVEXT, |
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FIELD_PREP(REG_CTRL_CLKDIVEXT, div >> 10)); |
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/* Disable HIGH/LOW mode */ |
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meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, REG_SLV_SCL_LOW_EN, 0); |
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dev_dbg(i2c->dev, "%s: clk %lu, freq %u, div %u\n", __func__, |
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clk_rate, freq, div); |
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} |
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static void meson_i2c_get_data(struct meson_i2c *i2c, char *buf, int len) |
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{ |
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u32 rdata0, rdata1; |
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int i; |
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rdata0 = readl(i2c->regs + REG_TOK_RDATA0); |
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rdata1 = readl(i2c->regs + REG_TOK_RDATA1); |
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dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__, |
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rdata0, rdata1, len); |
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for (i = 0; i < min(4, len); i++) |
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*buf++ = (rdata0 >> i * 8) & 0xff; |
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for (i = 4; i < min(8, len); i++) |
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*buf++ = (rdata1 >> (i - 4) * 8) & 0xff; |
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} |
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static void meson_i2c_put_data(struct meson_i2c *i2c, char *buf, int len) |
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{ |
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u32 wdata0 = 0, wdata1 = 0; |
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int i; |
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for (i = 0; i < min(4, len); i++) |
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wdata0 |= *buf++ << (i * 8); |
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for (i = 4; i < min(8, len); i++) |
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wdata1 |= *buf++ << ((i - 4) * 8); |
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writel(wdata0, i2c->regs + REG_TOK_WDATA0); |
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writel(wdata1, i2c->regs + REG_TOK_WDATA1); |
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dev_dbg(i2c->dev, "%s: data %08x %08x len %d\n", __func__, |
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wdata0, wdata1, len); |
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} |
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static void meson_i2c_prepare_xfer(struct meson_i2c *i2c) |
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{ |
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bool write = !(i2c->msg->flags & I2C_M_RD); |
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int i; |
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i2c->count = min(i2c->msg->len - i2c->pos, 8); |
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for (i = 0; i < i2c->count - 1; i++) |
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meson_i2c_add_token(i2c, TOKEN_DATA); |
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if (i2c->count) { |
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if (write || i2c->pos + i2c->count < i2c->msg->len) |
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meson_i2c_add_token(i2c, TOKEN_DATA); |
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else |
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meson_i2c_add_token(i2c, TOKEN_DATA_LAST); |
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} |
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if (write) |
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meson_i2c_put_data(i2c, i2c->msg->buf + i2c->pos, i2c->count); |
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if (i2c->last && i2c->pos + i2c->count >= i2c->msg->len) |
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meson_i2c_add_token(i2c, TOKEN_STOP); |
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writel(i2c->tokens[0], i2c->regs + REG_TOK_LIST0); |
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writel(i2c->tokens[1], i2c->regs + REG_TOK_LIST1); |
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} |
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static void meson_i2c_transfer_complete(struct meson_i2c *i2c, u32 ctrl) |
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{ |
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if (ctrl & REG_CTRL_ERROR) { |
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/* |
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* The bit is set when the IGNORE_NAK bit is cleared |
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* and the device didn't respond. In this case, the |
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* I2C controller automatically generates a STOP |
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* condition. |
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*/ |
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dev_dbg(i2c->dev, "error bit set\n"); |
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i2c->error = -ENXIO; |
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i2c->state = STATE_IDLE; |
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} else { |
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if (i2c->state == STATE_READ && i2c->count) |
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meson_i2c_get_data(i2c, i2c->msg->buf + i2c->pos, |
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i2c->count); |
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i2c->pos += i2c->count; |
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if (i2c->pos >= i2c->msg->len) |
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i2c->state = STATE_IDLE; |
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} |
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} |
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static irqreturn_t meson_i2c_irq(int irqno, void *dev_id) |
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{ |
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struct meson_i2c *i2c = dev_id; |
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unsigned int ctrl; |
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spin_lock(&i2c->lock); |
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meson_i2c_reset_tokens(i2c); |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); |
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ctrl = readl(i2c->regs + REG_CTRL); |
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dev_dbg(i2c->dev, "irq: state %d, pos %d, count %d, ctrl %08x\n", |
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i2c->state, i2c->pos, i2c->count, ctrl); |
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if (i2c->state == STATE_IDLE) { |
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spin_unlock(&i2c->lock); |
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return IRQ_NONE; |
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} |
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meson_i2c_transfer_complete(i2c, ctrl); |
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if (i2c->state == STATE_IDLE) { |
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complete(&i2c->done); |
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goto out; |
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} |
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/* Restart the processing */ |
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meson_i2c_prepare_xfer(i2c); |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); |
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out: |
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spin_unlock(&i2c->lock); |
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return IRQ_HANDLED; |
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} |
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static void meson_i2c_do_start(struct meson_i2c *i2c, struct i2c_msg *msg) |
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{ |
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int token; |
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token = (msg->flags & I2C_M_RD) ? TOKEN_SLAVE_ADDR_READ : |
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TOKEN_SLAVE_ADDR_WRITE; |
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meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, REG_SLV_ADDR, |
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FIELD_PREP(REG_SLV_ADDR, msg->addr << 1)); |
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meson_i2c_add_token(i2c, TOKEN_START); |
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meson_i2c_add_token(i2c, token); |
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} |
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static int meson_i2c_xfer_msg(struct meson_i2c *i2c, struct i2c_msg *msg, |
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int last, bool atomic) |
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{ |
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unsigned long time_left, flags; |
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int ret = 0; |
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u32 ctrl; |
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i2c->msg = msg; |
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i2c->last = last; |
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i2c->pos = 0; |
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i2c->count = 0; |
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i2c->error = 0; |
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meson_i2c_reset_tokens(i2c); |
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flags = (msg->flags & I2C_M_IGNORE_NAK) ? REG_CTRL_ACK_IGNORE : 0; |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_ACK_IGNORE, flags); |
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if (!(msg->flags & I2C_M_NOSTART)) |
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meson_i2c_do_start(i2c, msg); |
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i2c->state = (msg->flags & I2C_M_RD) ? STATE_READ : STATE_WRITE; |
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meson_i2c_prepare_xfer(i2c); |
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if (!atomic) |
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reinit_completion(&i2c->done); |
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/* Start the transfer */ |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, REG_CTRL_START); |
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if (atomic) { |
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ret = readl_poll_timeout_atomic(i2c->regs + REG_CTRL, ctrl, |
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!(ctrl & REG_CTRL_STATUS), |
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10, I2C_TIMEOUT_MS * 1000); |
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} else { |
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time_left = msecs_to_jiffies(I2C_TIMEOUT_MS); |
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time_left = wait_for_completion_timeout(&i2c->done, time_left); |
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if (!time_left) |
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ret = -ETIMEDOUT; |
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} |
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/* |
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* Protect access to i2c struct and registers from interrupt |
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* handlers triggered by a transfer terminated after the |
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* timeout period |
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*/ |
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spin_lock_irqsave(&i2c->lock, flags); |
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if (atomic && !ret) |
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meson_i2c_transfer_complete(i2c, ctrl); |
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/* Abort any active operation */ |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); |
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if (ret) |
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i2c->state = STATE_IDLE; |
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if (i2c->error) |
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ret = i2c->error; |
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spin_unlock_irqrestore(&i2c->lock, flags); |
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return ret; |
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} |
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static int meson_i2c_xfer_messages(struct i2c_adapter *adap, |
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struct i2c_msg *msgs, int num, bool atomic) |
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{ |
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struct meson_i2c *i2c = adap->algo_data; |
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int i, ret = 0; |
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for (i = 0; i < num; i++) { |
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ret = meson_i2c_xfer_msg(i2c, msgs + i, i == num - 1, atomic); |
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if (ret) |
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break; |
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} |
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return ret ?: i; |
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} |
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static int meson_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, |
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int num) |
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{ |
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return meson_i2c_xfer_messages(adap, msgs, num, false); |
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} |
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static int meson_i2c_xfer_atomic(struct i2c_adapter *adap, |
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struct i2c_msg *msgs, int num) |
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{ |
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return meson_i2c_xfer_messages(adap, msgs, num, true); |
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} |
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static u32 meson_i2c_func(struct i2c_adapter *adap) |
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{ |
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
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} |
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static const struct i2c_algorithm meson_i2c_algorithm = { |
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.master_xfer = meson_i2c_xfer, |
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.master_xfer_atomic = meson_i2c_xfer_atomic, |
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.functionality = meson_i2c_func, |
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}; |
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static int meson_i2c_probe(struct platform_device *pdev) |
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{ |
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struct device_node *np = pdev->dev.of_node; |
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struct meson_i2c *i2c; |
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struct i2c_timings timings; |
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int irq, ret = 0; |
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i2c = devm_kzalloc(&pdev->dev, sizeof(struct meson_i2c), GFP_KERNEL); |
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if (!i2c) |
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return -ENOMEM; |
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i2c_parse_fw_timings(&pdev->dev, &timings, true); |
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i2c->dev = &pdev->dev; |
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platform_set_drvdata(pdev, i2c); |
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spin_lock_init(&i2c->lock); |
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init_completion(&i2c->done); |
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i2c->data = (const struct meson_i2c_data *) |
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of_device_get_match_data(&pdev->dev); |
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i2c->clk = devm_clk_get(&pdev->dev, NULL); |
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if (IS_ERR(i2c->clk)) { |
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dev_err(&pdev->dev, "can't get device clock\n"); |
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return PTR_ERR(i2c->clk); |
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} |
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i2c->regs = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(i2c->regs)) |
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return PTR_ERR(i2c->regs); |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) |
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return irq; |
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ret = devm_request_irq(&pdev->dev, irq, meson_i2c_irq, 0, NULL, i2c); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "can't request IRQ\n"); |
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return ret; |
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} |
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ret = clk_prepare_enable(i2c->clk); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "can't prepare clock\n"); |
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return ret; |
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} |
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strlcpy(i2c->adap.name, "Meson I2C adapter", |
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sizeof(i2c->adap.name)); |
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i2c->adap.owner = THIS_MODULE; |
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i2c->adap.algo = &meson_i2c_algorithm; |
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i2c->adap.dev.parent = &pdev->dev; |
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i2c->adap.dev.of_node = np; |
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i2c->adap.algo_data = i2c; |
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/* |
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* A transfer is triggered when START bit changes from 0 to 1. |
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* Ensure that the bit is set to 0 after probe |
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*/ |
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meson_i2c_set_mask(i2c, REG_CTRL, REG_CTRL_START, 0); |
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ret = i2c_add_adapter(&i2c->adap); |
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if (ret < 0) { |
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clk_disable_unprepare(i2c->clk); |
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return ret; |
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} |
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/* Disable filtering */ |
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meson_i2c_set_mask(i2c, REG_SLAVE_ADDR, |
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REG_SLV_SDA_FILTER | REG_SLV_SCL_FILTER, 0); |
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meson_i2c_set_clk_div(i2c, timings.bus_freq_hz); |
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return 0; |
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} |
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static int meson_i2c_remove(struct platform_device *pdev) |
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{ |
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struct meson_i2c *i2c = platform_get_drvdata(pdev); |
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i2c_del_adapter(&i2c->adap); |
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clk_disable_unprepare(i2c->clk); |
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return 0; |
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} |
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static const struct meson_i2c_data i2c_meson6_data = { |
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.div_factor = 4, |
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}; |
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static const struct meson_i2c_data i2c_gxbb_data = { |
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.div_factor = 4, |
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}; |
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static const struct meson_i2c_data i2c_axg_data = { |
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.div_factor = 3, |
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}; |
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static const struct of_device_id meson_i2c_match[] = { |
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{ .compatible = "amlogic,meson6-i2c", .data = &i2c_meson6_data }, |
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{ .compatible = "amlogic,meson-gxbb-i2c", .data = &i2c_gxbb_data }, |
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{ .compatible = "amlogic,meson-axg-i2c", .data = &i2c_axg_data }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, meson_i2c_match); |
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static struct platform_driver meson_i2c_driver = { |
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.probe = meson_i2c_probe, |
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.remove = meson_i2c_remove, |
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.driver = { |
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.name = "meson-i2c", |
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.of_match_table = meson_i2c_match, |
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}, |
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}; |
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module_platform_driver(meson_i2c_driver); |
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MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver"); |
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MODULE_AUTHOR("Beniamino Galvani <[email protected]>"); |
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MODULE_LICENSE("GPL v2");
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