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870 lines
21 KiB
870 lines
21 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Ingenic JZ4780 I2C bus driver |
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* |
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* Copyright (C) 2006 - 2009 Ingenic Semiconductor Inc. |
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* Copyright (C) 2015 Imagination Technologies |
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* Copyright (C) 2019 周琰杰 (Zhou Yanjie) <[email protected]> |
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*/ |
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|
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#include <linux/bitops.h> |
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#include <linux/clk.h> |
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#include <linux/completion.h> |
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#include <linux/delay.h> |
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#include <linux/errno.h> |
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#include <linux/i2c.h> |
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#include <linux/init.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/sched.h> |
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#include <linux/slab.h> |
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#include <linux/time.h> |
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#define JZ4780_I2C_CTRL 0x00 |
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#define JZ4780_I2C_TAR 0x04 |
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#define JZ4780_I2C_SAR 0x08 |
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#define JZ4780_I2C_DC 0x10 |
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#define JZ4780_I2C_SHCNT 0x14 |
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#define JZ4780_I2C_SLCNT 0x18 |
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#define JZ4780_I2C_FHCNT 0x1C |
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#define JZ4780_I2C_FLCNT 0x20 |
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#define JZ4780_I2C_INTST 0x2C |
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#define JZ4780_I2C_INTM 0x30 |
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#define JZ4780_I2C_RXTL 0x38 |
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#define JZ4780_I2C_TXTL 0x3C |
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#define JZ4780_I2C_CINTR 0x40 |
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#define JZ4780_I2C_CRXUF 0x44 |
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#define JZ4780_I2C_CRXOF 0x48 |
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#define JZ4780_I2C_CTXOF 0x4C |
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#define JZ4780_I2C_CRXREQ 0x50 |
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#define JZ4780_I2C_CTXABRT 0x54 |
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#define JZ4780_I2C_CRXDONE 0x58 |
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#define JZ4780_I2C_CACT 0x5C |
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#define JZ4780_I2C_CSTP 0x60 |
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#define JZ4780_I2C_CSTT 0x64 |
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#define JZ4780_I2C_CGC 0x68 |
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#define JZ4780_I2C_ENB 0x6C |
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#define JZ4780_I2C_STA 0x70 |
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#define JZ4780_I2C_TXABRT 0x80 |
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#define JZ4780_I2C_DMACR 0x88 |
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#define JZ4780_I2C_DMATDLR 0x8C |
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#define JZ4780_I2C_DMARDLR 0x90 |
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#define JZ4780_I2C_SDASU 0x94 |
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#define JZ4780_I2C_ACKGC 0x98 |
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#define JZ4780_I2C_ENSTA 0x9C |
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#define JZ4780_I2C_SDAHD 0xD0 |
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#define X1000_I2C_SDAHD 0x7C |
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#define JZ4780_I2C_CTRL_STPHLD BIT(7) |
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#define JZ4780_I2C_CTRL_SLVDIS BIT(6) |
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#define JZ4780_I2C_CTRL_REST BIT(5) |
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#define JZ4780_I2C_CTRL_MATP BIT(4) |
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#define JZ4780_I2C_CTRL_SATP BIT(3) |
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#define JZ4780_I2C_CTRL_SPDF BIT(2) |
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#define JZ4780_I2C_CTRL_SPDS BIT(1) |
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#define JZ4780_I2C_CTRL_MD BIT(0) |
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#define JZ4780_I2C_STA_SLVACT BIT(6) |
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#define JZ4780_I2C_STA_MSTACT BIT(5) |
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#define JZ4780_I2C_STA_RFF BIT(4) |
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#define JZ4780_I2C_STA_RFNE BIT(3) |
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#define JZ4780_I2C_STA_TFE BIT(2) |
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#define JZ4780_I2C_STA_TFNF BIT(1) |
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#define JZ4780_I2C_STA_ACT BIT(0) |
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#define X1000_I2C_DC_STOP BIT(9) |
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#define JZ4780_I2C_INTST_IGC BIT(11) |
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#define JZ4780_I2C_INTST_ISTT BIT(10) |
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#define JZ4780_I2C_INTST_ISTP BIT(9) |
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#define JZ4780_I2C_INTST_IACT BIT(8) |
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#define JZ4780_I2C_INTST_RXDN BIT(7) |
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#define JZ4780_I2C_INTST_TXABT BIT(6) |
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#define JZ4780_I2C_INTST_RDREQ BIT(5) |
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#define JZ4780_I2C_INTST_TXEMP BIT(4) |
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#define JZ4780_I2C_INTST_TXOF BIT(3) |
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#define JZ4780_I2C_INTST_RXFL BIT(2) |
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#define JZ4780_I2C_INTST_RXOF BIT(1) |
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#define JZ4780_I2C_INTST_RXUF BIT(0) |
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#define JZ4780_I2C_INTM_MIGC BIT(11) |
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#define JZ4780_I2C_INTM_MISTT BIT(10) |
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#define JZ4780_I2C_INTM_MISTP BIT(9) |
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#define JZ4780_I2C_INTM_MIACT BIT(8) |
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#define JZ4780_I2C_INTM_MRXDN BIT(7) |
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#define JZ4780_I2C_INTM_MTXABT BIT(6) |
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#define JZ4780_I2C_INTM_MRDREQ BIT(5) |
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#define JZ4780_I2C_INTM_MTXEMP BIT(4) |
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#define JZ4780_I2C_INTM_MTXOF BIT(3) |
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#define JZ4780_I2C_INTM_MRXFL BIT(2) |
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#define JZ4780_I2C_INTM_MRXOF BIT(1) |
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#define JZ4780_I2C_INTM_MRXUF BIT(0) |
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#define JZ4780_I2C_DC_READ BIT(8) |
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#define JZ4780_I2C_SDAHD_HDENB BIT(8) |
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#define JZ4780_I2C_ENB_I2C BIT(0) |
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#define JZ4780_I2CSHCNT_ADJUST(n) (((n) - 8) < 6 ? 6 : ((n) - 8)) |
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#define JZ4780_I2CSLCNT_ADJUST(n) (((n) - 1) < 8 ? 8 : ((n) - 1)) |
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#define JZ4780_I2CFHCNT_ADJUST(n) (((n) - 8) < 6 ? 6 : ((n) - 8)) |
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#define JZ4780_I2CFLCNT_ADJUST(n) (((n) - 1) < 8 ? 8 : ((n) - 1)) |
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#define JZ4780_I2C_FIFO_LEN 16 |
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#define X1000_I2C_FIFO_LEN 64 |
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#define JZ4780_I2C_TIMEOUT 300 |
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#define BUFSIZE 200 |
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enum ingenic_i2c_version { |
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ID_JZ4780, |
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ID_X1000, |
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}; |
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/* ingenic_i2c_config: SoC specific config data. */ |
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struct ingenic_i2c_config { |
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enum ingenic_i2c_version version; |
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int fifosize; |
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int tx_level; |
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int rx_level; |
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}; |
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struct jz4780_i2c { |
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void __iomem *iomem; |
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int irq; |
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struct clk *clk; |
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struct i2c_adapter adap; |
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const struct ingenic_i2c_config *cdata; |
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/* lock to protect rbuf and wbuf between xfer_rd/wr and irq handler */ |
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spinlock_t lock; |
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/* beginning of lock scope */ |
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unsigned char *rbuf; |
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int rd_total_len; |
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int rd_data_xfered; |
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int rd_cmd_xfered; |
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unsigned char *wbuf; |
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int wt_len; |
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int is_write; |
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int stop_hold; |
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int speed; |
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int data_buf[BUFSIZE]; |
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int cmd_buf[BUFSIZE]; |
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int cmd; |
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/* end of lock scope */ |
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struct completion trans_waitq; |
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}; |
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static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c, |
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unsigned long offset) |
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{ |
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return readw(i2c->iomem + offset); |
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} |
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static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c, |
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unsigned long offset, unsigned short val) |
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{ |
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writew(val, i2c->iomem + offset); |
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} |
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static int jz4780_i2c_disable(struct jz4780_i2c *i2c) |
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{ |
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unsigned short regval; |
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unsigned long loops = 5; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0); |
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do { |
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regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA); |
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if (!(regval & JZ4780_I2C_ENB_I2C)) |
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return 0; |
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usleep_range(5000, 15000); |
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} while (--loops); |
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dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval); |
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return -ETIMEDOUT; |
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} |
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static int jz4780_i2c_enable(struct jz4780_i2c *i2c) |
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{ |
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unsigned short regval; |
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unsigned long loops = 5; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 1); |
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do { |
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regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA); |
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if (regval & JZ4780_I2C_ENB_I2C) |
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return 0; |
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usleep_range(5000, 15000); |
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} while (--loops); |
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dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval); |
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return -ETIMEDOUT; |
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} |
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static int jz4780_i2c_set_target(struct jz4780_i2c *i2c, unsigned char address) |
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{ |
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unsigned short regval; |
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unsigned long loops = 5; |
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do { |
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regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA); |
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if ((regval & JZ4780_I2C_STA_TFE) && |
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!(regval & JZ4780_I2C_STA_MSTACT)) |
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break; |
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usleep_range(5000, 15000); |
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} while (--loops); |
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if (loops) { |
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jz4780_i2c_writew(i2c, JZ4780_I2C_TAR, address); |
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return 0; |
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} |
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dev_err(&i2c->adap.dev, |
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"set device to address 0x%02x failed, STA=0x%04x\n", |
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address, regval); |
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return -ENXIO; |
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} |
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static int jz4780_i2c_set_speed(struct jz4780_i2c *i2c) |
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{ |
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int dev_clk_khz = clk_get_rate(i2c->clk) / 1000; |
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int cnt_high = 0; /* HIGH period count of the SCL clock */ |
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int cnt_low = 0; /* LOW period count of the SCL clock */ |
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int cnt_period = 0; /* period count of the SCL clock */ |
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int setup_time = 0; |
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int hold_time = 0; |
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unsigned short tmp = 0; |
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int i2c_clk = i2c->speed; |
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if (jz4780_i2c_disable(i2c)) |
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dev_dbg(&i2c->adap.dev, "i2c not disabled\n"); |
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/* |
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* 1 JZ4780_I2C cycle equals to cnt_period PCLK(i2c_clk) |
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* standard mode, min LOW and HIGH period are 4700 ns and 4000 ns |
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* fast mode, min LOW and HIGH period are 1300 ns and 600 ns |
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*/ |
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cnt_period = dev_clk_khz / i2c_clk; |
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if (i2c_clk <= 100) |
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cnt_high = (cnt_period * 4000) / (4700 + 4000); |
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else |
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cnt_high = (cnt_period * 600) / (1300 + 600); |
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cnt_low = cnt_period - cnt_high; |
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/* |
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* NOTE: JZ4780_I2C_CTRL_REST can't set when i2c enabled, because |
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* normal read are 2 messages, we cannot disable i2c controller |
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* between these two messages, this means that we must always set |
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* JZ4780_I2C_CTRL_REST when init JZ4780_I2C_CTRL |
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* |
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*/ |
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if (i2c_clk <= 100) { |
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tmp = JZ4780_I2C_CTRL_SPDS | JZ4780_I2C_CTRL_REST |
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| JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
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jz4780_i2c_writew(i2c, JZ4780_I2C_SHCNT, |
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JZ4780_I2CSHCNT_ADJUST(cnt_high)); |
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jz4780_i2c_writew(i2c, JZ4780_I2C_SLCNT, |
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JZ4780_I2CSLCNT_ADJUST(cnt_low)); |
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} else { |
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tmp = JZ4780_I2C_CTRL_SPDF | JZ4780_I2C_CTRL_REST |
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| JZ4780_I2C_CTRL_SLVDIS | JZ4780_I2C_CTRL_MD; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
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jz4780_i2c_writew(i2c, JZ4780_I2C_FHCNT, |
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JZ4780_I2CFHCNT_ADJUST(cnt_high)); |
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jz4780_i2c_writew(i2c, JZ4780_I2C_FLCNT, |
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JZ4780_I2CFLCNT_ADJUST(cnt_low)); |
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} |
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/* |
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* a i2c device must internally provide a hold time at least 300ns |
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* tHD:DAT |
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* Standard Mode: min=300ns, max=3450ns |
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* Fast Mode: min=0ns, max=900ns |
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* tSU:DAT |
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* Standard Mode: min=250ns, max=infinite |
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* Fast Mode: min=100(250ns is recommended), max=infinite |
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* |
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* 1i2c_clk = 10^6 / dev_clk_khz |
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* on FPGA, dev_clk_khz = 12000, so 1i2c_clk = 1000/12 = 83ns |
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* on Pisces(1008M), dev_clk_khz=126000, so 1i2c_clk = 1000 / 126 = 8ns |
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* |
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* The actual hold time is (SDAHD + 1) * (i2c_clk period). |
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* |
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* Length of setup time calculated using (SDASU - 1) * (ic_clk_period) |
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* |
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*/ |
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if (i2c_clk <= 100) { /* standard mode */ |
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setup_time = 300; |
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hold_time = 400; |
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} else { |
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setup_time = 450; |
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hold_time = 450; |
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} |
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hold_time = ((hold_time * dev_clk_khz) / 1000000) - 1; |
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setup_time = ((setup_time * dev_clk_khz) / 1000000) + 1; |
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if (setup_time > 255) |
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setup_time = 255; |
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if (setup_time <= 0) |
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setup_time = 1; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_SDASU, setup_time); |
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if (hold_time > 255) |
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hold_time = 255; |
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if (hold_time >= 0) { |
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/*i2c hold time enable */ |
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if (i2c->cdata->version >= ID_X1000) { |
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jz4780_i2c_writew(i2c, X1000_I2C_SDAHD, hold_time); |
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} else { |
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hold_time |= JZ4780_I2C_SDAHD_HDENB; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, hold_time); |
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} |
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} else { |
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/* disable hold time */ |
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if (i2c->cdata->version >= ID_X1000) |
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jz4780_i2c_writew(i2c, X1000_I2C_SDAHD, 0); |
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else |
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jz4780_i2c_writew(i2c, JZ4780_I2C_SDAHD, 0); |
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} |
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return 0; |
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} |
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static int jz4780_i2c_cleanup(struct jz4780_i2c *i2c) |
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{ |
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int ret; |
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unsigned long flags; |
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unsigned short tmp; |
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spin_lock_irqsave(&i2c->lock, flags); |
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/* can send stop now if need */ |
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if (i2c->cdata->version < ID_X1000) { |
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tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL); |
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tmp &= ~JZ4780_I2C_CTRL_STPHLD; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
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} |
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/* disable all interrupts first */ |
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jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0); |
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|
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/* then clear all interrupts */ |
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jz4780_i2c_readw(i2c, JZ4780_I2C_CTXABRT); |
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jz4780_i2c_readw(i2c, JZ4780_I2C_CINTR); |
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/* then disable the controller */ |
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tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL); |
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tmp &= ~JZ4780_I2C_ENB_I2C; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
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udelay(10); |
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tmp |= JZ4780_I2C_ENB_I2C; |
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jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
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spin_unlock_irqrestore(&i2c->lock, flags); |
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ret = jz4780_i2c_disable(i2c); |
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if (ret) |
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dev_err(&i2c->adap.dev, |
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"unable to disable device during cleanup!\n"); |
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if (unlikely(jz4780_i2c_readw(i2c, JZ4780_I2C_INTM) |
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& jz4780_i2c_readw(i2c, JZ4780_I2C_INTST))) |
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dev_err(&i2c->adap.dev, |
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"device has interrupts after a complete cleanup!\n"); |
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return ret; |
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} |
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static int jz4780_i2c_prepare(struct jz4780_i2c *i2c) |
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{ |
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jz4780_i2c_set_speed(i2c); |
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return jz4780_i2c_enable(i2c); |
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} |
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static void jz4780_i2c_send_rcmd(struct jz4780_i2c *i2c, |
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int cmd_count, |
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int cmd_left) |
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{ |
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int i; |
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for (i = 0; i < cmd_count - 1; i++) |
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jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ); |
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if ((cmd_left == 0) && (i2c->cdata->version >= ID_X1000)) |
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jz4780_i2c_writew(i2c, JZ4780_I2C_DC, |
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JZ4780_I2C_DC_READ | X1000_I2C_DC_STOP); |
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else |
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jz4780_i2c_writew(i2c, JZ4780_I2C_DC, JZ4780_I2C_DC_READ); |
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} |
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static void jz4780_i2c_trans_done(struct jz4780_i2c *i2c) |
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{ |
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jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0); |
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complete(&i2c->trans_waitq); |
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} |
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static irqreturn_t jz4780_i2c_irq(int irqno, void *dev_id) |
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{ |
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unsigned short tmp; |
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unsigned short intst; |
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unsigned short intmsk; |
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struct jz4780_i2c *i2c = dev_id; |
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spin_lock(&i2c->lock); |
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intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM); |
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intst = jz4780_i2c_readw(i2c, JZ4780_I2C_INTST); |
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intst &= intmsk; |
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if (intst & JZ4780_I2C_INTST_TXABT) { |
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jz4780_i2c_trans_done(i2c); |
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goto done; |
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} |
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if (intst & JZ4780_I2C_INTST_RXOF) { |
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dev_dbg(&i2c->adap.dev, "received fifo overflow!\n"); |
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jz4780_i2c_trans_done(i2c); |
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goto done; |
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} |
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|
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/* |
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* When reading, always drain RX FIFO before we send more Read |
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* Commands to avoid fifo overrun |
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*/ |
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if (i2c->is_write == 0) { |
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int rd_left; |
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|
|
while ((jz4780_i2c_readw(i2c, JZ4780_I2C_STA) |
|
& JZ4780_I2C_STA_RFNE)) { |
|
*(i2c->rbuf++) = jz4780_i2c_readw(i2c, JZ4780_I2C_DC) |
|
& 0xff; |
|
i2c->rd_data_xfered++; |
|
if (i2c->rd_data_xfered == i2c->rd_total_len) { |
|
jz4780_i2c_trans_done(i2c); |
|
goto done; |
|
} |
|
} |
|
|
|
rd_left = i2c->rd_total_len - i2c->rd_data_xfered; |
|
|
|
if (rd_left <= i2c->cdata->fifosize) |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, rd_left - 1); |
|
} |
|
|
|
if (intst & JZ4780_I2C_INTST_TXEMP) { |
|
if (i2c->is_write == 0) { |
|
int cmd_left = i2c->rd_total_len - i2c->rd_cmd_xfered; |
|
int max_send = (i2c->cdata->fifosize - 1) |
|
- (i2c->rd_cmd_xfered |
|
- i2c->rd_data_xfered); |
|
int cmd_to_send = min(cmd_left, max_send); |
|
|
|
if (i2c->rd_cmd_xfered != 0) |
|
cmd_to_send = min(cmd_to_send, |
|
i2c->cdata->fifosize |
|
- i2c->cdata->tx_level - 1); |
|
|
|
if (cmd_to_send) { |
|
i2c->rd_cmd_xfered += cmd_to_send; |
|
cmd_left = i2c->rd_total_len - |
|
i2c->rd_cmd_xfered; |
|
jz4780_i2c_send_rcmd(i2c, |
|
cmd_to_send, cmd_left); |
|
|
|
} |
|
|
|
if (cmd_left == 0) { |
|
intmsk = jz4780_i2c_readw(i2c, JZ4780_I2C_INTM); |
|
intmsk &= ~JZ4780_I2C_INTM_MTXEMP; |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, intmsk); |
|
|
|
if (i2c->cdata->version < ID_X1000) { |
|
tmp = jz4780_i2c_readw(i2c, |
|
JZ4780_I2C_CTRL); |
|
tmp &= ~JZ4780_I2C_CTRL_STPHLD; |
|
jz4780_i2c_writew(i2c, |
|
JZ4780_I2C_CTRL, tmp); |
|
} |
|
} |
|
} else { |
|
unsigned short data; |
|
unsigned short i2c_sta; |
|
|
|
i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA); |
|
|
|
while ((i2c_sta & JZ4780_I2C_STA_TFNF) && |
|
(i2c->wt_len > 0)) { |
|
i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA); |
|
data = *i2c->wbuf; |
|
data &= ~JZ4780_I2C_DC_READ; |
|
if ((i2c->wt_len == 1) && (!i2c->stop_hold) && |
|
(i2c->cdata->version >= ID_X1000)) |
|
data |= X1000_I2C_DC_STOP; |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_DC, data); |
|
i2c->wbuf++; |
|
i2c->wt_len--; |
|
} |
|
|
|
if (i2c->wt_len == 0) { |
|
if ((!i2c->stop_hold) && (i2c->cdata->version < |
|
ID_X1000)) { |
|
tmp = jz4780_i2c_readw(i2c, |
|
JZ4780_I2C_CTRL); |
|
tmp &= ~JZ4780_I2C_CTRL_STPHLD; |
|
jz4780_i2c_writew(i2c, |
|
JZ4780_I2C_CTRL, tmp); |
|
} |
|
|
|
jz4780_i2c_trans_done(i2c); |
|
goto done; |
|
} |
|
} |
|
} |
|
|
|
done: |
|
spin_unlock(&i2c->lock); |
|
return IRQ_HANDLED; |
|
} |
|
|
|
static void jz4780_i2c_txabrt(struct jz4780_i2c *i2c, int src) |
|
{ |
|
dev_dbg(&i2c->adap.dev, "txabrt: 0x%08x, cmd: %d, send: %d, recv: %d\n", |
|
src, i2c->cmd, i2c->cmd_buf[i2c->cmd], i2c->data_buf[i2c->cmd]); |
|
} |
|
|
|
static inline int jz4780_i2c_xfer_read(struct jz4780_i2c *i2c, |
|
unsigned char *buf, int len, int cnt, |
|
int idx) |
|
{ |
|
int ret = 0; |
|
long timeout; |
|
int wait_time = JZ4780_I2C_TIMEOUT * (len + 5); |
|
unsigned short tmp; |
|
unsigned long flags; |
|
|
|
memset(buf, 0, len); |
|
|
|
spin_lock_irqsave(&i2c->lock, flags); |
|
|
|
i2c->stop_hold = 0; |
|
i2c->is_write = 0; |
|
i2c->rbuf = buf; |
|
i2c->rd_total_len = len; |
|
i2c->rd_data_xfered = 0; |
|
i2c->rd_cmd_xfered = 0; |
|
|
|
if (len <= i2c->cdata->fifosize) |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, len - 1); |
|
else |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_RXTL, i2c->cdata->rx_level); |
|
|
|
jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, i2c->cdata->tx_level); |
|
|
|
jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, |
|
JZ4780_I2C_INTM_MRXFL | JZ4780_I2C_INTM_MTXEMP |
|
| JZ4780_I2C_INTM_MTXABT | JZ4780_I2C_INTM_MRXOF); |
|
|
|
if (i2c->cdata->version < ID_X1000) { |
|
tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL); |
|
tmp |= JZ4780_I2C_CTRL_STPHLD; |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
|
} |
|
|
|
spin_unlock_irqrestore(&i2c->lock, flags); |
|
|
|
timeout = wait_for_completion_timeout(&i2c->trans_waitq, |
|
msecs_to_jiffies(wait_time)); |
|
|
|
if (!timeout) { |
|
dev_err(&i2c->adap.dev, "irq read timeout\n"); |
|
dev_dbg(&i2c->adap.dev, "send cmd count:%d %d\n", |
|
i2c->cmd, i2c->cmd_buf[i2c->cmd]); |
|
dev_dbg(&i2c->adap.dev, "receive data count:%d %d\n", |
|
i2c->cmd, i2c->data_buf[i2c->cmd]); |
|
ret = -EIO; |
|
} |
|
|
|
tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT); |
|
if (tmp) { |
|
jz4780_i2c_txabrt(i2c, tmp); |
|
ret = -EIO; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static inline int jz4780_i2c_xfer_write(struct jz4780_i2c *i2c, |
|
unsigned char *buf, int len, |
|
int cnt, int idx) |
|
{ |
|
int ret = 0; |
|
int wait_time = JZ4780_I2C_TIMEOUT * (len + 5); |
|
long timeout; |
|
unsigned short tmp; |
|
unsigned long flags; |
|
|
|
spin_lock_irqsave(&i2c->lock, flags); |
|
|
|
if (idx < (cnt - 1)) |
|
i2c->stop_hold = 1; |
|
else |
|
i2c->stop_hold = 0; |
|
|
|
i2c->is_write = 1; |
|
i2c->wbuf = buf; |
|
i2c->wt_len = len; |
|
|
|
jz4780_i2c_writew(i2c, JZ4780_I2C_TXTL, i2c->cdata->tx_level); |
|
|
|
jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, JZ4780_I2C_INTM_MTXEMP |
|
| JZ4780_I2C_INTM_MTXABT); |
|
|
|
if (i2c->cdata->version < ID_X1000) { |
|
tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL); |
|
tmp |= JZ4780_I2C_CTRL_STPHLD; |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
|
} |
|
|
|
spin_unlock_irqrestore(&i2c->lock, flags); |
|
|
|
timeout = wait_for_completion_timeout(&i2c->trans_waitq, |
|
msecs_to_jiffies(wait_time)); |
|
if (timeout && !i2c->stop_hold) { |
|
unsigned short i2c_sta; |
|
int write_in_process; |
|
|
|
timeout = JZ4780_I2C_TIMEOUT * 100; |
|
for (; timeout > 0; timeout--) { |
|
i2c_sta = jz4780_i2c_readw(i2c, JZ4780_I2C_STA); |
|
|
|
write_in_process = (i2c_sta & JZ4780_I2C_STA_MSTACT) || |
|
!(i2c_sta & JZ4780_I2C_STA_TFE); |
|
if (!write_in_process) |
|
break; |
|
udelay(10); |
|
} |
|
} |
|
|
|
if (!timeout) { |
|
dev_err(&i2c->adap.dev, "write wait timeout\n"); |
|
ret = -EIO; |
|
} |
|
|
|
tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_TXABRT); |
|
if (tmp) { |
|
jz4780_i2c_txabrt(i2c, tmp); |
|
ret = -EIO; |
|
} |
|
|
|
return ret; |
|
} |
|
|
|
static int jz4780_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, |
|
int count) |
|
{ |
|
int i = -EIO; |
|
int ret = 0; |
|
struct jz4780_i2c *i2c = adap->algo_data; |
|
|
|
ret = jz4780_i2c_prepare(i2c); |
|
if (ret) { |
|
dev_err(&i2c->adap.dev, "I2C prepare failed\n"); |
|
goto out; |
|
} |
|
|
|
if (msg->addr != jz4780_i2c_readw(i2c, JZ4780_I2C_TAR)) { |
|
ret = jz4780_i2c_set_target(i2c, msg->addr); |
|
if (ret) |
|
goto out; |
|
} |
|
for (i = 0; i < count; i++, msg++) { |
|
if (msg->flags & I2C_M_RD) |
|
ret = jz4780_i2c_xfer_read(i2c, msg->buf, msg->len, |
|
count, i); |
|
else |
|
ret = jz4780_i2c_xfer_write(i2c, msg->buf, msg->len, |
|
count, i); |
|
|
|
if (ret) |
|
goto out; |
|
} |
|
|
|
ret = i; |
|
|
|
out: |
|
jz4780_i2c_cleanup(i2c); |
|
return ret; |
|
} |
|
|
|
static u32 jz4780_i2c_functionality(struct i2c_adapter *adap) |
|
{ |
|
return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
|
} |
|
|
|
static const struct i2c_algorithm jz4780_i2c_algorithm = { |
|
.master_xfer = jz4780_i2c_xfer, |
|
.functionality = jz4780_i2c_functionality, |
|
}; |
|
|
|
static const struct ingenic_i2c_config jz4780_i2c_config = { |
|
.version = ID_JZ4780, |
|
|
|
.fifosize = JZ4780_I2C_FIFO_LEN, |
|
.tx_level = JZ4780_I2C_FIFO_LEN / 2, |
|
.rx_level = JZ4780_I2C_FIFO_LEN / 2 - 1, |
|
}; |
|
|
|
static const struct ingenic_i2c_config x1000_i2c_config = { |
|
.version = ID_X1000, |
|
|
|
.fifosize = X1000_I2C_FIFO_LEN, |
|
.tx_level = X1000_I2C_FIFO_LEN / 2, |
|
.rx_level = X1000_I2C_FIFO_LEN / 2 - 1, |
|
}; |
|
|
|
static const struct of_device_id jz4780_i2c_of_matches[] = { |
|
{ .compatible = "ingenic,jz4770-i2c", .data = &jz4780_i2c_config }, |
|
{ .compatible = "ingenic,jz4780-i2c", .data = &jz4780_i2c_config }, |
|
{ .compatible = "ingenic,x1000-i2c", .data = &x1000_i2c_config }, |
|
{ /* sentinel */ } |
|
}; |
|
MODULE_DEVICE_TABLE(of, jz4780_i2c_of_matches); |
|
|
|
static int jz4780_i2c_probe(struct platform_device *pdev) |
|
{ |
|
int ret = 0; |
|
unsigned int clk_freq = 0; |
|
unsigned short tmp; |
|
struct jz4780_i2c *i2c; |
|
|
|
i2c = devm_kzalloc(&pdev->dev, sizeof(struct jz4780_i2c), GFP_KERNEL); |
|
if (!i2c) |
|
return -ENOMEM; |
|
|
|
i2c->cdata = device_get_match_data(&pdev->dev); |
|
if (!i2c->cdata) { |
|
dev_err(&pdev->dev, "Error: No device match found\n"); |
|
return -ENODEV; |
|
} |
|
|
|
i2c->adap.owner = THIS_MODULE; |
|
i2c->adap.algo = &jz4780_i2c_algorithm; |
|
i2c->adap.algo_data = i2c; |
|
i2c->adap.retries = 5; |
|
i2c->adap.dev.parent = &pdev->dev; |
|
i2c->adap.dev.of_node = pdev->dev.of_node; |
|
sprintf(i2c->adap.name, "%s", pdev->name); |
|
|
|
init_completion(&i2c->trans_waitq); |
|
spin_lock_init(&i2c->lock); |
|
|
|
i2c->iomem = devm_platform_ioremap_resource(pdev, 0); |
|
if (IS_ERR(i2c->iomem)) |
|
return PTR_ERR(i2c->iomem); |
|
|
|
platform_set_drvdata(pdev, i2c); |
|
|
|
i2c->clk = devm_clk_get(&pdev->dev, NULL); |
|
if (IS_ERR(i2c->clk)) |
|
return PTR_ERR(i2c->clk); |
|
|
|
ret = clk_prepare_enable(i2c->clk); |
|
if (ret) |
|
return ret; |
|
|
|
ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", |
|
&clk_freq); |
|
if (ret) { |
|
dev_err(&pdev->dev, "clock-frequency not specified in DT\n"); |
|
goto err; |
|
} |
|
|
|
i2c->speed = clk_freq / 1000; |
|
if (i2c->speed == 0) { |
|
ret = -EINVAL; |
|
dev_err(&pdev->dev, "clock-frequency minimum is 1000\n"); |
|
goto err; |
|
} |
|
jz4780_i2c_set_speed(i2c); |
|
|
|
dev_info(&pdev->dev, "Bus frequency is %d KHz\n", i2c->speed); |
|
|
|
if (i2c->cdata->version < ID_X1000) { |
|
tmp = jz4780_i2c_readw(i2c, JZ4780_I2C_CTRL); |
|
tmp &= ~JZ4780_I2C_CTRL_STPHLD; |
|
jz4780_i2c_writew(i2c, JZ4780_I2C_CTRL, tmp); |
|
} |
|
|
|
jz4780_i2c_writew(i2c, JZ4780_I2C_INTM, 0x0); |
|
|
|
ret = platform_get_irq(pdev, 0); |
|
if (ret < 0) |
|
goto err; |
|
i2c->irq = ret; |
|
ret = devm_request_irq(&pdev->dev, i2c->irq, jz4780_i2c_irq, 0, |
|
dev_name(&pdev->dev), i2c); |
|
if (ret) |
|
goto err; |
|
|
|
ret = i2c_add_adapter(&i2c->adap); |
|
if (ret < 0) |
|
goto err; |
|
|
|
return 0; |
|
|
|
err: |
|
clk_disable_unprepare(i2c->clk); |
|
return ret; |
|
} |
|
|
|
static int jz4780_i2c_remove(struct platform_device *pdev) |
|
{ |
|
struct jz4780_i2c *i2c = platform_get_drvdata(pdev); |
|
|
|
clk_disable_unprepare(i2c->clk); |
|
i2c_del_adapter(&i2c->adap); |
|
return 0; |
|
} |
|
|
|
static struct platform_driver jz4780_i2c_driver = { |
|
.probe = jz4780_i2c_probe, |
|
.remove = jz4780_i2c_remove, |
|
.driver = { |
|
.name = "jz4780-i2c", |
|
.of_match_table = jz4780_i2c_of_matches, |
|
}, |
|
}; |
|
|
|
module_platform_driver(jz4780_i2c_driver); |
|
|
|
MODULE_LICENSE("GPL"); |
|
MODULE_AUTHOR("ztyan<[email protected]>"); |
|
MODULE_DESCRIPTION("i2c driver for JZ4780 SoCs");
|
|
|