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336 lines
8.0 KiB
336 lines
8.0 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2009-2011 Gabor Juhos <[email protected]> |
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* Copyright (C) 2013 John Crispin <[email protected]> |
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*/ |
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#include <linux/err.h> |
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#include <linux/gpio/driver.h> |
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#include <linux/interrupt.h> |
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#include <linux/io.h> |
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#include <linux/module.h> |
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#include <linux/of_irq.h> |
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#include <linux/platform_device.h> |
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#include <linux/spinlock.h> |
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#define MTK_BANK_CNT 3 |
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#define MTK_BANK_WIDTH 32 |
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#define GPIO_BANK_STRIDE 0x04 |
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#define GPIO_REG_CTRL 0x00 |
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#define GPIO_REG_POL 0x10 |
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#define GPIO_REG_DATA 0x20 |
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#define GPIO_REG_DSET 0x30 |
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#define GPIO_REG_DCLR 0x40 |
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#define GPIO_REG_REDGE 0x50 |
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#define GPIO_REG_FEDGE 0x60 |
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#define GPIO_REG_HLVL 0x70 |
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#define GPIO_REG_LLVL 0x80 |
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#define GPIO_REG_STAT 0x90 |
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#define GPIO_REG_EDGE 0xA0 |
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struct mtk_gc { |
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struct irq_chip irq_chip; |
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struct gpio_chip chip; |
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spinlock_t lock; |
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int bank; |
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u32 rising; |
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u32 falling; |
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u32 hlevel; |
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u32 llevel; |
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}; |
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/** |
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* struct mtk - state container for |
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* data of the platform driver. It is 3 |
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* separate gpio-chip each one with its |
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* own irq_chip. |
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* @dev: device instance |
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* @base: memory base address |
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* @gpio_irq: irq number from the device tree |
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* @gc_map: array of the gpio chips |
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*/ |
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struct mtk { |
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struct device *dev; |
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void __iomem *base; |
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int gpio_irq; |
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struct mtk_gc gc_map[MTK_BANK_CNT]; |
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}; |
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static inline struct mtk_gc * |
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to_mediatek_gpio(struct gpio_chip *chip) |
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{ |
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return container_of(chip, struct mtk_gc, chip); |
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} |
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static inline void |
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mtk_gpio_w32(struct mtk_gc *rg, u32 offset, u32 val) |
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{ |
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struct gpio_chip *gc = &rg->chip; |
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struct mtk *mtk = gpiochip_get_data(gc); |
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offset = (rg->bank * GPIO_BANK_STRIDE) + offset; |
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gc->write_reg(mtk->base + offset, val); |
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} |
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static inline u32 |
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mtk_gpio_r32(struct mtk_gc *rg, u32 offset) |
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{ |
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struct gpio_chip *gc = &rg->chip; |
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struct mtk *mtk = gpiochip_get_data(gc); |
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offset = (rg->bank * GPIO_BANK_STRIDE) + offset; |
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return gc->read_reg(mtk->base + offset); |
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} |
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static irqreturn_t |
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mediatek_gpio_irq_handler(int irq, void *data) |
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{ |
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struct gpio_chip *gc = data; |
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struct mtk_gc *rg = to_mediatek_gpio(gc); |
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irqreturn_t ret = IRQ_NONE; |
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unsigned long pending; |
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int bit; |
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pending = mtk_gpio_r32(rg, GPIO_REG_STAT); |
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for_each_set_bit(bit, &pending, MTK_BANK_WIDTH) { |
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generic_handle_domain_irq(gc->irq.domain, bit); |
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mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit)); |
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ret |= IRQ_HANDLED; |
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} |
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return ret; |
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} |
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static void |
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mediatek_gpio_irq_unmask(struct irq_data *d) |
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{ |
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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struct mtk_gc *rg = to_mediatek_gpio(gc); |
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int pin = d->hwirq; |
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unsigned long flags; |
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u32 rise, fall, high, low; |
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spin_lock_irqsave(&rg->lock, flags); |
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rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); |
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fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE); |
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high = mtk_gpio_r32(rg, GPIO_REG_HLVL); |
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low = mtk_gpio_r32(rg, GPIO_REG_LLVL); |
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mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(pin) & rg->rising)); |
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mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall | (BIT(pin) & rg->falling)); |
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mtk_gpio_w32(rg, GPIO_REG_HLVL, high | (BIT(pin) & rg->hlevel)); |
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mtk_gpio_w32(rg, GPIO_REG_LLVL, low | (BIT(pin) & rg->llevel)); |
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spin_unlock_irqrestore(&rg->lock, flags); |
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} |
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static void |
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mediatek_gpio_irq_mask(struct irq_data *d) |
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{ |
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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struct mtk_gc *rg = to_mediatek_gpio(gc); |
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int pin = d->hwirq; |
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unsigned long flags; |
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u32 rise, fall, high, low; |
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spin_lock_irqsave(&rg->lock, flags); |
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rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); |
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fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE); |
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high = mtk_gpio_r32(rg, GPIO_REG_HLVL); |
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low = mtk_gpio_r32(rg, GPIO_REG_LLVL); |
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mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall & ~BIT(pin)); |
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mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(pin)); |
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mtk_gpio_w32(rg, GPIO_REG_HLVL, high & ~BIT(pin)); |
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mtk_gpio_w32(rg, GPIO_REG_LLVL, low & ~BIT(pin)); |
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spin_unlock_irqrestore(&rg->lock, flags); |
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} |
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static int |
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mediatek_gpio_irq_type(struct irq_data *d, unsigned int type) |
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{ |
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d); |
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struct mtk_gc *rg = to_mediatek_gpio(gc); |
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int pin = d->hwirq; |
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u32 mask = BIT(pin); |
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if (type == IRQ_TYPE_PROBE) { |
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if ((rg->rising | rg->falling | |
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rg->hlevel | rg->llevel) & mask) |
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return 0; |
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type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING; |
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} |
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rg->rising &= ~mask; |
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rg->falling &= ~mask; |
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rg->hlevel &= ~mask; |
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rg->llevel &= ~mask; |
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switch (type & IRQ_TYPE_SENSE_MASK) { |
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case IRQ_TYPE_EDGE_BOTH: |
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rg->rising |= mask; |
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rg->falling |= mask; |
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break; |
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case IRQ_TYPE_EDGE_RISING: |
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rg->rising |= mask; |
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break; |
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case IRQ_TYPE_EDGE_FALLING: |
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rg->falling |= mask; |
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break; |
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case IRQ_TYPE_LEVEL_HIGH: |
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rg->hlevel |= mask; |
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break; |
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case IRQ_TYPE_LEVEL_LOW: |
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rg->llevel |= mask; |
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break; |
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} |
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return 0; |
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} |
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static int |
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mediatek_gpio_xlate(struct gpio_chip *chip, |
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const struct of_phandle_args *spec, u32 *flags) |
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{ |
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int gpio = spec->args[0]; |
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struct mtk_gc *rg = to_mediatek_gpio(chip); |
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if (rg->bank != gpio / MTK_BANK_WIDTH) |
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return -EINVAL; |
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if (flags) |
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*flags = spec->args[1]; |
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return gpio % MTK_BANK_WIDTH; |
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} |
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static int |
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mediatek_gpio_bank_probe(struct device *dev, |
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struct device_node *node, int bank) |
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{ |
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struct mtk *mtk = dev_get_drvdata(dev); |
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struct mtk_gc *rg; |
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void __iomem *dat, *set, *ctrl, *diro; |
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int ret; |
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rg = &mtk->gc_map[bank]; |
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memset(rg, 0, sizeof(*rg)); |
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spin_lock_init(&rg->lock); |
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rg->chip.of_node = node; |
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rg->bank = bank; |
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dat = mtk->base + GPIO_REG_DATA + (rg->bank * GPIO_BANK_STRIDE); |
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set = mtk->base + GPIO_REG_DSET + (rg->bank * GPIO_BANK_STRIDE); |
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ctrl = mtk->base + GPIO_REG_DCLR + (rg->bank * GPIO_BANK_STRIDE); |
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diro = mtk->base + GPIO_REG_CTRL + (rg->bank * GPIO_BANK_STRIDE); |
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ret = bgpio_init(&rg->chip, dev, 4, dat, set, ctrl, diro, NULL, |
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BGPIOF_NO_SET_ON_INPUT); |
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if (ret) { |
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dev_err(dev, "bgpio_init() failed\n"); |
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return ret; |
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} |
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rg->chip.of_gpio_n_cells = 2; |
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rg->chip.of_xlate = mediatek_gpio_xlate; |
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rg->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%s-bank%d", |
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dev_name(dev), bank); |
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if (!rg->chip.label) |
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return -ENOMEM; |
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rg->chip.offset = bank * MTK_BANK_WIDTH; |
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rg->irq_chip.name = dev_name(dev); |
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rg->irq_chip.parent_device = dev; |
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rg->irq_chip.irq_unmask = mediatek_gpio_irq_unmask; |
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rg->irq_chip.irq_mask = mediatek_gpio_irq_mask; |
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rg->irq_chip.irq_mask_ack = mediatek_gpio_irq_mask; |
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rg->irq_chip.irq_set_type = mediatek_gpio_irq_type; |
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if (mtk->gpio_irq) { |
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struct gpio_irq_chip *girq; |
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/* |
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* Directly request the irq here instead of passing |
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* a flow-handler because the irq is shared. |
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*/ |
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ret = devm_request_irq(dev, mtk->gpio_irq, |
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mediatek_gpio_irq_handler, IRQF_SHARED, |
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rg->chip.label, &rg->chip); |
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if (ret) { |
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dev_err(dev, "Error requesting IRQ %d: %d\n", |
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mtk->gpio_irq, ret); |
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return ret; |
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} |
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girq = &rg->chip.irq; |
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girq->chip = &rg->irq_chip; |
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/* This will let us handle the parent IRQ in the driver */ |
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girq->parent_handler = NULL; |
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girq->num_parents = 0; |
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girq->parents = NULL; |
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girq->default_type = IRQ_TYPE_NONE; |
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girq->handler = handle_simple_irq; |
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} |
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ret = devm_gpiochip_add_data(dev, &rg->chip, mtk); |
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if (ret < 0) { |
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dev_err(dev, "Could not register gpio %d, ret=%d\n", |
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rg->chip.ngpio, ret); |
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return ret; |
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} |
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/* set polarity to low for all gpios */ |
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mtk_gpio_w32(rg, GPIO_REG_POL, 0); |
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dev_info(dev, "registering %d gpios\n", rg->chip.ngpio); |
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return 0; |
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} |
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static int |
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mediatek_gpio_probe(struct platform_device *pdev) |
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{ |
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struct device *dev = &pdev->dev; |
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struct device_node *np = dev->of_node; |
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struct mtk *mtk; |
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int i; |
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int ret; |
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mtk = devm_kzalloc(dev, sizeof(*mtk), GFP_KERNEL); |
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if (!mtk) |
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return -ENOMEM; |
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mtk->base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(mtk->base)) |
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return PTR_ERR(mtk->base); |
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mtk->gpio_irq = irq_of_parse_and_map(np, 0); |
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mtk->dev = dev; |
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platform_set_drvdata(pdev, mtk); |
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for (i = 0; i < MTK_BANK_CNT; i++) { |
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ret = mediatek_gpio_bank_probe(dev, np, i); |
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if (ret) |
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return ret; |
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} |
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return 0; |
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} |
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static const struct of_device_id mediatek_gpio_match[] = { |
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{ .compatible = "mediatek,mt7621-gpio" }, |
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{}, |
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}; |
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MODULE_DEVICE_TABLE(of, mediatek_gpio_match); |
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static struct platform_driver mediatek_gpio_driver = { |
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.probe = mediatek_gpio_probe, |
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.driver = { |
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.name = "mt7621_gpio", |
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.of_match_table = mediatek_gpio_match, |
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}, |
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}; |
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builtin_platform_driver(mediatek_gpio_driver);
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