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122 lines
3.5 KiB
122 lines
3.5 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ |
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#define _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ |
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#include <asm/types.h> |
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/** |
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* arch___set_bit - Set a bit in memory |
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* @nr: the bit to set |
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* @addr: the address to start counting from |
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* |
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* Unlike set_bit(), this function is non-atomic and may be reordered. |
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* If it's called on the same region of memory simultaneously, the effect |
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* may be that only one operation succeeds. |
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*/ |
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static __always_inline void |
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arch___set_bit(unsigned int nr, volatile unsigned long *addr) |
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{ |
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unsigned long mask = BIT_MASK(nr); |
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); |
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*p |= mask; |
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} |
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#define __set_bit arch___set_bit |
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static __always_inline void |
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arch___clear_bit(unsigned int nr, volatile unsigned long *addr) |
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{ |
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unsigned long mask = BIT_MASK(nr); |
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); |
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*p &= ~mask; |
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} |
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#define __clear_bit arch___clear_bit |
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/** |
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* arch___change_bit - Toggle a bit in memory |
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* @nr: the bit to change |
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* @addr: the address to start counting from |
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* |
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* Unlike change_bit(), this function is non-atomic and may be reordered. |
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* If it's called on the same region of memory simultaneously, the effect |
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* may be that only one operation succeeds. |
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*/ |
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static __always_inline |
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void arch___change_bit(unsigned int nr, volatile unsigned long *addr) |
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{ |
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unsigned long mask = BIT_MASK(nr); |
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); |
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*p ^= mask; |
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} |
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#define __change_bit arch___change_bit |
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/** |
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* arch___test_and_set_bit - Set a bit and return its old value |
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* @nr: Bit to set |
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* @addr: Address to count from |
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* |
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* This operation is non-atomic and can be reordered. |
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* If two examples of this operation race, one can appear to succeed |
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* but actually fail. You must protect multiple accesses with a lock. |
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*/ |
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static __always_inline int |
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arch___test_and_set_bit(unsigned int nr, volatile unsigned long *addr) |
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{ |
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unsigned long mask = BIT_MASK(nr); |
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); |
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unsigned long old = *p; |
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*p = old | mask; |
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return (old & mask) != 0; |
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} |
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#define __test_and_set_bit arch___test_and_set_bit |
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/** |
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* arch___test_and_clear_bit - Clear a bit and return its old value |
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* @nr: Bit to clear |
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* @addr: Address to count from |
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* |
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* This operation is non-atomic and can be reordered. |
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* If two examples of this operation race, one can appear to succeed |
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* but actually fail. You must protect multiple accesses with a lock. |
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*/ |
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static __always_inline int |
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arch___test_and_clear_bit(unsigned int nr, volatile unsigned long *addr) |
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{ |
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unsigned long mask = BIT_MASK(nr); |
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); |
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unsigned long old = *p; |
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*p = old & ~mask; |
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return (old & mask) != 0; |
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} |
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#define __test_and_clear_bit arch___test_and_clear_bit |
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/* WARNING: non atomic and it can be reordered! */ |
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static __always_inline int |
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arch___test_and_change_bit(unsigned int nr, volatile unsigned long *addr) |
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{ |
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unsigned long mask = BIT_MASK(nr); |
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unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr); |
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unsigned long old = *p; |
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*p = old ^ mask; |
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return (old & mask) != 0; |
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} |
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#define __test_and_change_bit arch___test_and_change_bit |
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/** |
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* arch_test_bit - Determine whether a bit is set |
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* @nr: bit number to test |
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* @addr: Address to start counting from |
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*/ |
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static __always_inline int |
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arch_test_bit(unsigned int nr, const volatile unsigned long *addr) |
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{ |
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return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1))); |
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} |
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#define test_bit arch_test_bit |
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#endif /* _ASM_GENERIC_BITOPS_NON_ATOMIC_H_ */
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