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137 lines
4.1 KiB
137 lines
4.1 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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#ifndef _M68KNOMMU_IO_H |
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#define _M68KNOMMU_IO_H |
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/* |
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* Convert a physical memory address into a IO memory address. |
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* For us this is trivially a type cast. |
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*/ |
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#define iomem(a) ((void __iomem *) (a)) |
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/* |
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* The non-MMU m68k and ColdFire IO and memory mapped hardware access |
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* functions have always worked in CPU native endian. We need to define |
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* that behavior here first before we include asm-generic/io.h. |
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*/ |
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#define __raw_readb(addr) \ |
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({ u8 __v = (*(__force volatile u8 *) (addr)); __v; }) |
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#define __raw_readw(addr) \ |
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({ u16 __v = (*(__force volatile u16 *) (addr)); __v; }) |
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#define __raw_readl(addr) \ |
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({ u32 __v = (*(__force volatile u32 *) (addr)); __v; }) |
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#define __raw_writeb(b, addr) (void)((*(__force volatile u8 *) (addr)) = (b)) |
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#define __raw_writew(b, addr) (void)((*(__force volatile u16 *) (addr)) = (b)) |
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#define __raw_writel(b, addr) (void)((*(__force volatile u32 *) (addr)) = (b)) |
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#if defined(CONFIG_COLDFIRE) |
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/* |
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* For ColdFire platforms we may need to do some extra checks for what |
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* type of address range we are accessing. Include the ColdFire platform |
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* definitions so we can figure out if need to do something special. |
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*/ |
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#include <asm/byteorder.h> |
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#include <asm/coldfire.h> |
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#include <asm/mcfsim.h> |
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#endif /* CONFIG_COLDFIRE */ |
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#if defined(IOMEMBASE) |
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/* |
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* The ColdFire SoC internal peripherals are mapped into virtual address |
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* space using the ACR registers of the cache control unit. This means we |
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* are using a 1:1 physical:virtual mapping for them. We can quickly |
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* determine if we are accessing an internal peripheral device given the |
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* physical or vitrual address using the same range check. This check logic |
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* applies just the same of there is no MMU but something like a PCI bus |
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* is present. |
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*/ |
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static int __cf_internalio(unsigned long addr) |
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{ |
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return (addr >= IOMEMBASE) && (addr <= IOMEMBASE + IOMEMSIZE - 1); |
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} |
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static int cf_internalio(const volatile void __iomem *addr) |
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{ |
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return __cf_internalio((unsigned long) addr); |
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} |
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/* |
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* We need to treat built-in peripherals and bus based address ranges |
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* differently. Local built-in peripherals (and the ColdFire SoC parts |
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* have quite a lot of them) are always native endian - which is big |
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* endian on m68k/ColdFire. Bus based address ranges, like the PCI bus, |
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* are accessed little endian - so we need to byte swap those. |
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*/ |
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#define readw readw |
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static inline u16 readw(const volatile void __iomem *addr) |
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{ |
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if (cf_internalio(addr)) |
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return __raw_readw(addr); |
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return swab16(__raw_readw(addr)); |
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} |
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#define readl readl |
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static inline u32 readl(const volatile void __iomem *addr) |
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{ |
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if (cf_internalio(addr)) |
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return __raw_readl(addr); |
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return swab32(__raw_readl(addr)); |
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} |
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#define writew writew |
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static inline void writew(u16 value, volatile void __iomem *addr) |
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{ |
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if (cf_internalio(addr)) |
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__raw_writew(value, addr); |
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else |
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__raw_writew(swab16(value), addr); |
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} |
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#define writel writel |
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static inline void writel(u32 value, volatile void __iomem *addr) |
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{ |
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if (cf_internalio(addr)) |
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__raw_writel(value, addr); |
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else |
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__raw_writel(swab32(value), addr); |
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} |
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#else |
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#define readb __raw_readb |
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#define readw __raw_readw |
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#define readl __raw_readl |
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#define writeb __raw_writeb |
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#define writew __raw_writew |
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#define writel __raw_writel |
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#endif /* IOMEMBASE */ |
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#if defined(CONFIG_PCI) |
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/* |
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* Support for PCI bus access uses the asm-generic access functions. |
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* We need to supply the base address and masks for the normal memory |
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* and IO address space mappings. |
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*/ |
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#define PCI_MEM_PA 0xf0000000 /* Host physical address */ |
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#define PCI_MEM_BA 0xf0000000 /* Bus physical address */ |
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#define PCI_MEM_SIZE 0x08000000 /* 128 MB */ |
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#define PCI_MEM_MASK (PCI_MEM_SIZE - 1) |
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#define PCI_IO_PA 0xf8000000 /* Host physical address */ |
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#define PCI_IO_BA 0x00000000 /* Bus physical address */ |
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#define PCI_IO_SIZE 0x00010000 /* 64k */ |
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#define PCI_IO_MASK (PCI_IO_SIZE - 1) |
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#define HAVE_ARCH_PIO_SIZE |
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#define PIO_OFFSET 0 |
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#define PIO_MASK 0xffff |
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#define PIO_RESERVED 0x10000 |
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#define PCI_IOBASE ((void __iomem *) PCI_IO_PA) |
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#define PCI_SPACE_LIMIT PCI_IO_MASK |
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#endif /* CONFIG_PCI */ |
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#include <asm/kmap.h> |
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#include <asm/virtconvert.h> |
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#endif /* _M68KNOMMU_IO_H */
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