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488 lines
11 KiB
488 lines
11 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* Copyright (c) 2011-2015, 2017, 2020, The Linux Foundation. All rights reserved. |
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*/ |
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#include <linux/bitops.h> |
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#include <linux/delay.h> |
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#include <linux/err.h> |
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#include <linux/iio/consumer.h> |
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#include <linux/interrupt.h> |
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#include <linux/module.h> |
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#include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/platform_device.h> |
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#include <linux/regmap.h> |
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#include <linux/thermal.h> |
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#include "../thermal_core.h" |
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#define QPNP_TM_REG_DIG_MAJOR 0x01 |
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#define QPNP_TM_REG_TYPE 0x04 |
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#define QPNP_TM_REG_SUBTYPE 0x05 |
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#define QPNP_TM_REG_STATUS 0x08 |
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#define QPNP_TM_REG_SHUTDOWN_CTRL1 0x40 |
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#define QPNP_TM_REG_ALARM_CTRL 0x46 |
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#define QPNP_TM_TYPE 0x09 |
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#define QPNP_TM_SUBTYPE_GEN1 0x08 |
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#define QPNP_TM_SUBTYPE_GEN2 0x09 |
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#define STATUS_GEN1_STAGE_MASK GENMASK(1, 0) |
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#define STATUS_GEN2_STATE_MASK GENMASK(6, 4) |
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#define STATUS_GEN2_STATE_SHIFT 4 |
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#define SHUTDOWN_CTRL1_OVERRIDE_S2 BIT(6) |
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#define SHUTDOWN_CTRL1_THRESHOLD_MASK GENMASK(1, 0) |
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#define SHUTDOWN_CTRL1_RATE_25HZ BIT(3) |
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#define ALARM_CTRL_FORCE_ENABLE BIT(7) |
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#define THRESH_COUNT 4 |
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#define STAGE_COUNT 3 |
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/* Over-temperature trip point values in mC */ |
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static const long temp_map_gen1[THRESH_COUNT][STAGE_COUNT] = { |
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{ 105000, 125000, 145000 }, |
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{ 110000, 130000, 150000 }, |
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{ 115000, 135000, 155000 }, |
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{ 120000, 140000, 160000 }, |
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}; |
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static const long temp_map_gen2_v1[THRESH_COUNT][STAGE_COUNT] = { |
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{ 90000, 110000, 140000 }, |
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{ 95000, 115000, 145000 }, |
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{ 100000, 120000, 150000 }, |
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{ 105000, 125000, 155000 }, |
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}; |
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#define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */ |
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#define THRESH_MIN 0 |
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#define THRESH_MAX 3 |
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#define TEMP_STAGE_HYSTERESIS 2000 |
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/* Temperature in Milli Celsius reported during stage 0 if no ADC is present */ |
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#define DEFAULT_TEMP 37000 |
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struct qpnp_tm_chip { |
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struct regmap *map; |
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struct device *dev; |
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struct thermal_zone_device *tz_dev; |
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unsigned int subtype; |
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long temp; |
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unsigned int thresh; |
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unsigned int stage; |
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unsigned int prev_stage; |
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unsigned int base; |
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/* protects .thresh, .stage and chip registers */ |
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struct mutex lock; |
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bool initialized; |
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struct iio_channel *adc; |
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const long (*temp_map)[THRESH_COUNT][STAGE_COUNT]; |
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}; |
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/* This array maps from GEN2 alarm state to GEN1 alarm stage */ |
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static const unsigned int alarm_state_map[8] = {0, 1, 1, 2, 2, 3, 3, 3}; |
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static int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *data) |
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{ |
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unsigned int val; |
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int ret; |
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ret = regmap_read(chip->map, chip->base + addr, &val); |
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if (ret < 0) |
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return ret; |
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*data = val; |
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return 0; |
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} |
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static int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 data) |
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{ |
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return regmap_write(chip->map, chip->base + addr, data); |
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} |
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/** |
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* qpnp_tm_decode_temp() - return temperature in mC corresponding to the |
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* specified over-temperature stage |
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* @chip: Pointer to the qpnp_tm chip |
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* @stage: Over-temperature stage |
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* |
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* Return: temperature in mC |
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*/ |
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static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage) |
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{ |
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if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 || |
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stage > STAGE_COUNT) |
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return 0; |
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return (*chip->temp_map)[chip->thresh][stage - 1]; |
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} |
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/** |
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* qpnp_tm_get_temp_stage() - return over-temperature stage |
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* @chip: Pointer to the qpnp_tm chip |
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* |
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* Return: stage (GEN1) or state (GEN2) on success, or errno on failure. |
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*/ |
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static int qpnp_tm_get_temp_stage(struct qpnp_tm_chip *chip) |
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{ |
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int ret; |
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u8 reg = 0; |
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ret = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®); |
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if (ret < 0) |
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return ret; |
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) |
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ret = reg & STATUS_GEN1_STAGE_MASK; |
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else |
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ret = (reg & STATUS_GEN2_STATE_MASK) >> STATUS_GEN2_STATE_SHIFT; |
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return ret; |
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} |
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/* |
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* This function updates the internal temp value based on the |
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* current thermal stage and threshold as well as the previous stage |
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*/ |
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static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip) |
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{ |
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unsigned int stage, stage_new, stage_old; |
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int ret; |
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WARN_ON(!mutex_is_locked(&chip->lock)); |
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ret = qpnp_tm_get_temp_stage(chip); |
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if (ret < 0) |
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return ret; |
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stage = ret; |
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if (chip->subtype == QPNP_TM_SUBTYPE_GEN1) { |
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stage_new = stage; |
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stage_old = chip->stage; |
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} else { |
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stage_new = alarm_state_map[stage]; |
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stage_old = alarm_state_map[chip->stage]; |
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} |
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if (stage_new > stage_old) { |
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/* increasing stage, use lower bound */ |
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chip->temp = qpnp_tm_decode_temp(chip, stage_new) |
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+ TEMP_STAGE_HYSTERESIS; |
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} else if (stage_new < stage_old) { |
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/* decreasing stage, use upper bound */ |
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chip->temp = qpnp_tm_decode_temp(chip, stage_new + 1) |
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- TEMP_STAGE_HYSTERESIS; |
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} |
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chip->stage = stage; |
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return 0; |
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} |
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static int qpnp_tm_get_temp(void *data, int *temp) |
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{ |
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struct qpnp_tm_chip *chip = data; |
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int ret, mili_celsius; |
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if (!temp) |
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return -EINVAL; |
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if (!chip->initialized) { |
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*temp = DEFAULT_TEMP; |
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return 0; |
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} |
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if (!chip->adc) { |
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mutex_lock(&chip->lock); |
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ret = qpnp_tm_update_temp_no_adc(chip); |
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mutex_unlock(&chip->lock); |
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if (ret < 0) |
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return ret; |
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} else { |
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ret = iio_read_channel_processed(chip->adc, &mili_celsius); |
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if (ret < 0) |
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return ret; |
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chip->temp = mili_celsius; |
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} |
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*temp = chip->temp; |
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return 0; |
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} |
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static int qpnp_tm_update_critical_trip_temp(struct qpnp_tm_chip *chip, |
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int temp) |
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{ |
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long stage2_threshold_min = (*chip->temp_map)[THRESH_MIN][1]; |
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long stage2_threshold_max = (*chip->temp_map)[THRESH_MAX][1]; |
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bool disable_s2_shutdown = false; |
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u8 reg; |
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WARN_ON(!mutex_is_locked(&chip->lock)); |
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/* |
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* Default: S2 and S3 shutdown enabled, thresholds at |
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* lowest threshold set, monitoring at 25Hz |
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*/ |
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reg = SHUTDOWN_CTRL1_RATE_25HZ; |
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if (temp == THERMAL_TEMP_INVALID || |
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temp < stage2_threshold_min) { |
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chip->thresh = THRESH_MIN; |
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goto skip; |
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} |
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if (temp <= stage2_threshold_max) { |
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chip->thresh = THRESH_MAX - |
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((stage2_threshold_max - temp) / |
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TEMP_THRESH_STEP); |
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disable_s2_shutdown = true; |
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} else { |
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chip->thresh = THRESH_MAX; |
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if (chip->adc) |
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disable_s2_shutdown = true; |
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else |
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dev_warn(chip->dev, |
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"No ADC is configured and critical temperature is above the maximum stage 2 threshold of 140 C! Configuring stage 2 shutdown at 140 C.\n"); |
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} |
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skip: |
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reg |= chip->thresh; |
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if (disable_s2_shutdown) |
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reg |= SHUTDOWN_CTRL1_OVERRIDE_S2; |
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return qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, reg); |
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} |
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static int qpnp_tm_set_trip_temp(void *data, int trip, int temp) |
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{ |
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struct qpnp_tm_chip *chip = data; |
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const struct thermal_trip *trip_points; |
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int ret; |
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trip_points = of_thermal_get_trip_points(chip->tz_dev); |
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if (!trip_points) |
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return -EINVAL; |
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if (trip_points[trip].type != THERMAL_TRIP_CRITICAL) |
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return 0; |
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mutex_lock(&chip->lock); |
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ret = qpnp_tm_update_critical_trip_temp(chip, temp); |
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mutex_unlock(&chip->lock); |
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return ret; |
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} |
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static const struct thermal_zone_of_device_ops qpnp_tm_sensor_ops = { |
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.get_temp = qpnp_tm_get_temp, |
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.set_trip_temp = qpnp_tm_set_trip_temp, |
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}; |
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static irqreturn_t qpnp_tm_isr(int irq, void *data) |
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{ |
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struct qpnp_tm_chip *chip = data; |
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thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED); |
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return IRQ_HANDLED; |
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} |
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static int qpnp_tm_get_critical_trip_temp(struct qpnp_tm_chip *chip) |
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{ |
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int ntrips; |
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const struct thermal_trip *trips; |
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int i; |
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ntrips = of_thermal_get_ntrips(chip->tz_dev); |
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if (ntrips <= 0) |
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return THERMAL_TEMP_INVALID; |
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trips = of_thermal_get_trip_points(chip->tz_dev); |
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if (!trips) |
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return THERMAL_TEMP_INVALID; |
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for (i = 0; i < ntrips; i++) { |
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if (of_thermal_is_trip_valid(chip->tz_dev, i) && |
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trips[i].type == THERMAL_TRIP_CRITICAL) |
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return trips[i].temperature; |
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} |
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return THERMAL_TEMP_INVALID; |
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} |
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/* |
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* This function initializes the internal temp value based on only the |
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* current thermal stage and threshold. Setup threshold control and |
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* disable shutdown override. |
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*/ |
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static int qpnp_tm_init(struct qpnp_tm_chip *chip) |
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{ |
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unsigned int stage; |
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int ret; |
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u8 reg = 0; |
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int crit_temp; |
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mutex_lock(&chip->lock); |
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ret = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®); |
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if (ret < 0) |
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goto out; |
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chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK; |
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chip->temp = DEFAULT_TEMP; |
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ret = qpnp_tm_get_temp_stage(chip); |
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if (ret < 0) |
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goto out; |
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chip->stage = ret; |
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stage = chip->subtype == QPNP_TM_SUBTYPE_GEN1 |
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? chip->stage : alarm_state_map[chip->stage]; |
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if (stage) |
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chip->temp = qpnp_tm_decode_temp(chip, stage); |
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crit_temp = qpnp_tm_get_critical_trip_temp(chip); |
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ret = qpnp_tm_update_critical_trip_temp(chip, crit_temp); |
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if (ret < 0) |
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goto out; |
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/* Enable the thermal alarm PMIC module in always-on mode. */ |
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reg = ALARM_CTRL_FORCE_ENABLE; |
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ret = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, reg); |
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chip->initialized = true; |
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out: |
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mutex_unlock(&chip->lock); |
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return ret; |
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} |
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static int qpnp_tm_probe(struct platform_device *pdev) |
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{ |
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struct qpnp_tm_chip *chip; |
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struct device_node *node; |
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u8 type, subtype, dig_major; |
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u32 res; |
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int ret, irq; |
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node = pdev->dev.of_node; |
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chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL); |
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if (!chip) |
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return -ENOMEM; |
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dev_set_drvdata(&pdev->dev, chip); |
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chip->dev = &pdev->dev; |
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mutex_init(&chip->lock); |
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chip->map = dev_get_regmap(pdev->dev.parent, NULL); |
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if (!chip->map) |
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return -ENXIO; |
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ret = of_property_read_u32(node, "reg", &res); |
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if (ret < 0) |
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return ret; |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) |
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return irq; |
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/* ADC based measurements are optional */ |
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chip->adc = devm_iio_channel_get(&pdev->dev, "thermal"); |
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if (IS_ERR(chip->adc)) { |
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ret = PTR_ERR(chip->adc); |
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chip->adc = NULL; |
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if (ret == -EPROBE_DEFER) |
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return ret; |
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} |
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chip->base = res; |
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ret = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, &type); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "could not read type\n"); |
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return ret; |
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} |
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ret = qpnp_tm_read(chip, QPNP_TM_REG_SUBTYPE, &subtype); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "could not read subtype\n"); |
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return ret; |
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} |
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ret = qpnp_tm_read(chip, QPNP_TM_REG_DIG_MAJOR, &dig_major); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "could not read dig_major\n"); |
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return ret; |
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} |
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if (type != QPNP_TM_TYPE || (subtype != QPNP_TM_SUBTYPE_GEN1 |
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&& subtype != QPNP_TM_SUBTYPE_GEN2)) { |
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dev_err(&pdev->dev, "invalid type 0x%02x or subtype 0x%02x\n", |
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type, subtype); |
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return -ENODEV; |
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} |
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chip->subtype = subtype; |
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if (subtype == QPNP_TM_SUBTYPE_GEN2 && dig_major >= 1) |
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chip->temp_map = &temp_map_gen2_v1; |
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else |
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chip->temp_map = &temp_map_gen1; |
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/* |
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* Register the sensor before initializing the hardware to be able to |
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* read the trip points. get_temp() returns the default temperature |
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* before the hardware initialization is completed. |
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*/ |
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chip->tz_dev = devm_thermal_zone_of_sensor_register( |
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&pdev->dev, 0, chip, &qpnp_tm_sensor_ops); |
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if (IS_ERR(chip->tz_dev)) { |
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dev_err(&pdev->dev, "failed to register sensor\n"); |
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return PTR_ERR(chip->tz_dev); |
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} |
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ret = qpnp_tm_init(chip); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "init failed\n"); |
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return ret; |
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} |
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ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, qpnp_tm_isr, |
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IRQF_ONESHOT, node->name, chip); |
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if (ret < 0) |
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return ret; |
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thermal_zone_device_update(chip->tz_dev, THERMAL_EVENT_UNSPECIFIED); |
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return 0; |
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} |
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static const struct of_device_id qpnp_tm_match_table[] = { |
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{ .compatible = "qcom,spmi-temp-alarm" }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(of, qpnp_tm_match_table); |
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static struct platform_driver qpnp_tm_driver = { |
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.driver = { |
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.name = "spmi-temp-alarm", |
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.of_match_table = qpnp_tm_match_table, |
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}, |
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.probe = qpnp_tm_probe, |
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}; |
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module_platform_driver(qpnp_tm_driver); |
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MODULE_ALIAS("platform:spmi-temp-alarm"); |
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MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver"); |
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MODULE_LICENSE("GPL v2");
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