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82 lines
2.0 KiB
82 lines
2.0 KiB
/* |
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* TLB miss handler for SH with an MMU. |
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* |
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* Copyright (C) 1999 Niibe Yutaka |
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* Copyright (C) 2003 - 2012 Paul Mundt |
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* |
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* This file is subject to the terms and conditions of the GNU General Public |
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* License. See the file "COPYING" in the main directory of this archive |
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* for more details. |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/mm.h> |
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#include <linux/kprobes.h> |
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#include <linux/kdebug.h> |
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#include <asm/mmu_context.h> |
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#include <asm/thread_info.h> |
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/* |
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* Called with interrupts disabled. |
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*/ |
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asmlinkage int __kprobes |
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handle_tlbmiss(struct pt_regs *regs, unsigned long error_code, |
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unsigned long address) |
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{ |
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pgd_t *pgd; |
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p4d_t *p4d; |
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pud_t *pud; |
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pmd_t *pmd; |
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pte_t *pte; |
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pte_t entry; |
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/* |
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* We don't take page faults for P1, P2, and parts of P4, these |
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* are always mapped, whether it be due to legacy behaviour in |
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* 29-bit mode, or due to PMB configuration in 32-bit mode. |
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*/ |
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if (address >= P3SEG && address < P3_ADDR_MAX) { |
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pgd = pgd_offset_k(address); |
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} else { |
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if (unlikely(address >= TASK_SIZE || !current->mm)) |
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return 1; |
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pgd = pgd_offset(current->mm, address); |
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} |
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p4d = p4d_offset(pgd, address); |
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if (p4d_none_or_clear_bad(p4d)) |
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return 1; |
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pud = pud_offset(p4d, address); |
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if (pud_none_or_clear_bad(pud)) |
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return 1; |
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pmd = pmd_offset(pud, address); |
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if (pmd_none_or_clear_bad(pmd)) |
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return 1; |
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pte = pte_offset_kernel(pmd, address); |
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entry = *pte; |
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if (unlikely(pte_none(entry) || pte_not_present(entry))) |
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return 1; |
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if (unlikely(error_code && !pte_write(entry))) |
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return 1; |
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if (error_code) |
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entry = pte_mkdirty(entry); |
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entry = pte_mkyoung(entry); |
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set_pte(pte, entry); |
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#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SMP) |
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/* |
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* SH-4 does not set MMUCR.RC to the corresponding TLB entry in |
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* the case of an initial page write exception, so we need to |
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* flush it in order to avoid potential TLB entry duplication. |
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*/ |
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if (error_code == FAULT_CODE_INITIAL) |
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local_flush_tlb_one(get_asid(), address & PAGE_MASK); |
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#endif |
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set_thread_fault_code(error_code); |
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update_mmu_cache(NULL, address, pte); |
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return 0; |
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}
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