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94 lines
2.1 KiB
94 lines
2.1 KiB
// SPDX-License-Identifier: GPL-2.0 |
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// |
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// Copyright (c) 2009 Simtec Electronics |
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// http://armlinux.simtec.co.uk/ |
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// Ben Dooks <[email protected]> |
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// |
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// S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442 |
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#include <linux/kernel.h> |
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#include <linux/errno.h> |
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#include <linux/cpufreq.h> |
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#include <linux/io.h> |
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#include <linux/clk.h> |
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#include "map.h" |
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#include "regs-clock.h" |
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#include <linux/soc/samsung/s3c-cpufreq-core.h> |
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#include "regs-mem-s3c24xx.h" |
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/** |
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* s3c2410_cpufreq_setrefresh - set SDRAM refresh value |
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* @cfg: The frequency configuration |
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* |
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* Set the SDRAM refresh value appropriately for the configured |
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* frequency. |
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*/ |
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void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) |
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{ |
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struct s3c_cpufreq_board *board = cfg->board; |
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unsigned long refresh; |
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unsigned long refval; |
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/* Reduce both the refresh time (in ns) and the frequency (in MHz) |
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* down to ensure that we do not overflow 32 bit numbers. |
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* |
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* This should work for HCLK up to 133MHz and refresh period up |
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* to 30usec. |
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*/ |
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refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); |
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refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */ |
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refresh = (1 << 11) + 1 - refresh; |
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s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh); |
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refval = __raw_readl(S3C2410_REFRESH); |
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refval &= ~((1 << 12) - 1); |
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refval |= refresh; |
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__raw_writel(refval, S3C2410_REFRESH); |
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} |
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/** |
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* s3c2410_set_fvco - set the PLL value |
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* @cfg: The frequency configuration |
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*/ |
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void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) |
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{ |
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if (!IS_ERR(cfg->mpll)) |
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clk_set_rate(cfg->mpll, cfg->pll.frequency); |
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} |
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#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) |
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u32 s3c2440_read_camdivn(void) |
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{ |
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return __raw_readl(S3C2440_CAMDIVN); |
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} |
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void s3c2440_write_camdivn(u32 camdiv) |
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{ |
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__raw_writel(camdiv, S3C2440_CAMDIVN); |
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} |
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#endif |
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u32 s3c24xx_read_clkdivn(void) |
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{ |
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return __raw_readl(S3C2410_CLKDIVN); |
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} |
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void s3c24xx_write_clkdivn(u32 clkdiv) |
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{ |
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__raw_writel(clkdiv, S3C2410_CLKDIVN); |
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} |
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u32 s3c24xx_read_mpllcon(void) |
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{ |
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return __raw_readl(S3C2410_MPLLCON); |
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} |
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void s3c24xx_write_locktime(u32 locktime) |
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{ |
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return __raw_writel(locktime, S3C2410_LOCKTIME); |
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}
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