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904 lines
22 KiB
904 lines
22 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* AD5758 Digital to analog converters driver |
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* |
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* Copyright 2018 Analog Devices Inc. |
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* |
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* TODO: Currently CRC is not supported in this driver |
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*/ |
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#include <linux/bsearch.h> |
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#include <linux/delay.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/mod_devicetable.h> |
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#include <linux/property.h> |
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#include <linux/spi/spi.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/iio/iio.h> |
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#include <linux/iio/sysfs.h> |
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|
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/* AD5758 registers definition */ |
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#define AD5758_NOP 0x00 |
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#define AD5758_DAC_INPUT 0x01 |
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#define AD5758_DAC_OUTPUT 0x02 |
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#define AD5758_CLEAR_CODE 0x03 |
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#define AD5758_USER_GAIN 0x04 |
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#define AD5758_USER_OFFSET 0x05 |
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#define AD5758_DAC_CONFIG 0x06 |
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#define AD5758_SW_LDAC 0x07 |
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#define AD5758_KEY 0x08 |
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#define AD5758_GP_CONFIG1 0x09 |
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#define AD5758_GP_CONFIG2 0x0A |
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#define AD5758_DCDC_CONFIG1 0x0B |
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#define AD5758_DCDC_CONFIG2 0x0C |
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#define AD5758_WDT_CONFIG 0x0F |
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#define AD5758_DIGITAL_DIAG_CONFIG 0x10 |
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#define AD5758_ADC_CONFIG 0x11 |
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#define AD5758_FAULT_PIN_CONFIG 0x12 |
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#define AD5758_TWO_STAGE_READBACK_SELECT 0x13 |
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#define AD5758_DIGITAL_DIAG_RESULTS 0x14 |
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#define AD5758_ANALOG_DIAG_RESULTS 0x15 |
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#define AD5758_STATUS 0x16 |
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#define AD5758_CHIP_ID 0x17 |
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#define AD5758_FREQ_MONITOR 0x18 |
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#define AD5758_DEVICE_ID_0 0x19 |
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#define AD5758_DEVICE_ID_1 0x1A |
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#define AD5758_DEVICE_ID_2 0x1B |
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#define AD5758_DEVICE_ID_3 0x1C |
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|
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/* AD5758_DAC_CONFIG */ |
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#define AD5758_DAC_CONFIG_RANGE_MSK GENMASK(3, 0) |
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#define AD5758_DAC_CONFIG_RANGE_MODE(x) (((x) & 0xF) << 0) |
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#define AD5758_DAC_CONFIG_INT_EN_MSK BIT(5) |
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#define AD5758_DAC_CONFIG_INT_EN_MODE(x) (((x) & 0x1) << 5) |
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#define AD5758_DAC_CONFIG_OUT_EN_MSK BIT(6) |
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#define AD5758_DAC_CONFIG_OUT_EN_MODE(x) (((x) & 0x1) << 6) |
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#define AD5758_DAC_CONFIG_SR_EN_MSK BIT(8) |
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#define AD5758_DAC_CONFIG_SR_EN_MODE(x) (((x) & 0x1) << 8) |
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#define AD5758_DAC_CONFIG_SR_CLOCK_MSK GENMASK(12, 9) |
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#define AD5758_DAC_CONFIG_SR_CLOCK_MODE(x) (((x) & 0xF) << 9) |
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#define AD5758_DAC_CONFIG_SR_STEP_MSK GENMASK(15, 13) |
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#define AD5758_DAC_CONFIG_SR_STEP_MODE(x) (((x) & 0x7) << 13) |
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|
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/* AD5758_KEY */ |
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#define AD5758_KEY_CODE_RESET_1 0x15FA |
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#define AD5758_KEY_CODE_RESET_2 0xAF51 |
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#define AD5758_KEY_CODE_SINGLE_ADC_CONV 0x1ADC |
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#define AD5758_KEY_CODE_RESET_WDT 0x0D06 |
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#define AD5758_KEY_CODE_CALIB_MEM_REFRESH 0xFCBA |
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|
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/* AD5758_DCDC_CONFIG1 */ |
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#define AD5758_DCDC_CONFIG1_DCDC_VPROG_MSK GENMASK(4, 0) |
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#define AD5758_DCDC_CONFIG1_DCDC_VPROG_MODE(x) (((x) & 0x1F) << 0) |
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#define AD5758_DCDC_CONFIG1_DCDC_MODE_MSK GENMASK(6, 5) |
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#define AD5758_DCDC_CONFIG1_DCDC_MODE_MODE(x) (((x) & 0x3) << 5) |
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|
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/* AD5758_DCDC_CONFIG2 */ |
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#define AD5758_DCDC_CONFIG2_ILIMIT_MSK GENMASK(3, 1) |
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#define AD5758_DCDC_CONFIG2_ILIMIT_MODE(x) (((x) & 0x7) << 1) |
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#define AD5758_DCDC_CONFIG2_INTR_SAT_3WI_MSK BIT(11) |
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#define AD5758_DCDC_CONFIG2_BUSY_3WI_MSK BIT(12) |
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|
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/* AD5758_DIGITAL_DIAG_RESULTS */ |
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#define AD5758_CAL_MEM_UNREFRESHED_MSK BIT(15) |
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|
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/* AD5758_ADC_CONFIG */ |
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#define AD5758_ADC_CONFIG_PPC_BUF_EN(x) (((x) & 0x1) << 11) |
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#define AD5758_ADC_CONFIG_PPC_BUF_MSK BIT(11) |
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#define AD5758_WR_FLAG_MSK(x) (0x80 | ((x) & 0x1F)) |
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#define AD5758_FULL_SCALE_MICRO 65535000000ULL |
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struct ad5758_range { |
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int reg; |
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int min; |
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int max; |
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}; |
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|
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/** |
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* struct ad5758_state - driver instance specific data |
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* @spi: spi_device |
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* @lock: mutex lock |
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* @gpio_reset: gpio descriptor for the reset line |
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* @out_range: struct which stores the output range |
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* @dc_dc_mode: variable which stores the mode of operation |
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* @dc_dc_ilim: variable which stores the dc-to-dc converter current limit |
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* @slew_time: variable which stores the target slew time |
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* @pwr_down: variable which contains whether a channel is powered down or not |
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* @d32: spi transfer buffers |
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*/ |
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struct ad5758_state { |
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struct spi_device *spi; |
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struct mutex lock; |
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struct gpio_desc *gpio_reset; |
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struct ad5758_range out_range; |
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unsigned int dc_dc_mode; |
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unsigned int dc_dc_ilim; |
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unsigned int slew_time; |
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bool pwr_down; |
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__be32 d32[3]; |
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}; |
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|
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/* |
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* Output ranges corresponding to bits [3:0] from DAC_CONFIG register |
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* 0000: 0 V to 5 V voltage range |
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* 0001: 0 V to 10 V voltage range |
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* 0010: ±5 V voltage range |
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* 0011: ±10 V voltage range |
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* 1000: 0 mA to 20 mA current range |
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* 1001: 0 mA to 24 mA current range |
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* 1010: 4 mA to 20 mA current range |
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* 1011: ±20 mA current range |
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* 1100: ±24 mA current range |
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* 1101: -1 mA to +22 mA current range |
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*/ |
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enum ad5758_output_range { |
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AD5758_RANGE_0V_5V, |
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AD5758_RANGE_0V_10V, |
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AD5758_RANGE_PLUSMINUS_5V, |
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AD5758_RANGE_PLUSMINUS_10V, |
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AD5758_RANGE_0mA_20mA = 8, |
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AD5758_RANGE_0mA_24mA, |
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AD5758_RANGE_4mA_24mA, |
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AD5758_RANGE_PLUSMINUS_20mA, |
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AD5758_RANGE_PLUSMINUS_24mA, |
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AD5758_RANGE_MINUS_1mA_PLUS_22mA, |
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}; |
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enum ad5758_dc_dc_mode { |
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AD5758_DCDC_MODE_POWER_OFF, |
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AD5758_DCDC_MODE_DPC_CURRENT, |
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AD5758_DCDC_MODE_DPC_VOLTAGE, |
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AD5758_DCDC_MODE_PPC_CURRENT, |
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}; |
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|
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static const struct ad5758_range ad5758_voltage_range[] = { |
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{ AD5758_RANGE_0V_5V, 0, 5000000 }, |
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{ AD5758_RANGE_0V_10V, 0, 10000000 }, |
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{ AD5758_RANGE_PLUSMINUS_5V, -5000000, 5000000 }, |
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{ AD5758_RANGE_PLUSMINUS_10V, -10000000, 10000000 } |
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}; |
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static const struct ad5758_range ad5758_current_range[] = { |
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{ AD5758_RANGE_0mA_20mA, 0, 20000}, |
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{ AD5758_RANGE_0mA_24mA, 0, 24000 }, |
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{ AD5758_RANGE_4mA_24mA, 4, 24000 }, |
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{ AD5758_RANGE_PLUSMINUS_20mA, -20000, 20000 }, |
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{ AD5758_RANGE_PLUSMINUS_24mA, -24000, 24000 }, |
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{ AD5758_RANGE_MINUS_1mA_PLUS_22mA, -1000, 22000 }, |
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}; |
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|
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static const int ad5758_sr_clk[16] = { |
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240000, 200000, 150000, 128000, 64000, 32000, 16000, 8000, 4000, 2000, |
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1000, 512, 256, 128, 64, 16 |
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}; |
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static const int ad5758_sr_step[8] = { |
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4, 12, 64, 120, 256, 500, 1820, 2048 |
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}; |
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|
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static const int ad5758_dc_dc_ilim[6] = { |
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150000, 200000, 250000, 300000, 350000, 400000 |
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}; |
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static int ad5758_spi_reg_read(struct ad5758_state *st, unsigned int addr) |
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{ |
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struct spi_transfer t[] = { |
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{ |
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.tx_buf = &st->d32[0], |
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.len = 4, |
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.cs_change = 1, |
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}, { |
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.tx_buf = &st->d32[1], |
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.rx_buf = &st->d32[2], |
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.len = 4, |
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}, |
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}; |
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int ret; |
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st->d32[0] = cpu_to_be32( |
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(AD5758_WR_FLAG_MSK(AD5758_TWO_STAGE_READBACK_SELECT) << 24) | |
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(addr << 8)); |
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st->d32[1] = cpu_to_be32(AD5758_WR_FLAG_MSK(AD5758_NOP) << 24); |
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ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); |
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if (ret < 0) |
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return ret; |
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return (be32_to_cpu(st->d32[2]) >> 8) & 0xFFFF; |
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} |
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static int ad5758_spi_reg_write(struct ad5758_state *st, |
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unsigned int addr, |
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unsigned int val) |
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{ |
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st->d32[0] = cpu_to_be32((AD5758_WR_FLAG_MSK(addr) << 24) | |
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((val & 0xFFFF) << 8)); |
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return spi_write(st->spi, &st->d32[0], sizeof(st->d32[0])); |
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} |
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static int ad5758_spi_write_mask(struct ad5758_state *st, |
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unsigned int addr, |
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unsigned long int mask, |
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unsigned int val) |
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{ |
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int regval; |
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regval = ad5758_spi_reg_read(st, addr); |
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if (regval < 0) |
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return regval; |
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regval &= ~mask; |
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regval |= val; |
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return ad5758_spi_reg_write(st, addr, regval); |
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} |
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static int cmpfunc(const void *a, const void *b) |
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{ |
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return *(int *)a - *(int *)b; |
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} |
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static int ad5758_find_closest_match(const int *array, |
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unsigned int size, int val) |
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{ |
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int i; |
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for (i = 0; i < size; i++) { |
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if (val <= array[i]) |
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return i; |
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} |
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return size - 1; |
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} |
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static int ad5758_wait_for_task_complete(struct ad5758_state *st, |
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unsigned int reg, |
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unsigned int mask) |
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{ |
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unsigned int timeout; |
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int ret; |
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timeout = 10; |
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do { |
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ret = ad5758_spi_reg_read(st, reg); |
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if (ret < 0) |
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return ret; |
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if (!(ret & mask)) |
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return 0; |
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usleep_range(100, 1000); |
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} while (--timeout); |
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dev_err(&st->spi->dev, |
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"Error reading bit 0x%x in 0x%x register\n", mask, reg); |
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return -EIO; |
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} |
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static int ad5758_calib_mem_refresh(struct ad5758_state *st) |
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{ |
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int ret; |
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ret = ad5758_spi_reg_write(st, AD5758_KEY, |
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AD5758_KEY_CODE_CALIB_MEM_REFRESH); |
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if (ret < 0) { |
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dev_err(&st->spi->dev, |
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"Failed to initiate a calibration memory refresh\n"); |
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return ret; |
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} |
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|
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/* Wait to allow time for the internal calibrations to complete */ |
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return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS, |
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AD5758_CAL_MEM_UNREFRESHED_MSK); |
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} |
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static int ad5758_soft_reset(struct ad5758_state *st) |
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{ |
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int ret; |
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ret = ad5758_spi_reg_write(st, AD5758_KEY, AD5758_KEY_CODE_RESET_1); |
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if (ret < 0) |
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return ret; |
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ret = ad5758_spi_reg_write(st, AD5758_KEY, AD5758_KEY_CODE_RESET_2); |
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/* Perform a software reset and wait at least 100us */ |
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usleep_range(100, 1000); |
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return ret; |
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} |
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static int ad5758_set_dc_dc_conv_mode(struct ad5758_state *st, |
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enum ad5758_dc_dc_mode mode) |
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{ |
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int ret; |
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|
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/* |
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* The ENABLE_PPC_BUFFERS bit must be set prior to enabling PPC current |
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* mode. |
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*/ |
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if (mode == AD5758_DCDC_MODE_PPC_CURRENT) { |
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ret = ad5758_spi_write_mask(st, AD5758_ADC_CONFIG, |
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AD5758_ADC_CONFIG_PPC_BUF_MSK, |
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AD5758_ADC_CONFIG_PPC_BUF_EN(1)); |
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if (ret < 0) |
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return ret; |
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} |
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ret = ad5758_spi_write_mask(st, AD5758_DCDC_CONFIG1, |
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AD5758_DCDC_CONFIG1_DCDC_MODE_MSK, |
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AD5758_DCDC_CONFIG1_DCDC_MODE_MODE(mode)); |
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if (ret < 0) |
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return ret; |
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|
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/* |
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* Poll the BUSY_3WI bit in the DCDC_CONFIG2 register until it is 0. |
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* This allows the 3-wire interface communication to complete. |
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*/ |
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ret = ad5758_wait_for_task_complete(st, AD5758_DCDC_CONFIG2, |
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AD5758_DCDC_CONFIG2_BUSY_3WI_MSK); |
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if (ret < 0) |
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return ret; |
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st->dc_dc_mode = mode; |
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return ret; |
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} |
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static int ad5758_set_dc_dc_ilim(struct ad5758_state *st, unsigned int ilim) |
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{ |
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int ret; |
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ret = ad5758_spi_write_mask(st, AD5758_DCDC_CONFIG2, |
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AD5758_DCDC_CONFIG2_ILIMIT_MSK, |
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AD5758_DCDC_CONFIG2_ILIMIT_MODE(ilim)); |
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if (ret < 0) |
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return ret; |
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/* |
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* Poll the BUSY_3WI bit in the DCDC_CONFIG2 register until it is 0. |
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* This allows the 3-wire interface communication to complete. |
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*/ |
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return ad5758_wait_for_task_complete(st, AD5758_DCDC_CONFIG2, |
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AD5758_DCDC_CONFIG2_BUSY_3WI_MSK); |
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} |
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static int ad5758_slew_rate_set(struct ad5758_state *st, |
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unsigned int sr_clk_idx, |
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unsigned int sr_step_idx) |
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{ |
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unsigned int mode; |
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unsigned long int mask; |
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int ret; |
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mask = AD5758_DAC_CONFIG_SR_EN_MSK | |
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AD5758_DAC_CONFIG_SR_CLOCK_MSK | |
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AD5758_DAC_CONFIG_SR_STEP_MSK; |
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mode = AD5758_DAC_CONFIG_SR_EN_MODE(1) | |
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AD5758_DAC_CONFIG_SR_STEP_MODE(sr_step_idx) | |
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AD5758_DAC_CONFIG_SR_CLOCK_MODE(sr_clk_idx); |
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ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG, mask, mode); |
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if (ret < 0) |
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return ret; |
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|
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/* Wait to allow time for the internal calibrations to complete */ |
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return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS, |
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AD5758_CAL_MEM_UNREFRESHED_MSK); |
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} |
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static int ad5758_slew_rate_config(struct ad5758_state *st) |
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{ |
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unsigned int sr_clk_idx, sr_step_idx; |
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int i, res; |
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s64 diff_new, diff_old; |
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u64 sr_step, calc_slew_time; |
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|
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sr_clk_idx = 0; |
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sr_step_idx = 0; |
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diff_old = S64_MAX; |
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/* |
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* The slew time can be determined by using the formula: |
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* Slew Time = (Full Scale Out / (Step Size x Update Clk Freq)) |
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* where Slew time is expressed in microseconds |
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* Given the desired slew time, the following algorithm determines the |
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* best match for the step size and the update clock frequency. |
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*/ |
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for (i = 0; i < ARRAY_SIZE(ad5758_sr_clk); i++) { |
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/* |
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* Go through each valid update clock freq and determine a raw |
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* value for the step size by using the formula: |
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* Step Size = Full Scale Out / (Update Clk Freq * Slew Time) |
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*/ |
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sr_step = AD5758_FULL_SCALE_MICRO; |
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do_div(sr_step, ad5758_sr_clk[i]); |
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do_div(sr_step, st->slew_time); |
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/* |
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* After a raw value for step size was determined, find the |
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* closest valid match |
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*/ |
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res = ad5758_find_closest_match(ad5758_sr_step, |
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ARRAY_SIZE(ad5758_sr_step), |
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sr_step); |
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/* Calculate the slew time */ |
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calc_slew_time = AD5758_FULL_SCALE_MICRO; |
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do_div(calc_slew_time, ad5758_sr_step[res]); |
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do_div(calc_slew_time, ad5758_sr_clk[i]); |
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/* |
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* Determine with how many microseconds the calculated slew time |
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* is different from the desired slew time and store the diff |
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* for the next iteration |
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*/ |
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diff_new = abs(st->slew_time - calc_slew_time); |
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if (diff_new < diff_old) { |
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diff_old = diff_new; |
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sr_clk_idx = i; |
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sr_step_idx = res; |
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} |
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} |
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|
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return ad5758_slew_rate_set(st, sr_clk_idx, sr_step_idx); |
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} |
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|
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static int ad5758_set_out_range(struct ad5758_state *st, int range) |
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{ |
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int ret; |
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|
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ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG, |
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AD5758_DAC_CONFIG_RANGE_MSK, |
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AD5758_DAC_CONFIG_RANGE_MODE(range)); |
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if (ret < 0) |
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return ret; |
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|
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/* Wait to allow time for the internal calibrations to complete */ |
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return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS, |
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AD5758_CAL_MEM_UNREFRESHED_MSK); |
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} |
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|
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static int ad5758_internal_buffers_en(struct ad5758_state *st, bool enable) |
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{ |
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int ret; |
|
|
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ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG, |
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AD5758_DAC_CONFIG_INT_EN_MSK, |
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AD5758_DAC_CONFIG_INT_EN_MODE(enable)); |
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if (ret < 0) |
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return ret; |
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|
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/* Wait to allow time for the internal calibrations to complete */ |
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return ad5758_wait_for_task_complete(st, AD5758_DIGITAL_DIAG_RESULTS, |
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AD5758_CAL_MEM_UNREFRESHED_MSK); |
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} |
|
|
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static int ad5758_reset(struct ad5758_state *st) |
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{ |
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if (st->gpio_reset) { |
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gpiod_set_value(st->gpio_reset, 0); |
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usleep_range(100, 1000); |
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gpiod_set_value(st->gpio_reset, 1); |
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usleep_range(100, 1000); |
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|
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return 0; |
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} else { |
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/* Perform a software reset */ |
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return ad5758_soft_reset(st); |
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} |
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} |
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|
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static int ad5758_reg_access(struct iio_dev *indio_dev, |
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unsigned int reg, |
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unsigned int writeval, |
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unsigned int *readval) |
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{ |
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struct ad5758_state *st = iio_priv(indio_dev); |
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int ret; |
|
|
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mutex_lock(&st->lock); |
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if (readval) { |
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ret = ad5758_spi_reg_read(st, reg); |
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if (ret < 0) { |
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mutex_unlock(&st->lock); |
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return ret; |
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} |
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|
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*readval = ret; |
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ret = 0; |
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} else { |
|
ret = ad5758_spi_reg_write(st, reg, writeval); |
|
} |
|
mutex_unlock(&st->lock); |
|
|
|
return ret; |
|
} |
|
|
|
static int ad5758_read_raw(struct iio_dev *indio_dev, |
|
struct iio_chan_spec const *chan, |
|
int *val, int *val2, long info) |
|
{ |
|
struct ad5758_state *st = iio_priv(indio_dev); |
|
int max, min, ret; |
|
|
|
switch (info) { |
|
case IIO_CHAN_INFO_RAW: |
|
mutex_lock(&st->lock); |
|
ret = ad5758_spi_reg_read(st, AD5758_DAC_INPUT); |
|
mutex_unlock(&st->lock); |
|
if (ret < 0) |
|
return ret; |
|
|
|
*val = ret; |
|
return IIO_VAL_INT; |
|
case IIO_CHAN_INFO_SCALE: |
|
min = st->out_range.min; |
|
max = st->out_range.max; |
|
*val = (max - min) / 1000; |
|
*val2 = 16; |
|
return IIO_VAL_FRACTIONAL_LOG2; |
|
case IIO_CHAN_INFO_OFFSET: |
|
min = st->out_range.min; |
|
max = st->out_range.max; |
|
*val = ((min * (1 << 16)) / (max - min)) / 1000; |
|
return IIO_VAL_INT; |
|
default: |
|
return -EINVAL; |
|
} |
|
} |
|
|
|
static int ad5758_write_raw(struct iio_dev *indio_dev, |
|
struct iio_chan_spec const *chan, |
|
int val, int val2, long info) |
|
{ |
|
struct ad5758_state *st = iio_priv(indio_dev); |
|
int ret; |
|
|
|
switch (info) { |
|
case IIO_CHAN_INFO_RAW: |
|
mutex_lock(&st->lock); |
|
ret = ad5758_spi_reg_write(st, AD5758_DAC_INPUT, val); |
|
mutex_unlock(&st->lock); |
|
return ret; |
|
default: |
|
return -EINVAL; |
|
} |
|
} |
|
|
|
static ssize_t ad5758_read_powerdown(struct iio_dev *indio_dev, |
|
uintptr_t priv, |
|
const struct iio_chan_spec *chan, |
|
char *buf) |
|
{ |
|
struct ad5758_state *st = iio_priv(indio_dev); |
|
|
|
return sysfs_emit(buf, "%d\n", st->pwr_down); |
|
} |
|
|
|
static ssize_t ad5758_write_powerdown(struct iio_dev *indio_dev, |
|
uintptr_t priv, |
|
struct iio_chan_spec const *chan, |
|
const char *buf, size_t len) |
|
{ |
|
struct ad5758_state *st = iio_priv(indio_dev); |
|
bool pwr_down; |
|
unsigned int dac_config_mode, val; |
|
unsigned long int dac_config_msk; |
|
int ret; |
|
|
|
ret = kstrtobool(buf, &pwr_down); |
|
if (ret) |
|
return ret; |
|
|
|
mutex_lock(&st->lock); |
|
if (pwr_down) |
|
val = 0; |
|
else |
|
val = 1; |
|
|
|
dac_config_mode = AD5758_DAC_CONFIG_OUT_EN_MODE(val) | |
|
AD5758_DAC_CONFIG_INT_EN_MODE(val); |
|
dac_config_msk = AD5758_DAC_CONFIG_OUT_EN_MSK | |
|
AD5758_DAC_CONFIG_INT_EN_MSK; |
|
|
|
ret = ad5758_spi_write_mask(st, AD5758_DAC_CONFIG, |
|
dac_config_msk, |
|
dac_config_mode); |
|
if (ret < 0) |
|
goto err_unlock; |
|
|
|
st->pwr_down = pwr_down; |
|
|
|
err_unlock: |
|
mutex_unlock(&st->lock); |
|
|
|
return ret ? ret : len; |
|
} |
|
|
|
static const struct iio_info ad5758_info = { |
|
.read_raw = ad5758_read_raw, |
|
.write_raw = ad5758_write_raw, |
|
.debugfs_reg_access = &ad5758_reg_access, |
|
}; |
|
|
|
static const struct iio_chan_spec_ext_info ad5758_ext_info[] = { |
|
{ |
|
.name = "powerdown", |
|
.read = ad5758_read_powerdown, |
|
.write = ad5758_write_powerdown, |
|
.shared = IIO_SHARED_BY_TYPE, |
|
}, |
|
{ } |
|
}; |
|
|
|
#define AD5758_DAC_CHAN(_chan_type) { \ |
|
.type = (_chan_type), \ |
|
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_RAW) | \ |
|
BIT(IIO_CHAN_INFO_SCALE) | \ |
|
BIT(IIO_CHAN_INFO_OFFSET), \ |
|
.indexed = 1, \ |
|
.output = 1, \ |
|
.ext_info = ad5758_ext_info, \ |
|
} |
|
|
|
static const struct iio_chan_spec ad5758_voltage_ch[] = { |
|
AD5758_DAC_CHAN(IIO_VOLTAGE) |
|
}; |
|
|
|
static const struct iio_chan_spec ad5758_current_ch[] = { |
|
AD5758_DAC_CHAN(IIO_CURRENT) |
|
}; |
|
|
|
static bool ad5758_is_valid_mode(enum ad5758_dc_dc_mode mode) |
|
{ |
|
switch (mode) { |
|
case AD5758_DCDC_MODE_DPC_CURRENT: |
|
case AD5758_DCDC_MODE_DPC_VOLTAGE: |
|
case AD5758_DCDC_MODE_PPC_CURRENT: |
|
return true; |
|
default: |
|
return false; |
|
} |
|
} |
|
|
|
static int ad5758_crc_disable(struct ad5758_state *st) |
|
{ |
|
unsigned int mask; |
|
|
|
mask = (AD5758_WR_FLAG_MSK(AD5758_DIGITAL_DIAG_CONFIG) << 24) | 0x5C3A; |
|
st->d32[0] = cpu_to_be32(mask); |
|
|
|
return spi_write(st->spi, &st->d32[0], 4); |
|
} |
|
|
|
static int ad5758_find_out_range(struct ad5758_state *st, |
|
const struct ad5758_range *range, |
|
unsigned int size, |
|
int min, int max) |
|
{ |
|
int i; |
|
|
|
for (i = 0; i < size; i++) { |
|
if ((min == range[i].min) && (max == range[i].max)) { |
|
st->out_range.reg = range[i].reg; |
|
st->out_range.min = range[i].min; |
|
st->out_range.max = range[i].max; |
|
|
|
return 0; |
|
} |
|
} |
|
|
|
return -EINVAL; |
|
} |
|
|
|
static int ad5758_parse_dt(struct ad5758_state *st) |
|
{ |
|
unsigned int tmp, tmparray[2], size; |
|
const struct ad5758_range *range; |
|
int *index, ret; |
|
|
|
st->dc_dc_ilim = 0; |
|
ret = device_property_read_u32(&st->spi->dev, |
|
"adi,dc-dc-ilim-microamp", &tmp); |
|
if (ret) { |
|
dev_dbg(&st->spi->dev, |
|
"Missing \"dc-dc-ilim-microamp\" property\n"); |
|
} else { |
|
index = bsearch(&tmp, ad5758_dc_dc_ilim, |
|
ARRAY_SIZE(ad5758_dc_dc_ilim), |
|
sizeof(int), cmpfunc); |
|
if (!index) |
|
dev_dbg(&st->spi->dev, "dc-dc-ilim out of range\n"); |
|
else |
|
st->dc_dc_ilim = index - ad5758_dc_dc_ilim; |
|
} |
|
|
|
ret = device_property_read_u32(&st->spi->dev, "adi,dc-dc-mode", |
|
&st->dc_dc_mode); |
|
if (ret) { |
|
dev_err(&st->spi->dev, "Missing \"dc-dc-mode\" property\n"); |
|
return ret; |
|
} |
|
|
|
if (!ad5758_is_valid_mode(st->dc_dc_mode)) |
|
return -EINVAL; |
|
|
|
if (st->dc_dc_mode == AD5758_DCDC_MODE_DPC_VOLTAGE) { |
|
ret = device_property_read_u32_array(&st->spi->dev, |
|
"adi,range-microvolt", |
|
tmparray, 2); |
|
if (ret) { |
|
dev_err(&st->spi->dev, |
|
"Missing \"range-microvolt\" property\n"); |
|
return ret; |
|
} |
|
range = ad5758_voltage_range; |
|
size = ARRAY_SIZE(ad5758_voltage_range); |
|
} else { |
|
ret = device_property_read_u32_array(&st->spi->dev, |
|
"adi,range-microamp", |
|
tmparray, 2); |
|
if (ret) { |
|
dev_err(&st->spi->dev, |
|
"Missing \"range-microamp\" property\n"); |
|
return ret; |
|
} |
|
range = ad5758_current_range; |
|
size = ARRAY_SIZE(ad5758_current_range); |
|
} |
|
|
|
ret = ad5758_find_out_range(st, range, size, tmparray[0], tmparray[1]); |
|
if (ret) { |
|
dev_err(&st->spi->dev, "range invalid\n"); |
|
return ret; |
|
} |
|
|
|
ret = device_property_read_u32(&st->spi->dev, "adi,slew-time-us", &tmp); |
|
if (ret) { |
|
dev_dbg(&st->spi->dev, "Missing \"slew-time-us\" property\n"); |
|
st->slew_time = 0; |
|
} else { |
|
st->slew_time = tmp; |
|
} |
|
|
|
return 0; |
|
} |
|
|
|
static int ad5758_init(struct ad5758_state *st) |
|
{ |
|
int regval, ret; |
|
|
|
st->gpio_reset = devm_gpiod_get_optional(&st->spi->dev, "reset", |
|
GPIOD_OUT_HIGH); |
|
if (IS_ERR(st->gpio_reset)) |
|
return PTR_ERR(st->gpio_reset); |
|
|
|
/* Disable CRC checks */ |
|
ret = ad5758_crc_disable(st); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Perform a reset */ |
|
ret = ad5758_reset(st); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Disable CRC checks */ |
|
ret = ad5758_crc_disable(st); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Perform a calibration memory refresh */ |
|
ret = ad5758_calib_mem_refresh(st); |
|
if (ret < 0) |
|
return ret; |
|
|
|
regval = ad5758_spi_reg_read(st, AD5758_DIGITAL_DIAG_RESULTS); |
|
if (regval < 0) |
|
return regval; |
|
|
|
/* Clear all the error flags */ |
|
ret = ad5758_spi_reg_write(st, AD5758_DIGITAL_DIAG_RESULTS, regval); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Set the dc-to-dc current limit */ |
|
ret = ad5758_set_dc_dc_ilim(st, st->dc_dc_ilim); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Configure the dc-to-dc controller mode */ |
|
ret = ad5758_set_dc_dc_conv_mode(st, st->dc_dc_mode); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Configure the output range */ |
|
ret = ad5758_set_out_range(st, st->out_range.reg); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Enable Slew Rate Control, set the slew rate clock and step */ |
|
if (st->slew_time) { |
|
ret = ad5758_slew_rate_config(st); |
|
if (ret < 0) |
|
return ret; |
|
} |
|
|
|
/* Power up the DAC and internal (INT) amplifiers */ |
|
ret = ad5758_internal_buffers_en(st, 1); |
|
if (ret < 0) |
|
return ret; |
|
|
|
/* Enable VIOUT */ |
|
return ad5758_spi_write_mask(st, AD5758_DAC_CONFIG, |
|
AD5758_DAC_CONFIG_OUT_EN_MSK, |
|
AD5758_DAC_CONFIG_OUT_EN_MODE(1)); |
|
} |
|
|
|
static int ad5758_probe(struct spi_device *spi) |
|
{ |
|
struct ad5758_state *st; |
|
struct iio_dev *indio_dev; |
|
int ret; |
|
|
|
indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); |
|
if (!indio_dev) |
|
return -ENOMEM; |
|
|
|
st = iio_priv(indio_dev); |
|
spi_set_drvdata(spi, indio_dev); |
|
|
|
st->spi = spi; |
|
|
|
mutex_init(&st->lock); |
|
|
|
indio_dev->name = spi_get_device_id(spi)->name; |
|
indio_dev->info = &ad5758_info; |
|
indio_dev->modes = INDIO_DIRECT_MODE; |
|
indio_dev->num_channels = 1; |
|
|
|
ret = ad5758_parse_dt(st); |
|
if (ret < 0) |
|
return ret; |
|
|
|
if (st->dc_dc_mode == AD5758_DCDC_MODE_DPC_VOLTAGE) |
|
indio_dev->channels = ad5758_voltage_ch; |
|
else |
|
indio_dev->channels = ad5758_current_ch; |
|
|
|
ret = ad5758_init(st); |
|
if (ret < 0) { |
|
dev_err(&spi->dev, "AD5758 init failed\n"); |
|
return ret; |
|
} |
|
|
|
return devm_iio_device_register(&st->spi->dev, indio_dev); |
|
} |
|
|
|
static const struct spi_device_id ad5758_id[] = { |
|
{ "ad5758", 0 }, |
|
{} |
|
}; |
|
MODULE_DEVICE_TABLE(spi, ad5758_id); |
|
|
|
static const struct of_device_id ad5758_of_match[] = { |
|
{ .compatible = "adi,ad5758" }, |
|
{ }, |
|
}; |
|
MODULE_DEVICE_TABLE(of, ad5758_of_match); |
|
|
|
static struct spi_driver ad5758_driver = { |
|
.driver = { |
|
.name = KBUILD_MODNAME, |
|
.of_match_table = ad5758_of_match, |
|
}, |
|
.probe = ad5758_probe, |
|
.id_table = ad5758_id, |
|
}; |
|
|
|
module_spi_driver(ad5758_driver); |
|
|
|
MODULE_AUTHOR("Stefan Popa <[email protected]>"); |
|
MODULE_DESCRIPTION("Analog Devices AD5758 DAC"); |
|
MODULE_LICENSE("GPL v2");
|
|
|