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251 lines
6.6 KiB
251 lines
6.6 KiB
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) |
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// |
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// This file is provided under a dual BSD/GPLv2 license. When using or |
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// redistributing this file, you may do so under either license. |
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// |
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// Copyright(c) 2018-2021 Intel Corporation. All rights reserved. |
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// |
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// Author: Liam Girdwood <[email protected]> |
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// |
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#include <linux/module.h> |
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#include <linux/pci.h> |
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#include <sound/soc-acpi.h> |
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#include <sound/soc-acpi-intel-match.h> |
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#include <sound/sof.h> |
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#include "../ops.h" |
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#include "atom.h" |
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#include "../sof-pci-dev.h" |
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#include "../sof-audio.h" |
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/* platform specific devices */ |
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#include "shim.h" |
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static struct snd_soc_acpi_mach sof_tng_machines[] = { |
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{ |
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.id = "INT343A", |
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.drv_name = "edison", |
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.sof_fw_filename = "sof-byt.ri", |
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.sof_tplg_filename = "sof-byt.tplg", |
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}, |
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{} |
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}; |
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static const struct snd_sof_debugfs_map tng_debugfs[] = { |
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{"dmac0", DSP_BAR, DMAC0_OFFSET, DMAC_SIZE, |
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SOF_DEBUGFS_ACCESS_ALWAYS}, |
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{"dmac1", DSP_BAR, DMAC1_OFFSET, DMAC_SIZE, |
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SOF_DEBUGFS_ACCESS_ALWAYS}, |
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{"ssp0", DSP_BAR, SSP0_OFFSET, SSP_SIZE, |
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SOF_DEBUGFS_ACCESS_ALWAYS}, |
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{"ssp1", DSP_BAR, SSP1_OFFSET, SSP_SIZE, |
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SOF_DEBUGFS_ACCESS_ALWAYS}, |
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{"ssp2", DSP_BAR, SSP2_OFFSET, SSP_SIZE, |
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SOF_DEBUGFS_ACCESS_ALWAYS}, |
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{"iram", DSP_BAR, IRAM_OFFSET, IRAM_SIZE, |
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SOF_DEBUGFS_ACCESS_D0_ONLY}, |
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{"dram", DSP_BAR, DRAM_OFFSET, DRAM_SIZE, |
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SOF_DEBUGFS_ACCESS_D0_ONLY}, |
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{"shim", DSP_BAR, SHIM_OFFSET, SHIM_SIZE_BYT, |
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SOF_DEBUGFS_ACCESS_ALWAYS}, |
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}; |
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static int tangier_pci_probe(struct snd_sof_dev *sdev) |
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{ |
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struct snd_sof_pdata *pdata = sdev->pdata; |
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const struct sof_dev_desc *desc = pdata->desc; |
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struct pci_dev *pci = to_pci_dev(sdev->dev); |
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const struct sof_intel_dsp_desc *chip; |
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u32 base, size; |
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int ret; |
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chip = get_chip_info(sdev->pdata); |
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if (!chip) { |
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dev_err(sdev->dev, "error: no such device supported\n"); |
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return -EIO; |
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} |
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sdev->num_cores = chip->cores_num; |
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/* DSP DMA can only access low 31 bits of host memory */ |
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ret = dma_coerce_mask_and_coherent(&pci->dev, DMA_BIT_MASK(31)); |
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if (ret < 0) { |
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dev_err(sdev->dev, "error: failed to set DMA mask %d\n", ret); |
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return ret; |
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} |
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/* LPE base */ |
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base = pci_resource_start(pci, desc->resindex_lpe_base) - IRAM_OFFSET; |
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size = PCI_BAR_SIZE; |
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dev_dbg(sdev->dev, "LPE PHY base at 0x%x size 0x%x", base, size); |
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sdev->bar[DSP_BAR] = devm_ioremap(sdev->dev, base, size); |
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if (!sdev->bar[DSP_BAR]) { |
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dev_err(sdev->dev, "error: failed to ioremap LPE base 0x%x size 0x%x\n", |
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base, size); |
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return -ENODEV; |
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} |
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dev_dbg(sdev->dev, "LPE VADDR %p\n", sdev->bar[DSP_BAR]); |
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/* IMR base - optional */ |
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if (desc->resindex_imr_base == -1) |
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goto irq; |
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base = pci_resource_start(pci, desc->resindex_imr_base); |
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size = pci_resource_len(pci, desc->resindex_imr_base); |
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/* some BIOSes don't map IMR */ |
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if (base == 0x55aa55aa || base == 0x0) { |
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dev_info(sdev->dev, "IMR not set by BIOS. Ignoring\n"); |
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goto irq; |
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} |
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dev_dbg(sdev->dev, "IMR base at 0x%x size 0x%x", base, size); |
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sdev->bar[IMR_BAR] = devm_ioremap(sdev->dev, base, size); |
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if (!sdev->bar[IMR_BAR]) { |
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dev_err(sdev->dev, "error: failed to ioremap IMR base 0x%x size 0x%x\n", |
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base, size); |
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return -ENODEV; |
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} |
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dev_dbg(sdev->dev, "IMR VADDR %p\n", sdev->bar[IMR_BAR]); |
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irq: |
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/* register our IRQ */ |
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sdev->ipc_irq = pci->irq; |
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dev_dbg(sdev->dev, "using IRQ %d\n", sdev->ipc_irq); |
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ret = devm_request_threaded_irq(sdev->dev, sdev->ipc_irq, |
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atom_irq_handler, atom_irq_thread, |
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0, "AudioDSP", sdev); |
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if (ret < 0) { |
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dev_err(sdev->dev, "error: failed to register IRQ %d\n", |
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sdev->ipc_irq); |
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return ret; |
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} |
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/* enable BUSY and disable DONE Interrupt by default */ |
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snd_sof_dsp_update_bits64(sdev, DSP_BAR, SHIM_IMRX, |
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SHIM_IMRX_BUSY | SHIM_IMRX_DONE, |
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SHIM_IMRX_DONE); |
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/* set default mailbox offset for FW ready message */ |
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sdev->dsp_box.offset = MBOX_OFFSET; |
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return ret; |
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} |
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const struct snd_sof_dsp_ops sof_tng_ops = { |
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/* device init */ |
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.probe = tangier_pci_probe, |
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/* DSP core boot / reset */ |
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.run = atom_run, |
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.reset = atom_reset, |
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/* Register IO */ |
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.write = sof_io_write, |
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.read = sof_io_read, |
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.write64 = sof_io_write64, |
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.read64 = sof_io_read64, |
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/* Block IO */ |
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.block_read = sof_block_read, |
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.block_write = sof_block_write, |
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/* Mailbox IO */ |
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.mailbox_read = sof_mailbox_read, |
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.mailbox_write = sof_mailbox_write, |
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/* doorbell */ |
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.irq_handler = atom_irq_handler, |
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.irq_thread = atom_irq_thread, |
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/* ipc */ |
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.send_msg = atom_send_msg, |
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.fw_ready = sof_fw_ready, |
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.get_mailbox_offset = atom_get_mailbox_offset, |
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.get_window_offset = atom_get_window_offset, |
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.ipc_msg_data = sof_ipc_msg_data, |
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.ipc_pcm_params = sof_ipc_pcm_params, |
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/* machine driver */ |
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.machine_select = atom_machine_select, |
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.machine_register = sof_machine_register, |
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.machine_unregister = sof_machine_unregister, |
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.set_mach_params = atom_set_mach_params, |
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/* debug */ |
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.debug_map = tng_debugfs, |
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.debug_map_count = ARRAY_SIZE(tng_debugfs), |
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.dbg_dump = atom_dump, |
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.debugfs_add_region_item = snd_sof_debugfs_add_region_item_iomem, |
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/* stream callbacks */ |
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.pcm_open = sof_stream_pcm_open, |
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.pcm_close = sof_stream_pcm_close, |
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/* module loading */ |
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.load_module = snd_sof_parse_module_memcpy, |
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/*Firmware loading */ |
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.load_firmware = snd_sof_load_firmware_memcpy, |
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/* DAI drivers */ |
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.drv = atom_dai, |
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.num_drv = 3, /* we have only 3 SSPs on byt*/ |
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/* ALSA HW info flags */ |
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.hw_info = SNDRV_PCM_INFO_MMAP | |
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SNDRV_PCM_INFO_MMAP_VALID | |
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SNDRV_PCM_INFO_INTERLEAVED | |
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SNDRV_PCM_INFO_PAUSE | |
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SNDRV_PCM_INFO_BATCH, |
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.dsp_arch_ops = &sof_xtensa_arch_ops, |
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}; |
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const struct sof_intel_dsp_desc tng_chip_info = { |
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.cores_num = 1, |
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.host_managed_cores_mask = 1, |
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}; |
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static const struct sof_dev_desc tng_desc = { |
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.machines = sof_tng_machines, |
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.resindex_lpe_base = 3, /* IRAM, but subtract IRAM offset */ |
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.resindex_pcicfg_base = -1, |
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.resindex_imr_base = 0, |
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.irqindex_host_ipc = -1, |
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.chip_info = &tng_chip_info, |
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.default_fw_path = "intel/sof", |
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.default_tplg_path = "intel/sof-tplg", |
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.default_fw_filename = "sof-byt.ri", |
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.nocodec_tplg_filename = "sof-byt.tplg", |
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.ops = &sof_tng_ops, |
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}; |
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/* PCI IDs */ |
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static const struct pci_device_id sof_pci_ids[] = { |
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{ PCI_DEVICE(0x8086, 0x119a), |
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.driver_data = (unsigned long)&tng_desc}, |
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{ 0, } |
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}; |
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MODULE_DEVICE_TABLE(pci, sof_pci_ids); |
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/* pci_driver definition */ |
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static struct pci_driver snd_sof_pci_intel_tng_driver = { |
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.name = "sof-audio-pci-intel-tng", |
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.id_table = sof_pci_ids, |
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.probe = sof_pci_probe, |
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.remove = sof_pci_remove, |
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.shutdown = sof_pci_shutdown, |
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.driver = { |
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.pm = &sof_pci_pm, |
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}, |
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}; |
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module_pci_driver(snd_sof_pci_intel_tng_driver); |
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MODULE_LICENSE("Dual BSD/GPL"); |
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MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_HIFI_EP_IPC); |
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MODULE_IMPORT_NS(SND_SOC_SOF_XTENSA); |
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MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV); |
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MODULE_IMPORT_NS(SND_SOC_SOF_INTEL_ATOM_HIFI_EP);
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