mirror of
https://github.com/Qortal/Brooklyn.git
synced 2025-02-13 02:35:54 +00:00
a94b3d14aa
Changes included (and more): 1. Dynamic RAM merge 2. Real-time page scan and allocation 3. Cache compression 4. Real-time IRQ checks 5. Dynamic I/O allocation for Java heap 6. Java page migration 7. Contiguous memory allocation 8. Idle pages tracking 9. Per CPU RAM usage tracking 10. ARM NEON scalar multiplication library 11. NEON/ARMv8 crypto extensions 12. NEON SHA, Blake, RIPEMD crypto extensions 13. Parallel NEON crypto engine for multi-algo based CPU stress reduction
54 lines
1.0 KiB
YAML
54 lines
1.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
|
%YAML 1.2
|
|
---
|
|
$id: http://devicetree.org/schemas/timer/cdns,ttc.yaml#
|
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
|
|
|
title: Cadence TTC - Triple Timer Counter
|
|
|
|
maintainers:
|
|
- Michal Simek <michal.simek@xilinx.com>
|
|
|
|
properties:
|
|
compatible:
|
|
const: cdns,ttc
|
|
|
|
reg:
|
|
maxItems: 1
|
|
|
|
interrupts:
|
|
minItems: 3
|
|
maxItems: 3
|
|
description: |
|
|
A list of 3 interrupts; one per timer channel.
|
|
|
|
clocks:
|
|
maxItems: 1
|
|
|
|
power-domains:
|
|
maxItems: 1
|
|
|
|
timer-width:
|
|
$ref: "/schemas/types.yaml#/definitions/uint32"
|
|
description: |
|
|
Bit width of the timer, necessary if not 16.
|
|
|
|
required:
|
|
- compatible
|
|
- reg
|
|
- interrupts
|
|
- clocks
|
|
|
|
additionalProperties: false
|
|
|
|
examples:
|
|
- |
|
|
ttc0: ttc0@f8001000 {
|
|
interrupt-parent = <&intc>;
|
|
interrupts = <0 10 4>, <0 11 4>, <0 12 4>;
|
|
compatible = "cdns,ttc";
|
|
reg = <0xF8001000 0x1000>;
|
|
clocks = <&cpu_clk 3>;
|
|
timer-width = <32>;
|
|
};
|