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337 lines
8.8 KiB
337 lines
8.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* Copyright (C) 2018 Marvell |
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* |
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* Authors: |
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* Evan Wang <[email protected]> |
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* Miquèl Raynal <[email protected]> |
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* |
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* Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart. |
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* SMC call initial support done by Grzegorz Jaszczyk. |
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*/ |
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#include <linux/arm-smccc.h> |
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#include <linux/io.h> |
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#include <linux/iopoll.h> |
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#include <linux/mfd/syscon.h> |
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#include <linux/module.h> |
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#include <linux/phy.h> |
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#include <linux/phy/phy.h> |
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#include <linux/platform_device.h> |
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#define MVEBU_A3700_COMPHY_LANES 3 |
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#define MVEBU_A3700_COMPHY_PORTS 2 |
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/* COMPHY Fast SMC function identifiers */ |
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#define COMPHY_SIP_POWER_ON 0x82000001 |
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#define COMPHY_SIP_POWER_OFF 0x82000002 |
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#define COMPHY_SIP_PLL_LOCK 0x82000003 |
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#define COMPHY_FW_MODE_SATA 0x1 |
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#define COMPHY_FW_MODE_SGMII 0x2 |
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#define COMPHY_FW_MODE_HS_SGMII 0x3 |
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#define COMPHY_FW_MODE_USB3H 0x4 |
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#define COMPHY_FW_MODE_USB3D 0x5 |
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#define COMPHY_FW_MODE_PCIE 0x6 |
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#define COMPHY_FW_MODE_RXAUI 0x7 |
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#define COMPHY_FW_MODE_XFI 0x8 |
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#define COMPHY_FW_MODE_SFI 0x9 |
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#define COMPHY_FW_MODE_USB3 0xa |
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#define COMPHY_FW_SPEED_1_25G 0 /* SGMII 1G */ |
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#define COMPHY_FW_SPEED_2_5G 1 |
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#define COMPHY_FW_SPEED_3_125G 2 /* SGMII 2.5G */ |
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#define COMPHY_FW_SPEED_5G 3 |
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#define COMPHY_FW_SPEED_5_15625G 4 /* XFI 5G */ |
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#define COMPHY_FW_SPEED_6G 5 |
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#define COMPHY_FW_SPEED_10_3125G 6 /* XFI 10G */ |
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#define COMPHY_FW_SPEED_MAX 0x3F |
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#define COMPHY_FW_MODE(mode) ((mode) << 12) |
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#define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \ |
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((idx) << 8) | \ |
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((speed) << 2)) |
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#define COMPHY_FW_PCIE(mode, idx, speed, width) (COMPHY_FW_NET(mode, idx, speed) | \ |
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((width) << 18)) |
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struct mvebu_a3700_comphy_conf { |
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unsigned int lane; |
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enum phy_mode mode; |
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int submode; |
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unsigned int port; |
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u32 fw_mode; |
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}; |
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#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _port, _fw) \ |
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{ \ |
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.lane = _lane, \ |
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.mode = _mode, \ |
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.submode = _smode, \ |
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.port = _port, \ |
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.fw_mode = _fw, \ |
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} |
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#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _port, _fw) \ |
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MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _port, _fw) |
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#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _port, _fw) \ |
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MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _port, _fw) |
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static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = { |
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/* lane 0 */ |
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MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, 0, |
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COMPHY_FW_MODE_USB3H), |
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MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1, |
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COMPHY_FW_MODE_SGMII), |
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MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1, |
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COMPHY_FW_MODE_HS_SGMII), |
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/* lane 1 */ |
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MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0, |
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COMPHY_FW_MODE_PCIE), |
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MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0, |
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COMPHY_FW_MODE_SGMII), |
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MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0, |
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COMPHY_FW_MODE_HS_SGMII), |
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/* lane 2 */ |
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MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0, |
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COMPHY_FW_MODE_SATA), |
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MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, 0, |
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COMPHY_FW_MODE_USB3H), |
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}; |
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struct mvebu_a3700_comphy_lane { |
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struct device *dev; |
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unsigned int id; |
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enum phy_mode mode; |
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int submode; |
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int port; |
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}; |
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static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane, |
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unsigned long mode) |
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{ |
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struct arm_smccc_res res; |
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s32 ret; |
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arm_smccc_smc(function, lane, mode, 0, 0, 0, 0, 0, &res); |
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ret = res.a0; |
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switch (ret) { |
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case SMCCC_RET_SUCCESS: |
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return 0; |
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case SMCCC_RET_NOT_SUPPORTED: |
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return -EOPNOTSUPP; |
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default: |
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return -EINVAL; |
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} |
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} |
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static int mvebu_a3700_comphy_get_fw_mode(int lane, int port, |
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enum phy_mode mode, |
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int submode) |
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{ |
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int i, n = ARRAY_SIZE(mvebu_a3700_comphy_modes); |
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/* Unused PHY mux value is 0x0 */ |
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if (mode == PHY_MODE_INVALID) |
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return -EINVAL; |
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for (i = 0; i < n; i++) { |
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if (mvebu_a3700_comphy_modes[i].lane == lane && |
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mvebu_a3700_comphy_modes[i].port == port && |
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mvebu_a3700_comphy_modes[i].mode == mode && |
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mvebu_a3700_comphy_modes[i].submode == submode) |
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break; |
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} |
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if (i == n) |
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return -EINVAL; |
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return mvebu_a3700_comphy_modes[i].fw_mode; |
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} |
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static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode, |
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int submode) |
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{ |
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struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); |
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int fw_mode; |
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if (submode == PHY_INTERFACE_MODE_1000BASEX) |
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submode = PHY_INTERFACE_MODE_SGMII; |
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fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, mode, |
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submode); |
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if (fw_mode < 0) { |
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dev_err(lane->dev, "invalid COMPHY mode\n"); |
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return fw_mode; |
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} |
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/* Just remember the mode, ->power_on() will do the real setup */ |
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lane->mode = mode; |
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lane->submode = submode; |
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return 0; |
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} |
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static int mvebu_a3700_comphy_power_on(struct phy *phy) |
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{ |
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struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); |
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u32 fw_param; |
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int fw_mode; |
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int ret; |
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fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, |
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lane->mode, lane->submode); |
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if (fw_mode < 0) { |
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dev_err(lane->dev, "invalid COMPHY mode\n"); |
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return fw_mode; |
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} |
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switch (lane->mode) { |
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case PHY_MODE_USB_HOST_SS: |
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dev_dbg(lane->dev, "set lane %d to USB3 host mode\n", lane->id); |
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fw_param = COMPHY_FW_MODE(fw_mode); |
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break; |
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case PHY_MODE_SATA: |
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dev_dbg(lane->dev, "set lane %d to SATA mode\n", lane->id); |
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fw_param = COMPHY_FW_MODE(fw_mode); |
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break; |
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case PHY_MODE_ETHERNET: |
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switch (lane->submode) { |
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case PHY_INTERFACE_MODE_SGMII: |
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dev_dbg(lane->dev, "set lane %d to SGMII mode\n", |
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lane->id); |
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fw_param = COMPHY_FW_NET(fw_mode, lane->port, |
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COMPHY_FW_SPEED_1_25G); |
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break; |
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case PHY_INTERFACE_MODE_2500BASEX: |
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dev_dbg(lane->dev, "set lane %d to HS SGMII mode\n", |
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lane->id); |
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fw_param = COMPHY_FW_NET(fw_mode, lane->port, |
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COMPHY_FW_SPEED_3_125G); |
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break; |
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default: |
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dev_err(lane->dev, "unsupported PHY submode (%d)\n", |
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lane->submode); |
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return -ENOTSUPP; |
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} |
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break; |
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case PHY_MODE_PCIE: |
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dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id); |
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fw_param = COMPHY_FW_PCIE(fw_mode, lane->port, |
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COMPHY_FW_SPEED_5G, |
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phy->attrs.bus_width); |
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break; |
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default: |
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dev_err(lane->dev, "unsupported PHY mode (%d)\n", lane->mode); |
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return -ENOTSUPP; |
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} |
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ret = mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_ON, lane->id, fw_param); |
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if (ret == -EOPNOTSUPP) |
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dev_err(lane->dev, |
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"unsupported SMC call, try updating your firmware\n"); |
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return ret; |
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} |
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static int mvebu_a3700_comphy_power_off(struct phy *phy) |
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{ |
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struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); |
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return mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_OFF, lane->id, 0); |
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} |
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static const struct phy_ops mvebu_a3700_comphy_ops = { |
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.power_on = mvebu_a3700_comphy_power_on, |
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.power_off = mvebu_a3700_comphy_power_off, |
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.set_mode = mvebu_a3700_comphy_set_mode, |
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.owner = THIS_MODULE, |
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}; |
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static struct phy *mvebu_a3700_comphy_xlate(struct device *dev, |
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struct of_phandle_args *args) |
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{ |
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struct mvebu_a3700_comphy_lane *lane; |
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struct phy *phy; |
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if (WARN_ON(args->args[0] >= MVEBU_A3700_COMPHY_PORTS)) |
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return ERR_PTR(-EINVAL); |
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phy = of_phy_simple_xlate(dev, args); |
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if (IS_ERR(phy)) |
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return phy; |
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lane = phy_get_drvdata(phy); |
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lane->port = args->args[0]; |
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return phy; |
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} |
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static int mvebu_a3700_comphy_probe(struct platform_device *pdev) |
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{ |
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struct phy_provider *provider; |
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struct device_node *child; |
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for_each_available_child_of_node(pdev->dev.of_node, child) { |
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struct mvebu_a3700_comphy_lane *lane; |
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struct phy *phy; |
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int ret; |
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u32 lane_id; |
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ret = of_property_read_u32(child, "reg", &lane_id); |
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if (ret < 0) { |
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dev_err(&pdev->dev, "missing 'reg' property (%d)\n", |
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ret); |
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continue; |
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} |
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if (lane_id >= MVEBU_A3700_COMPHY_LANES) { |
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dev_err(&pdev->dev, "invalid 'reg' property\n"); |
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continue; |
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} |
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lane = devm_kzalloc(&pdev->dev, sizeof(*lane), GFP_KERNEL); |
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if (!lane) { |
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of_node_put(child); |
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return -ENOMEM; |
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} |
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phy = devm_phy_create(&pdev->dev, child, |
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&mvebu_a3700_comphy_ops); |
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if (IS_ERR(phy)) { |
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of_node_put(child); |
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return PTR_ERR(phy); |
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} |
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lane->dev = &pdev->dev; |
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lane->mode = PHY_MODE_INVALID; |
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lane->submode = PHY_INTERFACE_MODE_NA; |
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lane->id = lane_id; |
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lane->port = -1; |
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phy_set_drvdata(phy, lane); |
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} |
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provider = devm_of_phy_provider_register(&pdev->dev, |
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mvebu_a3700_comphy_xlate); |
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return PTR_ERR_OR_ZERO(provider); |
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} |
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static const struct of_device_id mvebu_a3700_comphy_of_match_table[] = { |
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{ .compatible = "marvell,comphy-a3700" }, |
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{ }, |
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}; |
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MODULE_DEVICE_TABLE(of, mvebu_a3700_comphy_of_match_table); |
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static struct platform_driver mvebu_a3700_comphy_driver = { |
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.probe = mvebu_a3700_comphy_probe, |
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.driver = { |
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.name = "mvebu-a3700-comphy", |
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.of_match_table = mvebu_a3700_comphy_of_match_table, |
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}, |
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}; |
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module_platform_driver(mvebu_a3700_comphy_driver); |
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MODULE_AUTHOR("Miquèl Raynal <[email protected]>"); |
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MODULE_DESCRIPTION("Common PHY driver for A3700"); |
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MODULE_LICENSE("GPL v2");
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