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681 lines
17 KiB
681 lines
17 KiB
/* |
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* Copyright (c) 2008-2011 Atheros Communications Inc. |
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* |
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* Permission to use, copy, modify, and/or distribute this software for any |
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* purpose with or without fee is hereby granted, provided that the above |
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* copyright notice and this permission notice appear in all copies. |
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* |
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
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*/ |
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|
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#include "hw.h" |
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#include <linux/ath9k_platform.h> |
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|
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void ath9k_hw_analog_shift_regwrite(struct ath_hw *ah, u32 reg, u32 val) |
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{ |
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REG_WRITE(ah, reg, val); |
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|
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if (ah->config.analog_shiftreg) |
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udelay(100); |
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} |
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void ath9k_hw_analog_shift_rmw(struct ath_hw *ah, u32 reg, u32 mask, |
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u32 shift, u32 val) |
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{ |
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REG_RMW(ah, reg, ((val << shift) & mask), mask); |
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|
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if (ah->config.analog_shiftreg) |
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udelay(100); |
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} |
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int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight, |
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int16_t targetLeft, int16_t targetRight) |
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{ |
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int16_t rv; |
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if (srcRight == srcLeft) { |
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rv = targetLeft; |
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} else { |
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rv = (int16_t) (((target - srcLeft) * targetRight + |
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(srcRight - target) * targetLeft) / |
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(srcRight - srcLeft)); |
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} |
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return rv; |
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} |
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|
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bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize, |
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u16 *indexL, u16 *indexR) |
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{ |
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u16 i; |
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if (target <= pList[0]) { |
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*indexL = *indexR = 0; |
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return true; |
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} |
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if (target >= pList[listSize - 1]) { |
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*indexL = *indexR = (u16) (listSize - 1); |
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return true; |
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} |
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for (i = 0; i < listSize - 1; i++) { |
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if (pList[i] == target) { |
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*indexL = *indexR = i; |
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return true; |
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} |
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if (target < pList[i + 1]) { |
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*indexL = i; |
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*indexR = (u16) (i + 1); |
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return false; |
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} |
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} |
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return false; |
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} |
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void ath9k_hw_usb_gen_fill_eeprom(struct ath_hw *ah, u16 *eep_data, |
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int eep_start_loc, int size) |
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{ |
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int i = 0, j, addr; |
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u32 addrdata[8]; |
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u32 data[8]; |
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for (addr = 0; addr < size; addr++) { |
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addrdata[i] = AR5416_EEPROM_OFFSET + |
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((addr + eep_start_loc) << AR5416_EEPROM_S); |
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i++; |
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if (i == 8) { |
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REG_READ_MULTI(ah, addrdata, data, i); |
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for (j = 0; j < i; j++) { |
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*eep_data = data[j]; |
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eep_data++; |
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} |
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i = 0; |
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} |
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} |
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if (i != 0) { |
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REG_READ_MULTI(ah, addrdata, data, i); |
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for (j = 0; j < i; j++) { |
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*eep_data = data[j]; |
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eep_data++; |
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} |
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} |
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} |
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static bool ath9k_hw_nvram_read_array(u16 *blob, size_t blob_size, |
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off_t offset, u16 *data) |
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{ |
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if (offset >= blob_size) |
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return false; |
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*data = blob[offset]; |
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return true; |
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} |
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static bool ath9k_hw_nvram_read_pdata(struct ath9k_platform_data *pdata, |
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off_t offset, u16 *data) |
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{ |
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return ath9k_hw_nvram_read_array(pdata->eeprom_data, |
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ARRAY_SIZE(pdata->eeprom_data), |
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offset, data); |
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} |
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static bool ath9k_hw_nvram_read_firmware(const struct firmware *eeprom_blob, |
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off_t offset, u16 *data) |
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{ |
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return ath9k_hw_nvram_read_array((u16 *) eeprom_blob->data, |
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eeprom_blob->size / sizeof(u16), |
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offset, data); |
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} |
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bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data) |
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{ |
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struct ath_common *common = ath9k_hw_common(ah); |
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struct ath9k_platform_data *pdata = ah->dev->platform_data; |
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bool ret; |
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if (ah->eeprom_blob) |
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ret = ath9k_hw_nvram_read_firmware(ah->eeprom_blob, off, data); |
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else if (pdata && !pdata->use_eeprom) |
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ret = ath9k_hw_nvram_read_pdata(pdata, off, data); |
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else |
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ret = common->bus_ops->eeprom_read(common, off, data); |
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if (!ret) |
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ath_dbg(common, EEPROM, |
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"unable to read eeprom region at offset %u\n", off); |
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return ret; |
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} |
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int ath9k_hw_nvram_swap_data(struct ath_hw *ah, bool *swap_needed, int size) |
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{ |
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u16 magic; |
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u16 *eepdata; |
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int i; |
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bool needs_byteswap = false; |
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struct ath_common *common = ath9k_hw_common(ah); |
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if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { |
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ath_err(common, "Reading Magic # failed\n"); |
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return -EIO; |
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} |
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if (swab16(magic) == AR5416_EEPROM_MAGIC) { |
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needs_byteswap = true; |
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ath_dbg(common, EEPROM, |
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"EEPROM needs byte-swapping to correct endianness.\n"); |
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} else if (magic != AR5416_EEPROM_MAGIC) { |
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if (ath9k_hw_use_flash(ah)) { |
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ath_dbg(common, EEPROM, |
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"Ignoring invalid EEPROM magic (0x%04x).\n", |
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magic); |
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} else { |
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ath_err(common, |
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"Invalid EEPROM magic (0x%04x).\n", magic); |
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return -EINVAL; |
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} |
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} |
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if (needs_byteswap) { |
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if (ah->ah_flags & AH_NO_EEP_SWAP) { |
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ath_info(common, |
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"Ignoring endianness difference in EEPROM magic bytes.\n"); |
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} else { |
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eepdata = (u16 *)(&ah->eeprom); |
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for (i = 0; i < size; i++) |
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eepdata[i] = swab16(eepdata[i]); |
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} |
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} |
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if (ah->eep_ops->get_eepmisc(ah) & AR5416_EEPMISC_BIG_ENDIAN) { |
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*swap_needed = true; |
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ath_dbg(common, EEPROM, |
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"Big Endian EEPROM detected according to EEPMISC register.\n"); |
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} else { |
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*swap_needed = false; |
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} |
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return 0; |
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} |
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bool ath9k_hw_nvram_validate_checksum(struct ath_hw *ah, int size) |
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{ |
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u32 i, sum = 0; |
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u16 *eepdata = (u16 *)(&ah->eeprom); |
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struct ath_common *common = ath9k_hw_common(ah); |
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for (i = 0; i < size; i++) |
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sum ^= eepdata[i]; |
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if (sum != 0xffff) { |
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ath_err(common, "Bad EEPROM checksum 0x%x\n", sum); |
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return false; |
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} |
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return true; |
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} |
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bool ath9k_hw_nvram_check_version(struct ath_hw *ah, int version, int minrev) |
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{ |
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struct ath_common *common = ath9k_hw_common(ah); |
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if (ah->eep_ops->get_eeprom_ver(ah) != version || |
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ah->eep_ops->get_eeprom_rev(ah) < minrev) { |
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ath_err(common, "Bad EEPROM VER 0x%04x or REV 0x%04x\n", |
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ah->eep_ops->get_eeprom_ver(ah), |
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ah->eep_ops->get_eeprom_rev(ah)); |
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return false; |
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} |
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return true; |
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} |
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void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, |
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u8 *pVpdList, u16 numIntercepts, |
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u8 *pRetVpdList) |
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{ |
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u16 i, k; |
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u8 currPwr = pwrMin; |
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u16 idxL = 0, idxR = 0; |
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for (i = 0; i <= (pwrMax - pwrMin) / 2; i++) { |
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ath9k_hw_get_lower_upper_index(currPwr, pPwrList, |
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numIntercepts, &(idxL), |
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&(idxR)); |
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if (idxR < 1) |
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idxR = 1; |
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if (idxL == numIntercepts - 1) |
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idxL = (u16) (numIntercepts - 2); |
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if (pPwrList[idxL] == pPwrList[idxR]) |
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k = pVpdList[idxL]; |
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else |
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k = (u16)(((currPwr - pPwrList[idxL]) * pVpdList[idxR] + |
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(pPwrList[idxR] - currPwr) * pVpdList[idxL]) / |
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(pPwrList[idxR] - pPwrList[idxL])); |
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pRetVpdList[i] = (u8) k; |
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currPwr += 2; |
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} |
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} |
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void ath9k_hw_get_legacy_target_powers(struct ath_hw *ah, |
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struct ath9k_channel *chan, |
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struct cal_target_power_leg *powInfo, |
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u16 numChannels, |
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struct cal_target_power_leg *pNewPower, |
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u16 numRates, bool isExtTarget) |
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{ |
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struct chan_centers centers; |
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u16 clo, chi; |
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int i; |
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int matchIndex = -1, lowIndex = -1; |
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u16 freq; |
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ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
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freq = (isExtTarget) ? centers.ext_center : centers.ctl_center; |
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if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, |
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IS_CHAN_2GHZ(chan))) { |
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matchIndex = 0; |
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} else { |
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for (i = 0; (i < numChannels) && |
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(powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) { |
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if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel, |
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IS_CHAN_2GHZ(chan))) { |
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matchIndex = i; |
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break; |
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} else if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel, |
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IS_CHAN_2GHZ(chan)) && i > 0 && |
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freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel, |
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IS_CHAN_2GHZ(chan))) { |
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lowIndex = i - 1; |
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break; |
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} |
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} |
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if ((matchIndex == -1) && (lowIndex == -1)) |
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matchIndex = i - 1; |
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} |
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if (matchIndex != -1) { |
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*pNewPower = powInfo[matchIndex]; |
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} else { |
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clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel, |
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IS_CHAN_2GHZ(chan)); |
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chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel, |
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IS_CHAN_2GHZ(chan)); |
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for (i = 0; i < numRates; i++) { |
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pNewPower->tPow2x[i] = |
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(u8)ath9k_hw_interpolate(freq, clo, chi, |
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powInfo[lowIndex].tPow2x[i], |
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powInfo[lowIndex + 1].tPow2x[i]); |
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} |
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} |
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} |
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void ath9k_hw_get_target_powers(struct ath_hw *ah, |
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struct ath9k_channel *chan, |
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struct cal_target_power_ht *powInfo, |
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u16 numChannels, |
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struct cal_target_power_ht *pNewPower, |
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u16 numRates, bool isHt40Target) |
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{ |
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struct chan_centers centers; |
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u16 clo, chi; |
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int i; |
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int matchIndex = -1, lowIndex = -1; |
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u16 freq; |
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ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
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freq = isHt40Target ? centers.synth_center : centers.ctl_center; |
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if (freq <= ath9k_hw_fbin2freq(powInfo[0].bChannel, IS_CHAN_2GHZ(chan))) { |
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matchIndex = 0; |
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} else { |
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for (i = 0; (i < numChannels) && |
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(powInfo[i].bChannel != AR5416_BCHAN_UNUSED); i++) { |
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if (freq == ath9k_hw_fbin2freq(powInfo[i].bChannel, |
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IS_CHAN_2GHZ(chan))) { |
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matchIndex = i; |
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break; |
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} else |
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if (freq < ath9k_hw_fbin2freq(powInfo[i].bChannel, |
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IS_CHAN_2GHZ(chan)) && i > 0 && |
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freq > ath9k_hw_fbin2freq(powInfo[i - 1].bChannel, |
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IS_CHAN_2GHZ(chan))) { |
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lowIndex = i - 1; |
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break; |
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} |
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} |
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if ((matchIndex == -1) && (lowIndex == -1)) |
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matchIndex = i - 1; |
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} |
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if (matchIndex != -1) { |
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*pNewPower = powInfo[matchIndex]; |
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} else { |
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clo = ath9k_hw_fbin2freq(powInfo[lowIndex].bChannel, |
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IS_CHAN_2GHZ(chan)); |
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chi = ath9k_hw_fbin2freq(powInfo[lowIndex + 1].bChannel, |
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IS_CHAN_2GHZ(chan)); |
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for (i = 0; i < numRates; i++) { |
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pNewPower->tPow2x[i] = (u8)ath9k_hw_interpolate(freq, |
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clo, chi, |
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powInfo[lowIndex].tPow2x[i], |
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powInfo[lowIndex + 1].tPow2x[i]); |
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} |
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} |
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} |
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u16 ath9k_hw_get_max_edge_power(u16 freq, struct cal_ctl_edges *pRdEdgesPower, |
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bool is2GHz, int num_band_edges) |
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{ |
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u16 twiceMaxEdgePower = MAX_RATE_POWER; |
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int i; |
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|
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for (i = 0; (i < num_band_edges) && |
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(pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) { |
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if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) { |
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twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl); |
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break; |
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} else if ((i > 0) && |
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(freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, |
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is2GHz))) { |
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if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel, |
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is2GHz) < freq && |
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CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) { |
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twiceMaxEdgePower = |
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CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl); |
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} |
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break; |
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} |
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} |
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return twiceMaxEdgePower; |
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} |
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u16 ath9k_hw_get_scaled_power(struct ath_hw *ah, u16 power_limit, |
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u8 antenna_reduction) |
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{ |
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u16 reduction = antenna_reduction; |
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|
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/* |
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* Reduce scaled Power by number of chains active |
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* to get the per chain tx power level. |
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*/ |
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switch (ar5416_get_ntxchains(ah->txchainmask)) { |
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case 1: |
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break; |
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case 2: |
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reduction += POWER_CORRECTION_FOR_TWO_CHAIN; |
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break; |
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case 3: |
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reduction += POWER_CORRECTION_FOR_THREE_CHAIN; |
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break; |
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} |
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if (power_limit > reduction) |
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power_limit -= reduction; |
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else |
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power_limit = 0; |
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return min_t(u16, power_limit, MAX_RATE_POWER); |
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} |
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void ath9k_hw_update_regulatory_maxpower(struct ath_hw *ah) |
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{ |
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struct ath_common *common = ath9k_hw_common(ah); |
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struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); |
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|
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switch (ar5416_get_ntxchains(ah->txchainmask)) { |
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case 1: |
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break; |
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case 2: |
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regulatory->max_power_level += POWER_CORRECTION_FOR_TWO_CHAIN; |
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break; |
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case 3: |
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regulatory->max_power_level += POWER_CORRECTION_FOR_THREE_CHAIN; |
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break; |
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default: |
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ath_dbg(common, EEPROM, "Invalid chainmask configuration\n"); |
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break; |
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} |
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} |
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void ath9k_hw_get_gain_boundaries_pdadcs(struct ath_hw *ah, |
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struct ath9k_channel *chan, |
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void *pRawDataSet, |
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u8 *bChans, u16 availPiers, |
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u16 tPdGainOverlap, |
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u16 *pPdGainBoundaries, u8 *pPDADCValues, |
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u16 numXpdGains) |
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{ |
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int i, j, k; |
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int16_t ss; |
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u16 idxL = 0, idxR = 0, numPiers; |
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static u8 vpdTableL[AR5416_NUM_PD_GAINS] |
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[AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
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static u8 vpdTableR[AR5416_NUM_PD_GAINS] |
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[AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
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static u8 vpdTableI[AR5416_NUM_PD_GAINS] |
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[AR5416_MAX_PWR_RANGE_IN_HALF_DB]; |
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|
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u8 *pVpdL, *pVpdR, *pPwrL, *pPwrR; |
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u8 minPwrT4[AR5416_NUM_PD_GAINS]; |
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u8 maxPwrT4[AR5416_NUM_PD_GAINS]; |
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int16_t vpdStep; |
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int16_t tmpVal; |
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u16 sizeCurrVpdTable, maxIndex, tgtIndex; |
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bool match; |
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int16_t minDelta = 0; |
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struct chan_centers centers; |
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int pdgain_boundary_default; |
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struct cal_data_per_freq *data_def = pRawDataSet; |
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struct cal_data_per_freq_4k *data_4k = pRawDataSet; |
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struct cal_data_per_freq_ar9287 *data_9287 = pRawDataSet; |
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bool eeprom_4k = AR_SREV_9285(ah) || AR_SREV_9271(ah); |
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int intercepts; |
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|
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if (AR_SREV_9287(ah)) |
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intercepts = AR9287_PD_GAIN_ICEPTS; |
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else |
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intercepts = AR5416_PD_GAIN_ICEPTS; |
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|
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memset(&minPwrT4, 0, AR5416_NUM_PD_GAINS); |
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ath9k_hw_get_channel_centers(ah, chan, ¢ers); |
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|
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for (numPiers = 0; numPiers < availPiers; numPiers++) { |
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if (bChans[numPiers] == AR5416_BCHAN_UNUSED) |
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break; |
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} |
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|
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match = ath9k_hw_get_lower_upper_index((u8)FREQ2FBIN(centers.synth_center, |
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IS_CHAN_2GHZ(chan)), |
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bChans, numPiers, &idxL, &idxR); |
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|
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if (match) { |
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if (AR_SREV_9287(ah)) { |
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for (i = 0; i < numXpdGains; i++) { |
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minPwrT4[i] = data_9287[idxL].pwrPdg[i][0]; |
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maxPwrT4[i] = data_9287[idxL].pwrPdg[i][intercepts - 1]; |
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ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
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data_9287[idxL].pwrPdg[i], |
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data_9287[idxL].vpdPdg[i], |
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intercepts, |
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vpdTableI[i]); |
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} |
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} else if (eeprom_4k) { |
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for (i = 0; i < numXpdGains; i++) { |
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minPwrT4[i] = data_4k[idxL].pwrPdg[i][0]; |
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maxPwrT4[i] = data_4k[idxL].pwrPdg[i][intercepts - 1]; |
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ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
|
data_4k[idxL].pwrPdg[i], |
|
data_4k[idxL].vpdPdg[i], |
|
intercepts, |
|
vpdTableI[i]); |
|
} |
|
} else { |
|
for (i = 0; i < numXpdGains; i++) { |
|
minPwrT4[i] = data_def[idxL].pwrPdg[i][0]; |
|
maxPwrT4[i] = data_def[idxL].pwrPdg[i][intercepts - 1]; |
|
ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
|
data_def[idxL].pwrPdg[i], |
|
data_def[idxL].vpdPdg[i], |
|
intercepts, |
|
vpdTableI[i]); |
|
} |
|
} |
|
} else { |
|
for (i = 0; i < numXpdGains; i++) { |
|
if (AR_SREV_9287(ah)) { |
|
pVpdL = data_9287[idxL].vpdPdg[i]; |
|
pPwrL = data_9287[idxL].pwrPdg[i]; |
|
pVpdR = data_9287[idxR].vpdPdg[i]; |
|
pPwrR = data_9287[idxR].pwrPdg[i]; |
|
} else if (eeprom_4k) { |
|
pVpdL = data_4k[idxL].vpdPdg[i]; |
|
pPwrL = data_4k[idxL].pwrPdg[i]; |
|
pVpdR = data_4k[idxR].vpdPdg[i]; |
|
pPwrR = data_4k[idxR].pwrPdg[i]; |
|
} else { |
|
pVpdL = data_def[idxL].vpdPdg[i]; |
|
pPwrL = data_def[idxL].pwrPdg[i]; |
|
pVpdR = data_def[idxR].vpdPdg[i]; |
|
pPwrR = data_def[idxR].pwrPdg[i]; |
|
} |
|
|
|
minPwrT4[i] = max(pPwrL[0], pPwrR[0]); |
|
|
|
maxPwrT4[i] = |
|
min(pPwrL[intercepts - 1], |
|
pPwrR[intercepts - 1]); |
|
|
|
|
|
ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
|
pPwrL, pVpdL, |
|
intercepts, |
|
vpdTableL[i]); |
|
ath9k_hw_fill_vpd_table(minPwrT4[i], maxPwrT4[i], |
|
pPwrR, pVpdR, |
|
intercepts, |
|
vpdTableR[i]); |
|
|
|
for (j = 0; j <= (maxPwrT4[i] - minPwrT4[i]) / 2; j++) { |
|
vpdTableI[i][j] = |
|
(u8)(ath9k_hw_interpolate((u16) |
|
FREQ2FBIN(centers. |
|
synth_center, |
|
IS_CHAN_2GHZ |
|
(chan)), |
|
bChans[idxL], bChans[idxR], |
|
vpdTableL[i][j], vpdTableR[i][j])); |
|
} |
|
} |
|
} |
|
|
|
k = 0; |
|
|
|
for (i = 0; i < numXpdGains; i++) { |
|
if (i == (numXpdGains - 1)) |
|
pPdGainBoundaries[i] = |
|
(u16)(maxPwrT4[i] / 2); |
|
else |
|
pPdGainBoundaries[i] = |
|
(u16)((maxPwrT4[i] + minPwrT4[i + 1]) / 4); |
|
|
|
pPdGainBoundaries[i] = |
|
min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]); |
|
|
|
minDelta = 0; |
|
|
|
if (i == 0) { |
|
if (AR_SREV_9280_20_OR_LATER(ah)) |
|
ss = (int16_t)(0 - (minPwrT4[i] / 2)); |
|
else |
|
ss = 0; |
|
} else { |
|
ss = (int16_t)((pPdGainBoundaries[i - 1] - |
|
(minPwrT4[i] / 2)) - |
|
tPdGainOverlap + 1 + minDelta); |
|
} |
|
vpdStep = (int16_t)(vpdTableI[i][1] - vpdTableI[i][0]); |
|
vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
|
|
|
while ((ss < 0) && (k < (AR5416_NUM_PDADC_VALUES - 1))) { |
|
tmpVal = (int16_t)(vpdTableI[i][0] + ss * vpdStep); |
|
pPDADCValues[k++] = (u8)((tmpVal < 0) ? 0 : tmpVal); |
|
ss++; |
|
} |
|
|
|
sizeCurrVpdTable = (u8) ((maxPwrT4[i] - minPwrT4[i]) / 2 + 1); |
|
tgtIndex = (u8)(pPdGainBoundaries[i] + tPdGainOverlap - |
|
(minPwrT4[i] / 2)); |
|
maxIndex = (tgtIndex < sizeCurrVpdTable) ? |
|
tgtIndex : sizeCurrVpdTable; |
|
|
|
while ((ss < maxIndex) && (k < (AR5416_NUM_PDADC_VALUES - 1))) { |
|
pPDADCValues[k++] = vpdTableI[i][ss++]; |
|
} |
|
|
|
vpdStep = (int16_t)(vpdTableI[i][sizeCurrVpdTable - 1] - |
|
vpdTableI[i][sizeCurrVpdTable - 2]); |
|
vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); |
|
|
|
if (tgtIndex >= maxIndex) { |
|
while ((ss <= tgtIndex) && |
|
(k < (AR5416_NUM_PDADC_VALUES - 1))) { |
|
tmpVal = (int16_t)((vpdTableI[i][sizeCurrVpdTable - 1] + |
|
(ss - maxIndex + 1) * vpdStep)); |
|
pPDADCValues[k++] = (u8)((tmpVal > 255) ? |
|
255 : tmpVal); |
|
ss++; |
|
} |
|
} |
|
} |
|
|
|
if (eeprom_4k) |
|
pdgain_boundary_default = 58; |
|
else |
|
pdgain_boundary_default = pPdGainBoundaries[i - 1]; |
|
|
|
while (i < AR5416_PD_GAINS_IN_MASK) { |
|
pPdGainBoundaries[i] = pdgain_boundary_default; |
|
i++; |
|
} |
|
|
|
while (k < AR5416_NUM_PDADC_VALUES) { |
|
pPDADCValues[k] = pPDADCValues[k - 1]; |
|
k++; |
|
} |
|
} |
|
|
|
int ath9k_hw_eeprom_init(struct ath_hw *ah) |
|
{ |
|
int status; |
|
|
|
if (AR_SREV_9300_20_OR_LATER(ah)) |
|
ah->eep_ops = &eep_ar9300_ops; |
|
else if (AR_SREV_9287(ah)) { |
|
ah->eep_ops = &eep_ar9287_ops; |
|
} else if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) { |
|
ah->eep_ops = &eep_4k_ops; |
|
} else { |
|
ah->eep_ops = &eep_def_ops; |
|
} |
|
|
|
if (!ah->eep_ops->fill_eeprom(ah)) |
|
return -EIO; |
|
|
|
status = ah->eep_ops->check_eeprom(ah); |
|
|
|
return status; |
|
}
|
|
|