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1297 lines
37 KiB
1297 lines
37 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device. |
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* |
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* This is a new flat driver which is based on the original emac_lite |
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* driver from John Williams <[email protected]>. |
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* |
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* 2007 - 2013 (c) Xilinx, Inc. |
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*/ |
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#include <linux/module.h> |
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#include <linux/uaccess.h> |
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#include <linux/netdevice.h> |
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#include <linux/etherdevice.h> |
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#include <linux/skbuff.h> |
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#include <linux/ethtool.h> |
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#include <linux/io.h> |
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#include <linux/slab.h> |
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#include <linux/of_address.h> |
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#include <linux/of_device.h> |
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#include <linux/of_platform.h> |
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#include <linux/of_mdio.h> |
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#include <linux/of_net.h> |
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#include <linux/phy.h> |
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#include <linux/interrupt.h> |
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#include <linux/iopoll.h> |
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|
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#define DRIVER_NAME "xilinx_emaclite" |
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/* Register offsets for the EmacLite Core */ |
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#define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */ |
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#define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */ |
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#define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */ |
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#define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */ |
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#define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */ |
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#define XEL_GIER_OFFSET 0x07F8 /* GIE Register */ |
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#define XEL_TSR_OFFSET 0x07FC /* Tx status */ |
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#define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ |
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#define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ |
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#define XEL_RPLR_OFFSET 0x100C /* Rx packet length */ |
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#define XEL_RSR_OFFSET 0x17FC /* Rx status */ |
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#define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */ |
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/* MDIO Address Register Bit Masks */ |
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#define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */ |
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#define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */ |
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#define XEL_MDIOADDR_PHYADR_SHIFT 5 |
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#define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */ |
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/* MDIO Write Data Register Bit Masks */ |
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#define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */ |
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/* MDIO Read Data Register Bit Masks */ |
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#define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */ |
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|
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/* MDIO Control Register Bit Masks */ |
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#define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */ |
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#define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */ |
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/* Global Interrupt Enable Register (GIER) Bit Masks */ |
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#define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */ |
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/* Transmit Status Register (TSR) Bit Masks */ |
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#define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */ |
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#define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */ |
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#define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */ |
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#define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit |
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* only. This is not documented |
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* in the HW spec |
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*/ |
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/* Define for programming the MAC address into the EmacLite */ |
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#define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) |
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/* Receive Status Register (RSR) */ |
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#define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */ |
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#define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */ |
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/* Transmit Packet Length Register (TPLR) */ |
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#define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */ |
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/* Receive Packet Length Register (RPLR) */ |
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#define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */ |
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#define XEL_HEADER_OFFSET 12 /* Offset to length field */ |
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#define XEL_HEADER_SHIFT 16 /* Shift value for length */ |
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/* General Ethernet Definitions */ |
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#define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */ |
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#define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */ |
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#define TX_TIMEOUT (60 * HZ) /* Tx timeout is 60 seconds. */ |
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#define ALIGNMENT 4 |
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/* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */ |
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#define BUFFER_ALIGN(adr) ((ALIGNMENT - ((uintptr_t)adr)) % ALIGNMENT) |
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#ifdef __BIG_ENDIAN |
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#define xemaclite_readl ioread32be |
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#define xemaclite_writel iowrite32be |
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#else |
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#define xemaclite_readl ioread32 |
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#define xemaclite_writel iowrite32 |
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#endif |
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/** |
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* struct net_local - Our private per device data |
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* @ndev: instance of the network device |
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* @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW |
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* @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW |
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* @next_tx_buf_to_use: next Tx buffer to write to |
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* @next_rx_buf_to_use: next Rx buffer to read from |
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* @base_addr: base address of the Emaclite device |
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* @reset_lock: lock used for synchronization |
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* @deferred_skb: holds an skb (for transmission at a later time) when the |
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* Tx buffer is not free |
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* @phy_dev: pointer to the PHY device |
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* @phy_node: pointer to the PHY device node |
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* @mii_bus: pointer to the MII bus |
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* @last_link: last link status |
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*/ |
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struct net_local { |
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struct net_device *ndev; |
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bool tx_ping_pong; |
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bool rx_ping_pong; |
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u32 next_tx_buf_to_use; |
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u32 next_rx_buf_to_use; |
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void __iomem *base_addr; |
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spinlock_t reset_lock; |
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struct sk_buff *deferred_skb; |
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struct phy_device *phy_dev; |
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struct device_node *phy_node; |
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struct mii_bus *mii_bus; |
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int last_link; |
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}; |
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/*************************/ |
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/* EmacLite driver calls */ |
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/*************************/ |
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/** |
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* xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device |
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* @drvdata: Pointer to the Emaclite device private data |
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* |
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* This function enables the Tx and Rx interrupts for the Emaclite device along |
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* with the Global Interrupt Enable. |
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*/ |
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static void xemaclite_enable_interrupts(struct net_local *drvdata) |
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{ |
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u32 reg_data; |
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/* Enable the Tx interrupts for the first Buffer */ |
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reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); |
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xemaclite_writel(reg_data | XEL_TSR_XMIT_IE_MASK, |
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drvdata->base_addr + XEL_TSR_OFFSET); |
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/* Enable the Rx interrupts for the first buffer */ |
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xemaclite_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET); |
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/* Enable the Global Interrupt Enable */ |
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xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); |
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} |
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/** |
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* xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device |
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* @drvdata: Pointer to the Emaclite device private data |
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* |
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* This function disables the Tx and Rx interrupts for the Emaclite device, |
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* along with the Global Interrupt Enable. |
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*/ |
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static void xemaclite_disable_interrupts(struct net_local *drvdata) |
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{ |
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u32 reg_data; |
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/* Disable the Global Interrupt Enable */ |
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xemaclite_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET); |
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/* Disable the Tx interrupts for the first buffer */ |
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reg_data = xemaclite_readl(drvdata->base_addr + XEL_TSR_OFFSET); |
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xemaclite_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK), |
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drvdata->base_addr + XEL_TSR_OFFSET); |
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/* Disable the Rx interrupts for the first buffer */ |
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reg_data = xemaclite_readl(drvdata->base_addr + XEL_RSR_OFFSET); |
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xemaclite_writel(reg_data & (~XEL_RSR_RECV_IE_MASK), |
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drvdata->base_addr + XEL_RSR_OFFSET); |
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} |
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/** |
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* xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address |
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* @src_ptr: Void pointer to the 16-bit aligned source address |
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* @dest_ptr: Pointer to the 32-bit aligned destination address |
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* @length: Number bytes to write from source to destination |
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* |
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* This function writes data from a 16-bit aligned buffer to a 32-bit aligned |
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* address in the EmacLite device. |
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*/ |
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static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr, |
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unsigned length) |
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{ |
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u32 align_buffer; |
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u32 *to_u32_ptr; |
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u16 *from_u16_ptr, *to_u16_ptr; |
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to_u32_ptr = dest_ptr; |
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from_u16_ptr = src_ptr; |
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align_buffer = 0; |
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for (; length > 3; length -= 4) { |
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to_u16_ptr = (u16 *)&align_buffer; |
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*to_u16_ptr++ = *from_u16_ptr++; |
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*to_u16_ptr++ = *from_u16_ptr++; |
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/* This barrier resolves occasional issues seen around |
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* cases where the data is not properly flushed out |
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* from the processor store buffers to the destination |
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* memory locations. |
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*/ |
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wmb(); |
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/* Output a word */ |
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*to_u32_ptr++ = align_buffer; |
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} |
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if (length) { |
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u8 *from_u8_ptr, *to_u8_ptr; |
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/* Set up to output the remaining data */ |
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align_buffer = 0; |
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to_u8_ptr = (u8 *)&align_buffer; |
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from_u8_ptr = (u8 *)from_u16_ptr; |
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/* Output the remaining data */ |
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for (; length > 0; length--) |
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*to_u8_ptr++ = *from_u8_ptr++; |
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/* This barrier resolves occasional issues seen around |
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* cases where the data is not properly flushed out |
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* from the processor store buffers to the destination |
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* memory locations. |
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*/ |
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wmb(); |
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*to_u32_ptr = align_buffer; |
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} |
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} |
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/** |
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* xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer |
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* @src_ptr: Pointer to the 32-bit aligned source address |
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* @dest_ptr: Pointer to the 16-bit aligned destination address |
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* @length: Number bytes to read from source to destination |
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* |
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* This function reads data from a 32-bit aligned address in the EmacLite device |
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* to a 16-bit aligned buffer. |
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*/ |
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static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr, |
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unsigned length) |
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{ |
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u16 *to_u16_ptr, *from_u16_ptr; |
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u32 *from_u32_ptr; |
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u32 align_buffer; |
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from_u32_ptr = src_ptr; |
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to_u16_ptr = (u16 *)dest_ptr; |
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for (; length > 3; length -= 4) { |
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/* Copy each word into the temporary buffer */ |
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align_buffer = *from_u32_ptr++; |
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from_u16_ptr = (u16 *)&align_buffer; |
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/* Read data from source */ |
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*to_u16_ptr++ = *from_u16_ptr++; |
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*to_u16_ptr++ = *from_u16_ptr++; |
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} |
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if (length) { |
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u8 *to_u8_ptr, *from_u8_ptr; |
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/* Set up to read the remaining data */ |
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to_u8_ptr = (u8 *)to_u16_ptr; |
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align_buffer = *from_u32_ptr++; |
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from_u8_ptr = (u8 *)&align_buffer; |
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/* Read the remaining data */ |
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for (; length > 0; length--) |
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*to_u8_ptr = *from_u8_ptr; |
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} |
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} |
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/** |
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* xemaclite_send_data - Send an Ethernet frame |
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* @drvdata: Pointer to the Emaclite device private data |
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* @data: Pointer to the data to be sent |
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* @byte_count: Total frame size, including header |
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* |
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* This function checks if the Tx buffer of the Emaclite device is free to send |
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* data. If so, it fills the Tx buffer with data for transmission. Otherwise, it |
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* returns an error. |
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* |
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* Return: 0 upon success or -1 if the buffer(s) are full. |
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* |
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* Note: The maximum Tx packet size can not be more than Ethernet header |
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* (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS. |
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*/ |
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static int xemaclite_send_data(struct net_local *drvdata, u8 *data, |
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unsigned int byte_count) |
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{ |
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u32 reg_data; |
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void __iomem *addr; |
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/* Determine the expected Tx buffer address */ |
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addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; |
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/* If the length is too large, truncate it */ |
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if (byte_count > ETH_FRAME_LEN) |
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byte_count = ETH_FRAME_LEN; |
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/* Check if the expected buffer is available */ |
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reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); |
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if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | |
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XEL_TSR_XMIT_ACTIVE_MASK)) == 0) { |
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/* Switch to next buffer if configured */ |
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if (drvdata->tx_ping_pong != 0) |
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drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET; |
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} else if (drvdata->tx_ping_pong != 0) { |
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/* If the expected buffer is full, try the other buffer, |
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* if it is configured in HW |
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*/ |
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addr = (void __iomem __force *)((uintptr_t __force)addr ^ |
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XEL_BUFFER_OFFSET); |
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reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); |
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if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | |
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XEL_TSR_XMIT_ACTIVE_MASK)) != 0) |
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return -1; /* Buffers were full, return failure */ |
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} else |
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return -1; /* Buffer was full, return failure */ |
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/* Write the frame to the buffer */ |
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xemaclite_aligned_write(data, (u32 __force *)addr, byte_count); |
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xemaclite_writel((byte_count & XEL_TPLR_LENGTH_MASK), |
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addr + XEL_TPLR_OFFSET); |
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|
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/* Update the Tx Status Register to indicate that there is a |
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* frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which |
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* is used by the interrupt handler to check whether a frame |
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* has been transmitted |
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*/ |
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reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); |
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reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); |
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xemaclite_writel(reg_data, addr + XEL_TSR_OFFSET); |
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return 0; |
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} |
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/** |
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* xemaclite_recv_data - Receive a frame |
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* @drvdata: Pointer to the Emaclite device private data |
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* @data: Address where the data is to be received |
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* @maxlen: Maximum supported ethernet packet length |
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* |
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* This function is intended to be called from the interrupt context or |
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* with a wrapper which waits for the receive frame to be available. |
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* |
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* Return: Total number of bytes received |
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*/ |
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static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data, int maxlen) |
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{ |
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void __iomem *addr; |
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u16 length, proto_type; |
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u32 reg_data; |
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/* Determine the expected buffer address */ |
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addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use); |
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|
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/* Verify which buffer has valid data */ |
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reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET); |
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if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { |
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if (drvdata->rx_ping_pong != 0) |
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drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET; |
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} else { |
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/* The instance is out of sync, try other buffer if other |
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* buffer is configured, return 0 otherwise. If the instance is |
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* out of sync, do not update the 'next_rx_buf_to_use' since it |
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* will correct on subsequent calls |
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*/ |
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if (drvdata->rx_ping_pong != 0) |
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addr = (void __iomem __force *) |
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((uintptr_t __force)addr ^ |
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XEL_BUFFER_OFFSET); |
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else |
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return 0; /* No data was available */ |
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/* Verify that buffer has valid data */ |
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reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET); |
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if ((reg_data & XEL_RSR_RECV_DONE_MASK) != |
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XEL_RSR_RECV_DONE_MASK) |
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return 0; /* No data was available */ |
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} |
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|
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/* Get the protocol type of the ethernet frame that arrived |
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*/ |
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proto_type = ((ntohl(xemaclite_readl(addr + XEL_HEADER_OFFSET + |
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XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) & |
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XEL_RPLR_LENGTH_MASK); |
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|
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/* Check if received ethernet frame is a raw ethernet frame |
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* or an IP packet or an ARP packet |
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*/ |
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if (proto_type > ETH_DATA_LEN) { |
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|
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if (proto_type == ETH_P_IP) { |
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length = ((ntohl(xemaclite_readl(addr + |
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XEL_HEADER_IP_LENGTH_OFFSET + |
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XEL_RXBUFF_OFFSET)) >> |
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XEL_HEADER_SHIFT) & |
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XEL_RPLR_LENGTH_MASK); |
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length = min_t(u16, length, ETH_DATA_LEN); |
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length += ETH_HLEN + ETH_FCS_LEN; |
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|
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} else if (proto_type == ETH_P_ARP) |
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length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN; |
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else |
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/* Field contains type other than IP or ARP, use max |
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* frame size and let user parse it |
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*/ |
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length = ETH_FRAME_LEN + ETH_FCS_LEN; |
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} else |
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/* Use the length in the frame, plus the header and trailer */ |
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length = proto_type + ETH_HLEN + ETH_FCS_LEN; |
|
|
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if (WARN_ON(length > maxlen)) |
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length = maxlen; |
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|
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/* Read from the EmacLite device */ |
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xemaclite_aligned_read((u32 __force *)(addr + XEL_RXBUFF_OFFSET), |
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data, length); |
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|
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/* Acknowledge the frame */ |
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reg_data = xemaclite_readl(addr + XEL_RSR_OFFSET); |
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reg_data &= ~XEL_RSR_RECV_DONE_MASK; |
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xemaclite_writel(reg_data, addr + XEL_RSR_OFFSET); |
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|
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return length; |
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} |
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|
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/** |
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* xemaclite_update_address - Update the MAC address in the device |
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* @drvdata: Pointer to the Emaclite device private data |
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* @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value) |
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* |
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* Tx must be idle and Rx should be idle for deterministic results. |
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* It is recommended that this function should be called after the |
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* initialization and before transmission of any packets from the device. |
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* The MAC address can be programmed using any of the two transmit |
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* buffers (if configured). |
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*/ |
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static void xemaclite_update_address(struct net_local *drvdata, |
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u8 *address_ptr) |
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{ |
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void __iomem *addr; |
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u32 reg_data; |
|
|
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/* Determine the expected Tx buffer address */ |
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addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; |
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|
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xemaclite_aligned_write(address_ptr, (u32 __force *)addr, ETH_ALEN); |
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|
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xemaclite_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET); |
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|
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/* Update the MAC address in the EmacLite */ |
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reg_data = xemaclite_readl(addr + XEL_TSR_OFFSET); |
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xemaclite_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET); |
|
|
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/* Wait for EmacLite to finish with the MAC address update */ |
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while ((xemaclite_readl(addr + XEL_TSR_OFFSET) & |
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XEL_TSR_PROG_MAC_ADDR) != 0) |
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; |
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} |
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|
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/** |
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* xemaclite_set_mac_address - Set the MAC address for this device |
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* @dev: Pointer to the network device instance |
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* @address: Void pointer to the sockaddr structure |
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* |
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* This function copies the HW address from the sockaddr strucutre to the |
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* net_device structure and updates the address in HW. |
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* |
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* Return: Error if the net device is busy or 0 if the addr is set |
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* successfully |
|
*/ |
|
static int xemaclite_set_mac_address(struct net_device *dev, void *address) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
struct sockaddr *addr = address; |
|
|
|
if (netif_running(dev)) |
|
return -EBUSY; |
|
|
|
memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
|
xemaclite_update_address(lp, dev->dev_addr); |
|
return 0; |
|
} |
|
|
|
/** |
|
* xemaclite_tx_timeout - Callback for Tx Timeout |
|
* @dev: Pointer to the network device |
|
* @txqueue: Unused |
|
* |
|
* This function is called when Tx time out occurs for Emaclite device. |
|
*/ |
|
static void xemaclite_tx_timeout(struct net_device *dev, unsigned int txqueue) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
unsigned long flags; |
|
|
|
dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n", |
|
TX_TIMEOUT * 1000UL / HZ); |
|
|
|
dev->stats.tx_errors++; |
|
|
|
/* Reset the device */ |
|
spin_lock_irqsave(&lp->reset_lock, flags); |
|
|
|
/* Shouldn't really be necessary, but shouldn't hurt */ |
|
netif_stop_queue(dev); |
|
|
|
xemaclite_disable_interrupts(lp); |
|
xemaclite_enable_interrupts(lp); |
|
|
|
if (lp->deferred_skb) { |
|
dev_kfree_skb(lp->deferred_skb); |
|
lp->deferred_skb = NULL; |
|
dev->stats.tx_errors++; |
|
} |
|
|
|
/* To exclude tx timeout */ |
|
netif_trans_update(dev); /* prevent tx timeout */ |
|
|
|
/* We're all ready to go. Start the queue */ |
|
netif_wake_queue(dev); |
|
spin_unlock_irqrestore(&lp->reset_lock, flags); |
|
} |
|
|
|
/**********************/ |
|
/* Interrupt Handlers */ |
|
/**********************/ |
|
|
|
/** |
|
* xemaclite_tx_handler - Interrupt handler for frames sent |
|
* @dev: Pointer to the network device |
|
* |
|
* This function updates the number of packets transmitted and handles the |
|
* deferred skb, if there is one. |
|
*/ |
|
static void xemaclite_tx_handler(struct net_device *dev) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
|
|
dev->stats.tx_packets++; |
|
|
|
if (!lp->deferred_skb) |
|
return; |
|
|
|
if (xemaclite_send_data(lp, (u8 *)lp->deferred_skb->data, |
|
lp->deferred_skb->len)) |
|
return; |
|
|
|
dev->stats.tx_bytes += lp->deferred_skb->len; |
|
dev_consume_skb_irq(lp->deferred_skb); |
|
lp->deferred_skb = NULL; |
|
netif_trans_update(dev); /* prevent tx timeout */ |
|
netif_wake_queue(dev); |
|
} |
|
|
|
/** |
|
* xemaclite_rx_handler- Interrupt handler for frames received |
|
* @dev: Pointer to the network device |
|
* |
|
* This function allocates memory for a socket buffer, fills it with data |
|
* received and hands it over to the TCP/IP stack. |
|
*/ |
|
static void xemaclite_rx_handler(struct net_device *dev) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
struct sk_buff *skb; |
|
unsigned int align; |
|
u32 len; |
|
|
|
len = ETH_FRAME_LEN + ETH_FCS_LEN; |
|
skb = netdev_alloc_skb(dev, len + ALIGNMENT); |
|
if (!skb) { |
|
/* Couldn't get memory. */ |
|
dev->stats.rx_dropped++; |
|
dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n"); |
|
return; |
|
} |
|
|
|
/* A new skb should have the data halfword aligned, but this code is |
|
* here just in case that isn't true. Calculate how many |
|
* bytes we should reserve to get the data to start on a word |
|
* boundary |
|
*/ |
|
align = BUFFER_ALIGN(skb->data); |
|
if (align) |
|
skb_reserve(skb, align); |
|
|
|
skb_reserve(skb, 2); |
|
|
|
len = xemaclite_recv_data(lp, (u8 *)skb->data, len); |
|
|
|
if (!len) { |
|
dev->stats.rx_errors++; |
|
dev_kfree_skb_irq(skb); |
|
return; |
|
} |
|
|
|
skb_put(skb, len); /* Tell the skb how much data we got */ |
|
|
|
skb->protocol = eth_type_trans(skb, dev); |
|
skb_checksum_none_assert(skb); |
|
|
|
dev->stats.rx_packets++; |
|
dev->stats.rx_bytes += len; |
|
|
|
if (!skb_defer_rx_timestamp(skb)) |
|
netif_rx(skb); /* Send the packet upstream */ |
|
} |
|
|
|
/** |
|
* xemaclite_interrupt - Interrupt handler for this driver |
|
* @irq: Irq of the Emaclite device |
|
* @dev_id: Void pointer to the network device instance used as callback |
|
* reference |
|
* |
|
* Return: IRQ_HANDLED |
|
* |
|
* This function handles the Tx and Rx interrupts of the EmacLite device. |
|
*/ |
|
static irqreturn_t xemaclite_interrupt(int irq, void *dev_id) |
|
{ |
|
bool tx_complete = false; |
|
struct net_device *dev = dev_id; |
|
struct net_local *lp = netdev_priv(dev); |
|
void __iomem *base_addr = lp->base_addr; |
|
u32 tx_status; |
|
|
|
/* Check if there is Rx Data available */ |
|
if ((xemaclite_readl(base_addr + XEL_RSR_OFFSET) & |
|
XEL_RSR_RECV_DONE_MASK) || |
|
(xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET) |
|
& XEL_RSR_RECV_DONE_MASK)) |
|
|
|
xemaclite_rx_handler(dev); |
|
|
|
/* Check if the Transmission for the first buffer is completed */ |
|
tx_status = xemaclite_readl(base_addr + XEL_TSR_OFFSET); |
|
if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && |
|
(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { |
|
|
|
tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; |
|
xemaclite_writel(tx_status, base_addr + XEL_TSR_OFFSET); |
|
|
|
tx_complete = true; |
|
} |
|
|
|
/* Check if the Transmission for the second buffer is completed */ |
|
tx_status = xemaclite_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); |
|
if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && |
|
(tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { |
|
|
|
tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; |
|
xemaclite_writel(tx_status, base_addr + XEL_BUFFER_OFFSET + |
|
XEL_TSR_OFFSET); |
|
|
|
tx_complete = true; |
|
} |
|
|
|
/* If there was a Tx interrupt, call the Tx Handler */ |
|
if (tx_complete != 0) |
|
xemaclite_tx_handler(dev); |
|
|
|
return IRQ_HANDLED; |
|
} |
|
|
|
/**********************/ |
|
/* MDIO Bus functions */ |
|
/**********************/ |
|
|
|
/** |
|
* xemaclite_mdio_wait - Wait for the MDIO to be ready to use |
|
* @lp: Pointer to the Emaclite device private data |
|
* |
|
* This function waits till the device is ready to accept a new MDIO |
|
* request. |
|
* |
|
* Return: 0 for success or ETIMEDOUT for a timeout |
|
*/ |
|
|
|
static int xemaclite_mdio_wait(struct net_local *lp) |
|
{ |
|
u32 val; |
|
|
|
/* wait for the MDIO interface to not be busy or timeout |
|
* after some time. |
|
*/ |
|
return readx_poll_timeout(xemaclite_readl, |
|
lp->base_addr + XEL_MDIOCTRL_OFFSET, |
|
val, !(val & XEL_MDIOCTRL_MDIOSTS_MASK), |
|
1000, 20000); |
|
} |
|
|
|
/** |
|
* xemaclite_mdio_read - Read from a given MII management register |
|
* @bus: the mii_bus struct |
|
* @phy_id: the phy address |
|
* @reg: register number to read from |
|
* |
|
* This function waits till the device is ready to accept a new MDIO |
|
* request and then writes the phy address to the MDIO Address register |
|
* and reads data from MDIO Read Data register, when its available. |
|
* |
|
* Return: Value read from the MII management register |
|
*/ |
|
static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg) |
|
{ |
|
struct net_local *lp = bus->priv; |
|
u32 ctrl_reg; |
|
u32 rc; |
|
|
|
if (xemaclite_mdio_wait(lp)) |
|
return -ETIMEDOUT; |
|
|
|
/* Write the PHY address, register number and set the OP bit in the |
|
* MDIO Address register. Set the Status bit in the MDIO Control |
|
* register to start a MDIO read transaction. |
|
*/ |
|
ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET); |
|
xemaclite_writel(XEL_MDIOADDR_OP_MASK | |
|
((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg), |
|
lp->base_addr + XEL_MDIOADDR_OFFSET); |
|
xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, |
|
lp->base_addr + XEL_MDIOCTRL_OFFSET); |
|
|
|
if (xemaclite_mdio_wait(lp)) |
|
return -ETIMEDOUT; |
|
|
|
rc = xemaclite_readl(lp->base_addr + XEL_MDIORD_OFFSET); |
|
|
|
dev_dbg(&lp->ndev->dev, |
|
"%s(phy_id=%i, reg=%x) == %x\n", __func__, |
|
phy_id, reg, rc); |
|
|
|
return rc; |
|
} |
|
|
|
/** |
|
* xemaclite_mdio_write - Write to a given MII management register |
|
* @bus: the mii_bus struct |
|
* @phy_id: the phy address |
|
* @reg: register number to write to |
|
* @val: value to write to the register number specified by reg |
|
* |
|
* This function waits till the device is ready to accept a new MDIO |
|
* request and then writes the val to the MDIO Write Data register. |
|
* |
|
* Return: 0 upon success or a negative error upon failure |
|
*/ |
|
static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg, |
|
u16 val) |
|
{ |
|
struct net_local *lp = bus->priv; |
|
u32 ctrl_reg; |
|
|
|
dev_dbg(&lp->ndev->dev, |
|
"%s(phy_id=%i, reg=%x, val=%x)\n", __func__, |
|
phy_id, reg, val); |
|
|
|
if (xemaclite_mdio_wait(lp)) |
|
return -ETIMEDOUT; |
|
|
|
/* Write the PHY address, register number and clear the OP bit in the |
|
* MDIO Address register and then write the value into the MDIO Write |
|
* Data register. Finally, set the Status bit in the MDIO Control |
|
* register to start a MDIO write transaction. |
|
*/ |
|
ctrl_reg = xemaclite_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET); |
|
xemaclite_writel(~XEL_MDIOADDR_OP_MASK & |
|
((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg), |
|
lp->base_addr + XEL_MDIOADDR_OFFSET); |
|
xemaclite_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET); |
|
xemaclite_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, |
|
lp->base_addr + XEL_MDIOCTRL_OFFSET); |
|
|
|
return 0; |
|
} |
|
|
|
/** |
|
* xemaclite_mdio_setup - Register mii_bus for the Emaclite device |
|
* @lp: Pointer to the Emaclite device private data |
|
* @dev: Pointer to OF device structure |
|
* |
|
* This function enables MDIO bus in the Emaclite device and registers a |
|
* mii_bus. |
|
* |
|
* Return: 0 upon success or a negative error upon failure |
|
*/ |
|
static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) |
|
{ |
|
struct mii_bus *bus; |
|
int rc; |
|
struct resource res; |
|
struct device_node *np = of_get_parent(lp->phy_node); |
|
struct device_node *npp; |
|
|
|
/* Don't register the MDIO bus if the phy_node or its parent node |
|
* can't be found. |
|
*/ |
|
if (!np) { |
|
dev_err(dev, "Failed to register mdio bus.\n"); |
|
return -ENODEV; |
|
} |
|
npp = of_get_parent(np); |
|
|
|
of_address_to_resource(npp, 0, &res); |
|
if (lp->ndev->mem_start != res.start) { |
|
struct phy_device *phydev; |
|
phydev = of_phy_find_device(lp->phy_node); |
|
if (!phydev) |
|
dev_info(dev, |
|
"MDIO of the phy is not registered yet\n"); |
|
else |
|
put_device(&phydev->mdio.dev); |
|
return 0; |
|
} |
|
|
|
/* Enable the MDIO bus by asserting the enable bit in MDIO Control |
|
* register. |
|
*/ |
|
xemaclite_writel(XEL_MDIOCTRL_MDIOEN_MASK, |
|
lp->base_addr + XEL_MDIOCTRL_OFFSET); |
|
|
|
bus = mdiobus_alloc(); |
|
if (!bus) { |
|
dev_err(dev, "Failed to allocate mdiobus\n"); |
|
return -ENOMEM; |
|
} |
|
|
|
snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx", |
|
(unsigned long long)res.start); |
|
bus->priv = lp; |
|
bus->name = "Xilinx Emaclite MDIO"; |
|
bus->read = xemaclite_mdio_read; |
|
bus->write = xemaclite_mdio_write; |
|
bus->parent = dev; |
|
|
|
rc = of_mdiobus_register(bus, np); |
|
if (rc) { |
|
dev_err(dev, "Failed to register mdio bus.\n"); |
|
goto err_register; |
|
} |
|
|
|
lp->mii_bus = bus; |
|
|
|
return 0; |
|
|
|
err_register: |
|
mdiobus_free(bus); |
|
return rc; |
|
} |
|
|
|
/** |
|
* xemaclite_adjust_link - Link state callback for the Emaclite device |
|
* @ndev: pointer to net_device struct |
|
* |
|
* There's nothing in the Emaclite device to be configured when the link |
|
* state changes. We just print the status. |
|
*/ |
|
static void xemaclite_adjust_link(struct net_device *ndev) |
|
{ |
|
struct net_local *lp = netdev_priv(ndev); |
|
struct phy_device *phy = lp->phy_dev; |
|
int link_state; |
|
|
|
/* hash together the state values to decide if something has changed */ |
|
link_state = phy->speed | (phy->duplex << 1) | phy->link; |
|
|
|
if (lp->last_link != link_state) { |
|
lp->last_link = link_state; |
|
phy_print_status(phy); |
|
} |
|
} |
|
|
|
/** |
|
* xemaclite_open - Open the network device |
|
* @dev: Pointer to the network device |
|
* |
|
* This function sets the MAC address, requests an IRQ and enables interrupts |
|
* for the Emaclite device and starts the Tx queue. |
|
* It also connects to the phy device, if MDIO is included in Emaclite device. |
|
* |
|
* Return: 0 on success. -ENODEV, if PHY cannot be connected. |
|
* Non-zero error value on failure. |
|
*/ |
|
static int xemaclite_open(struct net_device *dev) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
int retval; |
|
|
|
/* Just to be safe, stop the device first */ |
|
xemaclite_disable_interrupts(lp); |
|
|
|
if (lp->phy_node) { |
|
u32 bmcr; |
|
|
|
lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node, |
|
xemaclite_adjust_link, 0, |
|
PHY_INTERFACE_MODE_MII); |
|
if (!lp->phy_dev) { |
|
dev_err(&lp->ndev->dev, "of_phy_connect() failed\n"); |
|
return -ENODEV; |
|
} |
|
|
|
/* EmacLite doesn't support giga-bit speeds */ |
|
phy_set_max_speed(lp->phy_dev, SPEED_100); |
|
|
|
/* Don't advertise 1000BASE-T Full/Half duplex speeds */ |
|
phy_write(lp->phy_dev, MII_CTRL1000, 0); |
|
|
|
/* Advertise only 10 and 100mbps full/half duplex speeds */ |
|
phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL | |
|
ADVERTISE_CSMA); |
|
|
|
/* Restart auto negotiation */ |
|
bmcr = phy_read(lp->phy_dev, MII_BMCR); |
|
bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); |
|
phy_write(lp->phy_dev, MII_BMCR, bmcr); |
|
|
|
phy_start(lp->phy_dev); |
|
} |
|
|
|
/* Set the MAC address each time opened */ |
|
xemaclite_update_address(lp, dev->dev_addr); |
|
|
|
/* Grab the IRQ */ |
|
retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev); |
|
if (retval) { |
|
dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n", |
|
dev->irq); |
|
if (lp->phy_dev) |
|
phy_disconnect(lp->phy_dev); |
|
lp->phy_dev = NULL; |
|
|
|
return retval; |
|
} |
|
|
|
/* Enable Interrupts */ |
|
xemaclite_enable_interrupts(lp); |
|
|
|
/* We're ready to go */ |
|
netif_start_queue(dev); |
|
|
|
return 0; |
|
} |
|
|
|
/** |
|
* xemaclite_close - Close the network device |
|
* @dev: Pointer to the network device |
|
* |
|
* This function stops the Tx queue, disables interrupts and frees the IRQ for |
|
* the Emaclite device. |
|
* It also disconnects the phy device associated with the Emaclite device. |
|
* |
|
* Return: 0, always. |
|
*/ |
|
static int xemaclite_close(struct net_device *dev) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
|
|
netif_stop_queue(dev); |
|
xemaclite_disable_interrupts(lp); |
|
free_irq(dev->irq, dev); |
|
|
|
if (lp->phy_dev) |
|
phy_disconnect(lp->phy_dev); |
|
lp->phy_dev = NULL; |
|
|
|
return 0; |
|
} |
|
|
|
/** |
|
* xemaclite_send - Transmit a frame |
|
* @orig_skb: Pointer to the socket buffer to be transmitted |
|
* @dev: Pointer to the network device |
|
* |
|
* This function checks if the Tx buffer of the Emaclite device is free to send |
|
* data. If so, it fills the Tx buffer with data from socket buffer data, |
|
* updates the stats and frees the socket buffer. The Tx completion is signaled |
|
* by an interrupt. If the Tx buffer isn't free, then the socket buffer is |
|
* deferred and the Tx queue is stopped so that the deferred socket buffer can |
|
* be transmitted when the Emaclite device is free to transmit data. |
|
* |
|
* Return: NETDEV_TX_OK, always. |
|
*/ |
|
static netdev_tx_t |
|
xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev) |
|
{ |
|
struct net_local *lp = netdev_priv(dev); |
|
struct sk_buff *new_skb; |
|
unsigned int len; |
|
unsigned long flags; |
|
|
|
len = orig_skb->len; |
|
|
|
new_skb = orig_skb; |
|
|
|
spin_lock_irqsave(&lp->reset_lock, flags); |
|
if (xemaclite_send_data(lp, (u8 *)new_skb->data, len) != 0) { |
|
/* If the Emaclite Tx buffer is busy, stop the Tx queue and |
|
* defer the skb for transmission during the ISR, after the |
|
* current transmission is complete |
|
*/ |
|
netif_stop_queue(dev); |
|
lp->deferred_skb = new_skb; |
|
/* Take the time stamp now, since we can't do this in an ISR. */ |
|
skb_tx_timestamp(new_skb); |
|
spin_unlock_irqrestore(&lp->reset_lock, flags); |
|
return NETDEV_TX_OK; |
|
} |
|
spin_unlock_irqrestore(&lp->reset_lock, flags); |
|
|
|
skb_tx_timestamp(new_skb); |
|
|
|
dev->stats.tx_bytes += len; |
|
dev_consume_skb_any(new_skb); |
|
|
|
return NETDEV_TX_OK; |
|
} |
|
|
|
/** |
|
* get_bool - Get a parameter from the OF device |
|
* @ofdev: Pointer to OF device structure |
|
* @s: Property to be retrieved |
|
* |
|
* This function looks for a property in the device node and returns the value |
|
* of the property if its found or 0 if the property is not found. |
|
* |
|
* Return: Value of the parameter if the parameter is found, or 0 otherwise |
|
*/ |
|
static bool get_bool(struct platform_device *ofdev, const char *s) |
|
{ |
|
u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL); |
|
|
|
if (!p) { |
|
dev_warn(&ofdev->dev, "Parameter %s not found, defaulting to false\n", s); |
|
return false; |
|
} |
|
|
|
return (bool)*p; |
|
} |
|
|
|
/** |
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* xemaclite_ethtools_get_drvinfo - Get various Axi Emac Lite driver info |
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* @ndev: Pointer to net_device structure |
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* @ed: Pointer to ethtool_drvinfo structure |
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* |
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* This implements ethtool command for getting the driver information. |
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* Issue "ethtool -i ethX" under linux prompt to execute this function. |
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*/ |
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static void xemaclite_ethtools_get_drvinfo(struct net_device *ndev, |
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struct ethtool_drvinfo *ed) |
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{ |
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strlcpy(ed->driver, DRIVER_NAME, sizeof(ed->driver)); |
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} |
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|
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static const struct ethtool_ops xemaclite_ethtool_ops = { |
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.get_drvinfo = xemaclite_ethtools_get_drvinfo, |
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.get_link = ethtool_op_get_link, |
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.get_link_ksettings = phy_ethtool_get_link_ksettings, |
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.set_link_ksettings = phy_ethtool_set_link_ksettings, |
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}; |
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static const struct net_device_ops xemaclite_netdev_ops; |
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|
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/** |
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* xemaclite_of_probe - Probe method for the Emaclite device. |
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* @ofdev: Pointer to OF device structure |
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* |
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* This function probes for the Emaclite device in the device tree. |
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* It initializes the driver data structure and the hardware, sets the MAC |
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* address and registers the network device. |
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* It also registers a mii_bus for the Emaclite device, if MDIO is included |
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* in the device. |
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* |
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* Return: 0, if the driver is bound to the Emaclite device, or |
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* a negative error if there is failure. |
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*/ |
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static int xemaclite_of_probe(struct platform_device *ofdev) |
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{ |
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struct resource *res; |
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struct net_device *ndev = NULL; |
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struct net_local *lp = NULL; |
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struct device *dev = &ofdev->dev; |
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int rc = 0; |
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dev_info(dev, "Device Tree Probing\n"); |
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/* Create an ethernet device instance */ |
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ndev = alloc_etherdev(sizeof(struct net_local)); |
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if (!ndev) |
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return -ENOMEM; |
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dev_set_drvdata(dev, ndev); |
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SET_NETDEV_DEV(ndev, &ofdev->dev); |
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lp = netdev_priv(ndev); |
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lp->ndev = ndev; |
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/* Get IRQ for the device */ |
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res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0); |
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if (!res) { |
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dev_err(dev, "no IRQ found\n"); |
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rc = -ENXIO; |
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goto error; |
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} |
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ndev->irq = res->start; |
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res = platform_get_resource(ofdev, IORESOURCE_MEM, 0); |
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lp->base_addr = devm_ioremap_resource(&ofdev->dev, res); |
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if (IS_ERR(lp->base_addr)) { |
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rc = PTR_ERR(lp->base_addr); |
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goto error; |
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} |
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ndev->mem_start = res->start; |
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ndev->mem_end = res->end; |
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spin_lock_init(&lp->reset_lock); |
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lp->next_tx_buf_to_use = 0x0; |
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lp->next_rx_buf_to_use = 0x0; |
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lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong"); |
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lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong"); |
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rc = of_get_mac_address(ofdev->dev.of_node, ndev->dev_addr); |
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if (rc) { |
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dev_warn(dev, "No MAC address found, using random\n"); |
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eth_hw_addr_random(ndev); |
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} |
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/* Clear the Tx CSR's in case this is a restart */ |
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xemaclite_writel(0, lp->base_addr + XEL_TSR_OFFSET); |
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xemaclite_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); |
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/* Set the MAC address in the EmacLite device */ |
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xemaclite_update_address(lp, ndev->dev_addr); |
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lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0); |
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xemaclite_mdio_setup(lp, &ofdev->dev); |
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dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); |
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ndev->netdev_ops = &xemaclite_netdev_ops; |
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ndev->ethtool_ops = &xemaclite_ethtool_ops; |
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ndev->flags &= ~IFF_MULTICAST; |
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ndev->watchdog_timeo = TX_TIMEOUT; |
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/* Finally, register the device */ |
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rc = register_netdev(ndev); |
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if (rc) { |
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dev_err(dev, |
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"Cannot register network device, aborting\n"); |
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goto error; |
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} |
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dev_info(dev, |
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"Xilinx EmacLite at 0x%08lX mapped to 0x%p, irq=%d\n", |
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(unsigned long __force)ndev->mem_start, lp->base_addr, ndev->irq); |
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return 0; |
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error: |
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free_netdev(ndev); |
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return rc; |
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} |
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/** |
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* xemaclite_of_remove - Unbind the driver from the Emaclite device. |
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* @of_dev: Pointer to OF device structure |
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* |
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* This function is called if a device is physically removed from the system or |
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* if the driver module is being unloaded. It frees any resources allocated to |
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* the device. |
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* |
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* Return: 0, always. |
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*/ |
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static int xemaclite_of_remove(struct platform_device *of_dev) |
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{ |
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struct net_device *ndev = platform_get_drvdata(of_dev); |
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struct net_local *lp = netdev_priv(ndev); |
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/* Un-register the mii_bus, if configured */ |
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if (lp->mii_bus) { |
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mdiobus_unregister(lp->mii_bus); |
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mdiobus_free(lp->mii_bus); |
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lp->mii_bus = NULL; |
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} |
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unregister_netdev(ndev); |
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of_node_put(lp->phy_node); |
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lp->phy_node = NULL; |
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|
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free_netdev(ndev); |
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return 0; |
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} |
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#ifdef CONFIG_NET_POLL_CONTROLLER |
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static void |
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xemaclite_poll_controller(struct net_device *ndev) |
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{ |
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disable_irq(ndev->irq); |
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xemaclite_interrupt(ndev->irq, ndev); |
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enable_irq(ndev->irq); |
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} |
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#endif |
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/* Ioctl MII Interface */ |
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static int xemaclite_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
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{ |
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if (!dev->phydev || !netif_running(dev)) |
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return -EINVAL; |
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switch (cmd) { |
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case SIOCGMIIPHY: |
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case SIOCGMIIREG: |
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case SIOCSMIIREG: |
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return phy_mii_ioctl(dev->phydev, rq, cmd); |
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default: |
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return -EOPNOTSUPP; |
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} |
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} |
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static const struct net_device_ops xemaclite_netdev_ops = { |
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.ndo_open = xemaclite_open, |
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.ndo_stop = xemaclite_close, |
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.ndo_start_xmit = xemaclite_send, |
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.ndo_set_mac_address = xemaclite_set_mac_address, |
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.ndo_tx_timeout = xemaclite_tx_timeout, |
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.ndo_do_ioctl = xemaclite_ioctl, |
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#ifdef CONFIG_NET_POLL_CONTROLLER |
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.ndo_poll_controller = xemaclite_poll_controller, |
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#endif |
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}; |
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/* Match table for OF platform binding */ |
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static const struct of_device_id xemaclite_of_match[] = { |
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{ .compatible = "xlnx,opb-ethernetlite-1.01.a", }, |
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{ .compatible = "xlnx,opb-ethernetlite-1.01.b", }, |
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{ .compatible = "xlnx,xps-ethernetlite-1.00.a", }, |
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{ .compatible = "xlnx,xps-ethernetlite-2.00.a", }, |
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{ .compatible = "xlnx,xps-ethernetlite-2.01.a", }, |
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{ .compatible = "xlnx,xps-ethernetlite-3.00.a", }, |
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{ /* end of list */ }, |
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}; |
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MODULE_DEVICE_TABLE(of, xemaclite_of_match); |
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|
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static struct platform_driver xemaclite_of_driver = { |
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.driver = { |
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.name = DRIVER_NAME, |
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.of_match_table = xemaclite_of_match, |
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}, |
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.probe = xemaclite_of_probe, |
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.remove = xemaclite_of_remove, |
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}; |
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|
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module_platform_driver(xemaclite_of_driver); |
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|
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MODULE_AUTHOR("Xilinx, Inc."); |
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MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver"); |
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MODULE_LICENSE("GPL");
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