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518 lines
13 KiB
518 lines
13 KiB
/****************************************************************************** |
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* This software may be used and distributed according to the terms of |
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* the GNU General Public License (GPL), incorporated herein by reference. |
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* Drivers based on or derived from this code fall under the GPL and must |
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* retain the authorship, copyright and license notice. This file is not |
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* a complete program and may only be used when the entire operating |
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* system is licensed under the GPL. |
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* See the file COPYING in this distribution for more information. |
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* |
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* vxge-main.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O |
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* Virtualized Server Adapter. |
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* Copyright(c) 2002-2010 Exar Corp. |
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******************************************************************************/ |
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#ifndef VXGE_MAIN_H |
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#define VXGE_MAIN_H |
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#include "vxge-traffic.h" |
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#include "vxge-config.h" |
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#include "vxge-version.h" |
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#include <linux/list.h> |
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#include <linux/bitops.h> |
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#include <linux/if_vlan.h> |
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#define VXGE_DRIVER_NAME "vxge" |
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#define VXGE_DRIVER_VENDOR "Neterion, Inc" |
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#define VXGE_DRIVER_FW_VERSION_MAJOR 1 |
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#define DRV_VERSION VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\ |
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VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\ |
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VXGE_VERSION_FOR |
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#define PCI_DEVICE_ID_TITAN_WIN 0x5733 |
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#define PCI_DEVICE_ID_TITAN_UNI 0x5833 |
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#define VXGE_HW_TITAN1_PCI_REVISION 1 |
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#define VXGE_HW_TITAN1A_PCI_REVISION 2 |
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#define VXGE_USE_DEFAULT 0xffffffff |
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#define VXGE_HW_VPATH_MSIX_ACTIVE 4 |
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#define VXGE_ALARM_MSIX_ID 2 |
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#define VXGE_HW_RXSYNC_FREQ_CNT 4 |
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#define VXGE_LL_WATCH_DOG_TIMEOUT (15 * HZ) |
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#define VXGE_LL_RX_COPY_THRESHOLD 256 |
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#define VXGE_DEF_FIFO_LENGTH 84 |
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#define NO_STEERING 0 |
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#define PORT_STEERING 0x1 |
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#define RTH_STEERING 0x2 |
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#define RX_TOS_STEERING 0x3 |
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#define RX_VLAN_STEERING 0x4 |
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#define RTH_BUCKET_SIZE 4 |
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#define TX_PRIORITY_STEERING 1 |
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#define TX_VLAN_STEERING 2 |
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#define TX_PORT_STEERING 3 |
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#define TX_MULTIQ_STEERING 4 |
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#define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE |
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#define VXGE_TTI_BTIMER_VAL 250000 |
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#define VXGE_TTI_LTIMER_VAL 1000 |
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#define VXGE_T1A_TTI_LTIMER_VAL 80 |
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#define VXGE_TTI_RTIMER_VAL 0 |
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#define VXGE_TTI_RTIMER_ADAPT_VAL 10 |
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#define VXGE_T1A_TTI_RTIMER_VAL 400 |
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#define VXGE_RTI_BTIMER_VAL 250 |
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#define VXGE_RTI_LTIMER_VAL 100 |
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#define VXGE_RTI_RTIMER_VAL 0 |
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#define VXGE_RTI_RTIMER_ADAPT_VAL 15 |
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#define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH |
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#define VXGE_ISR_POLLING_CNT 8 |
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#define VXGE_MAX_CONFIG_DEV 0xFF |
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#define VXGE_EXEC_MODE_DISABLE 0 |
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#define VXGE_EXEC_MODE_ENABLE 1 |
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#define VXGE_MAX_CONFIG_PORT 1 |
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#define VXGE_ALL_VID_DISABLE 0 |
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#define VXGE_ALL_VID_ENABLE 1 |
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#define VXGE_PAUSE_CTRL_DISABLE 0 |
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#define VXGE_PAUSE_CTRL_ENABLE 1 |
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#define TTI_TX_URANGE_A 5 |
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#define TTI_TX_URANGE_B 15 |
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#define TTI_TX_URANGE_C 40 |
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#define TTI_TX_UFC_A 5 |
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#define TTI_TX_UFC_B 40 |
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#define TTI_TX_UFC_C 60 |
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#define TTI_TX_UFC_D 100 |
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#define TTI_T1A_TX_UFC_A 30 |
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#define TTI_T1A_TX_UFC_B 80 |
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/* Slope - (max_mtu - min_mtu)/(max_mtu_ufc - min_mtu_ufc) */ |
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/* Slope - 93 */ |
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/* 60 - 9k Mtu, 140 - 1.5k mtu */ |
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#define TTI_T1A_TX_UFC_C(mtu) (60 + ((VXGE_HW_MAX_MTU - mtu) / 93)) |
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/* Slope - 37 */ |
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/* 100 - 9k Mtu, 300 - 1.5k mtu */ |
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#define TTI_T1A_TX_UFC_D(mtu) (100 + ((VXGE_HW_MAX_MTU - mtu) / 37)) |
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#define RTI_RX_URANGE_A 5 |
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#define RTI_RX_URANGE_B 15 |
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#define RTI_RX_URANGE_C 40 |
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#define RTI_T1A_RX_URANGE_A 1 |
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#define RTI_T1A_RX_URANGE_B 20 |
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#define RTI_T1A_RX_URANGE_C 50 |
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#define RTI_RX_UFC_A 1 |
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#define RTI_RX_UFC_B 5 |
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#define RTI_RX_UFC_C 10 |
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#define RTI_RX_UFC_D 15 |
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#define RTI_T1A_RX_UFC_B 20 |
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#define RTI_T1A_RX_UFC_C 50 |
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#define RTI_T1A_RX_UFC_D 60 |
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/* |
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* The interrupt rate is maintained at 3k per second with the moderation |
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* parameters for most traffic but not all. This is the maximum interrupt |
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* count allowed per function with INTA or per vector in the case of |
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* MSI-X in a 10 millisecond time period. Enabled only for Titan 1A. |
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*/ |
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#define VXGE_T1A_MAX_INTERRUPT_COUNT 100 |
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#define VXGE_T1A_MAX_TX_INTERRUPT_COUNT 200 |
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/* Milli secs timer period */ |
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#define VXGE_TIMER_DELAY 10000 |
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#define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE) |
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#define is_sriov(function_mode) \ |
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((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \ |
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(function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \ |
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(function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4)) |
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enum vxge_reset_event { |
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/* reset events */ |
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VXGE_LL_VPATH_RESET = 0, |
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VXGE_LL_DEVICE_RESET = 1, |
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VXGE_LL_FULL_RESET = 2, |
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VXGE_LL_START_RESET = 3, |
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VXGE_LL_COMPL_RESET = 4 |
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}; |
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/* These flags represent the devices temporary state */ |
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enum vxge_device_state_t { |
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__VXGE_STATE_RESET_CARD = 0, |
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__VXGE_STATE_CARD_UP |
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}; |
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enum vxge_mac_addr_state { |
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/* mac address states */ |
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VXGE_LL_MAC_ADDR_IN_LIST = 0, |
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VXGE_LL_MAC_ADDR_IN_DA_TABLE = 1 |
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}; |
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struct vxge_drv_config { |
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int config_dev_cnt; |
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int total_dev_cnt; |
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int g_no_cpus; |
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unsigned int vpath_per_dev; |
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}; |
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struct macInfo { |
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unsigned char macaddr[ETH_ALEN]; |
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unsigned char macmask[ETH_ALEN]; |
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unsigned int vpath_no; |
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enum vxge_mac_addr_state state; |
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}; |
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struct vxge_config { |
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int tx_pause_enable; |
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int rx_pause_enable; |
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#define NEW_NAPI_WEIGHT 64 |
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int napi_weight; |
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int intr_type; |
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#define INTA 0 |
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#define MSI 1 |
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#define MSI_X 2 |
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int addr_learn_en; |
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u32 rth_steering:2, |
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rth_algorithm:2, |
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rth_hash_type_tcpipv4:1, |
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rth_hash_type_ipv4:1, |
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rth_hash_type_tcpipv6:1, |
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rth_hash_type_ipv6:1, |
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rth_hash_type_tcpipv6ex:1, |
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rth_hash_type_ipv6ex:1, |
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rth_bkt_sz:8; |
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int rth_jhash_golden_ratio; |
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int tx_steering_type; |
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int fifo_indicate_max_pkts; |
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struct vxge_hw_device_hw_info device_hw_info; |
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}; |
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struct vxge_msix_entry { |
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/* Mimicing the msix_entry struct of Kernel. */ |
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u16 vector; |
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u16 entry; |
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u16 in_use; |
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void *arg; |
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}; |
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/* Software Statistics */ |
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struct vxge_sw_stats { |
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/* Virtual Path */ |
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unsigned long vpaths_open; |
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unsigned long vpath_open_fail; |
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/* Misc. */ |
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unsigned long link_up; |
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unsigned long link_down; |
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}; |
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struct vxge_mac_addrs { |
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struct list_head item; |
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u64 macaddr; |
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u64 macmask; |
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enum vxge_mac_addr_state state; |
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}; |
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struct vxgedev; |
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struct vxge_fifo_stats { |
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struct u64_stats_sync syncp; |
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u64 tx_frms; |
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u64 tx_bytes; |
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unsigned long tx_errors; |
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unsigned long txd_not_free; |
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unsigned long txd_out_of_desc; |
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unsigned long pci_map_fail; |
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}; |
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struct vxge_fifo { |
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struct net_device *ndev; |
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struct pci_dev *pdev; |
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struct __vxge_hw_fifo *handle; |
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struct netdev_queue *txq; |
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int tx_steering_type; |
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int indicate_max_pkts; |
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/* Adaptive interrupt moderation parameters used in T1A */ |
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unsigned long interrupt_count; |
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unsigned long jiffies; |
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u32 tx_vector_no; |
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/* Tx stats */ |
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struct vxge_fifo_stats stats; |
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} ____cacheline_aligned; |
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struct vxge_ring_stats { |
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struct u64_stats_sync syncp; |
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u64 rx_frms; |
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u64 rx_mcast; |
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u64 rx_bytes; |
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unsigned long rx_errors; |
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unsigned long rx_dropped; |
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unsigned long prev_rx_frms; |
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unsigned long pci_map_fail; |
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unsigned long skb_alloc_fail; |
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}; |
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struct vxge_ring { |
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struct net_device *ndev; |
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struct pci_dev *pdev; |
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struct __vxge_hw_ring *handle; |
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/* The vpath id maintained in the driver - |
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* 0 to 'maximum_vpaths_in_function - 1' |
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*/ |
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int driver_id; |
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/* Adaptive interrupt moderation parameters used in T1A */ |
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unsigned long interrupt_count; |
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unsigned long jiffies; |
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/* copy of the flag indicating whether rx_hwts is to be used */ |
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u32 rx_hwts:1; |
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int pkts_processed; |
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int budget; |
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struct napi_struct napi; |
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struct napi_struct *napi_p; |
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#define VXGE_MAX_MAC_ADDR_COUNT 30 |
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int vlan_tag_strip; |
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u32 rx_vector_no; |
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enum vxge_hw_status last_status; |
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/* Rx stats */ |
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struct vxge_ring_stats stats; |
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} ____cacheline_aligned; |
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struct vxge_vpath { |
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struct vxge_fifo fifo; |
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struct vxge_ring ring; |
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struct __vxge_hw_vpath_handle *handle; |
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/* Actual vpath id for this vpath in the device - 0 to 16 */ |
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int device_id; |
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int max_mac_addr_cnt; |
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int is_configured; |
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int is_open; |
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struct vxgedev *vdev; |
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u8 macaddr[ETH_ALEN]; |
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u8 macmask[ETH_ALEN]; |
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#define VXGE_MAX_LEARN_MAC_ADDR_CNT 2048 |
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/* mac addresses currently programmed into NIC */ |
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u16 mac_addr_cnt; |
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u16 mcast_addr_cnt; |
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struct list_head mac_addr_list; |
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u32 level_err; |
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u32 level_trace; |
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}; |
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#define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) { \ |
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for (i = 0; i < vdev->no_of_vpath; i++) { \ |
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vdev->vpaths[i].level_err = err; \ |
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vdev->vpaths[i].level_trace = trace; \ |
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} \ |
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vdev->level_err = err; \ |
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vdev->level_trace = trace; \ |
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} |
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struct vxgedev { |
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struct net_device *ndev; |
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struct pci_dev *pdev; |
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struct __vxge_hw_device *devh; |
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unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
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int vlan_tag_strip; |
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struct vxge_config config; |
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unsigned long state; |
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/* Indicates which vpath to reset */ |
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unsigned long vp_reset; |
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/* Timer used for polling vpath resets */ |
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struct timer_list vp_reset_timer; |
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/* Timer used for polling vpath lockup */ |
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struct timer_list vp_lockup_timer; |
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/* |
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* Flags to track whether device is in All Multicast |
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* or in promiscuous mode. |
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*/ |
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u16 all_multi_flg; |
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/* A flag indicating whether rx_hwts is to be used or not. */ |
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u32 rx_hwts:1, |
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titan1:1; |
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struct vxge_msix_entry *vxge_entries; |
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struct msix_entry *entries; |
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/* |
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* 4 for each vpath * 17; |
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* total is 68 |
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*/ |
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#define VXGE_MAX_REQUESTED_MSIX 68 |
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#define VXGE_INTR_STRLEN 80 |
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char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN]; |
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enum vxge_hw_event cric_err_event; |
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int max_vpath_supported; |
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int no_of_vpath; |
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struct napi_struct napi; |
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/* A debug option, when enabled and if error condition occurs, |
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* the driver will do following steps: |
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* - mask all interrupts |
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* - Not clear the source of the alarm |
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* - gracefully stop all I/O |
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* A diagnostic dump of register and stats at this point |
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* reveals very useful information. |
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*/ |
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int exec_mode; |
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int max_config_port; |
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struct vxge_vpath *vpaths; |
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struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS]; |
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void __iomem *bar0; |
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struct vxge_sw_stats stats; |
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int mtu; |
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/* Below variables are used for vpath selection to transmit a packet */ |
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u8 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS]; |
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u64 vpaths_deployed; |
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u32 intr_cnt; |
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u32 level_err; |
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u32 level_trace; |
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char fw_version[VXGE_HW_FW_STRLEN]; |
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struct work_struct reset_task; |
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}; |
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struct vxge_rx_priv { |
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struct sk_buff *skb; |
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unsigned char *skb_data; |
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dma_addr_t data_dma; |
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dma_addr_t data_size; |
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}; |
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struct vxge_tx_priv { |
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struct sk_buff *skb; |
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dma_addr_t dma_buffers[MAX_SKB_FRAGS+1]; |
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}; |
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#define VXGE_MODULE_PARAM_INT(p, val) \ |
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static int p = val; \ |
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module_param(p, int, 0) |
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static inline |
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void vxge_os_timer(struct timer_list *timer, void (*func)(struct timer_list *), |
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unsigned long timeout) |
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{ |
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timer_setup(timer, func, 0); |
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mod_timer(timer, jiffies + timeout); |
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} |
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void vxge_initialize_ethtool_ops(struct net_device *ndev); |
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int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override); |
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/* #define VXGE_DEBUG_INIT: debug for initialization functions |
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* #define VXGE_DEBUG_TX : debug transmit related functions |
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* #define VXGE_DEBUG_RX : debug recevice related functions |
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* #define VXGE_DEBUG_MEM : debug memory module |
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* #define VXGE_DEBUG_LOCK: debug locks |
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* #define VXGE_DEBUG_SEM : debug semaphore |
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* #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements |
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*/ |
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#define VXGE_DEBUG_INIT 0x00000001 |
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#define VXGE_DEBUG_TX 0x00000002 |
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#define VXGE_DEBUG_RX 0x00000004 |
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#define VXGE_DEBUG_MEM 0x00000008 |
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#define VXGE_DEBUG_LOCK 0x00000010 |
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#define VXGE_DEBUG_SEM 0x00000020 |
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#define VXGE_DEBUG_ENTRYEXIT 0x00000040 |
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#define VXGE_DEBUG_INTR 0x00000080 |
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#define VXGE_DEBUG_LL_CONFIG 0x00000100 |
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/* Debug tracing for VXGE driver */ |
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#ifndef VXGE_DEBUG_MASK |
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#define VXGE_DEBUG_MASK 0x0 |
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#endif |
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#if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK) |
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#define vxge_debug_ll_config(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_ll_config(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK) |
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#define vxge_debug_init(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_init(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK) |
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#define vxge_debug_tx(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_tx(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK) |
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#define vxge_debug_rx(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_rx(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK) |
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#define vxge_debug_mem(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_mem(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK) |
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#define vxge_debug_entryexit(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_entryexit(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK) |
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#define vxge_debug_intr(level, fmt, ...) \ |
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vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, ##__VA_ARGS__) |
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#else |
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#define vxge_debug_intr(level, fmt, ...) no_printk(fmt, ##__VA_ARGS__) |
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#endif |
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#define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\ |
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vxge_hw_device_debug_set((struct __vxge_hw_device *)vdev->devh, \ |
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level, mask);\ |
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VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \ |
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vxge_hw_device_error_level_get((struct __vxge_hw_device *) \ |
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vdev->devh), \ |
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vxge_hw_device_trace_level_get((struct __vxge_hw_device *) \ |
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vdev->devh));\ |
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} |
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#ifdef NETIF_F_GSO |
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#define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size) |
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#define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size) |
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#define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type) |
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#endif |
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#endif
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