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136 lines
3.9 KiB
136 lines
3.9 KiB
/* SPDX-License-Identifier: GPL-2.0 */ |
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/* Copyright(c) 2013 - 2018 Intel Corporation. */ |
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#ifndef _I40E_ADMINQ_H_ |
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#define _I40E_ADMINQ_H_ |
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#include "i40e_osdep.h" |
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#include "i40e_status.h" |
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#include "i40e_adminq_cmd.h" |
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#define I40E_ADMINQ_DESC(R, i) \ |
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(&(((struct i40e_aq_desc *)((R).desc_buf.va))[i])) |
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#define I40E_ADMINQ_DESC_ALIGNMENT 4096 |
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struct i40e_adminq_ring { |
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struct i40e_virt_mem dma_head; /* space for dma structures */ |
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struct i40e_dma_mem desc_buf; /* descriptor ring memory */ |
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struct i40e_virt_mem cmd_buf; /* command buffer memory */ |
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union { |
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struct i40e_dma_mem *asq_bi; |
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struct i40e_dma_mem *arq_bi; |
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} r; |
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u16 count; /* Number of descriptors */ |
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u16 rx_buf_len; /* Admin Receive Queue buffer length */ |
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/* used for interrupt processing */ |
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u16 next_to_use; |
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u16 next_to_clean; |
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/* used for queue tracking */ |
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u32 head; |
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u32 tail; |
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u32 len; |
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u32 bah; |
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u32 bal; |
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}; |
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/* ASQ transaction details */ |
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struct i40e_asq_cmd_details { |
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void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ |
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u64 cookie; |
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u16 flags_ena; |
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u16 flags_dis; |
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bool async; |
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bool postpone; |
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struct i40e_aq_desc *wb_desc; |
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}; |
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#define I40E_ADMINQ_DETAILS(R, i) \ |
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(&(((struct i40e_asq_cmd_details *)((R).cmd_buf.va))[i])) |
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/* ARQ event information */ |
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struct i40e_arq_event_info { |
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struct i40e_aq_desc desc; |
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u16 msg_len; |
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u16 buf_len; |
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u8 *msg_buf; |
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}; |
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/* Admin Queue information */ |
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struct i40e_adminq_info { |
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struct i40e_adminq_ring arq; /* receive queue */ |
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struct i40e_adminq_ring asq; /* send queue */ |
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u32 asq_cmd_timeout; /* send queue cmd write back timeout*/ |
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u16 num_arq_entries; /* receive queue depth */ |
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u16 num_asq_entries; /* send queue depth */ |
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u16 arq_buf_size; /* receive queue buffer size */ |
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u16 asq_buf_size; /* send queue buffer size */ |
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u16 fw_maj_ver; /* firmware major version */ |
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u16 fw_min_ver; /* firmware minor version */ |
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u32 fw_build; /* firmware build number */ |
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u16 api_maj_ver; /* api major version */ |
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u16 api_min_ver; /* api minor version */ |
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struct mutex asq_mutex; /* Send queue lock */ |
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struct mutex arq_mutex; /* Receive queue lock */ |
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/* last status values on send and receive queues */ |
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enum i40e_admin_queue_err asq_last_status; |
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enum i40e_admin_queue_err arq_last_status; |
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}; |
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/** |
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* i40e_aq_rc_to_posix - convert errors to user-land codes |
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* @aq_ret: AdminQ handler error code can override aq_rc |
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* @aq_rc: AdminQ firmware error code to convert |
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**/ |
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static inline int i40e_aq_rc_to_posix(int aq_ret, int aq_rc) |
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{ |
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int aq_to_posix[] = { |
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0, /* I40E_AQ_RC_OK */ |
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-EPERM, /* I40E_AQ_RC_EPERM */ |
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-ENOENT, /* I40E_AQ_RC_ENOENT */ |
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-ESRCH, /* I40E_AQ_RC_ESRCH */ |
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-EINTR, /* I40E_AQ_RC_EINTR */ |
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-EIO, /* I40E_AQ_RC_EIO */ |
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-ENXIO, /* I40E_AQ_RC_ENXIO */ |
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-E2BIG, /* I40E_AQ_RC_E2BIG */ |
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-EAGAIN, /* I40E_AQ_RC_EAGAIN */ |
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-ENOMEM, /* I40E_AQ_RC_ENOMEM */ |
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-EACCES, /* I40E_AQ_RC_EACCES */ |
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-EFAULT, /* I40E_AQ_RC_EFAULT */ |
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-EBUSY, /* I40E_AQ_RC_EBUSY */ |
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-EEXIST, /* I40E_AQ_RC_EEXIST */ |
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-EINVAL, /* I40E_AQ_RC_EINVAL */ |
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-ENOTTY, /* I40E_AQ_RC_ENOTTY */ |
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-ENOSPC, /* I40E_AQ_RC_ENOSPC */ |
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-ENOSYS, /* I40E_AQ_RC_ENOSYS */ |
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-ERANGE, /* I40E_AQ_RC_ERANGE */ |
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-EPIPE, /* I40E_AQ_RC_EFLUSHED */ |
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-ESPIPE, /* I40E_AQ_RC_BAD_ADDR */ |
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-EROFS, /* I40E_AQ_RC_EMODE */ |
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-EFBIG, /* I40E_AQ_RC_EFBIG */ |
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}; |
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/* aq_rc is invalid if AQ timed out */ |
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if (aq_ret == I40E_ERR_ADMIN_QUEUE_TIMEOUT) |
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return -EAGAIN; |
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if (!((u32)aq_rc < (sizeof(aq_to_posix) / sizeof((aq_to_posix)[0])))) |
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return -ERANGE; |
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return aq_to_posix[aq_rc]; |
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} |
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/* general information */ |
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#define I40E_AQ_LARGE_BUF 512 |
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#define I40E_ASQ_CMD_TIMEOUT 250000 /* usecs */ |
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void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, |
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u16 opcode); |
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#endif /* _I40E_ADMINQ_H_ */
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