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305 lines
7.5 KiB
305 lines
7.5 KiB
// SPDX-License-Identifier: GPL-2.0-only |
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/* |
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* STM32 ALSA SoC Digital Audio Interface (SAI) driver. |
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* |
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* Copyright (C) 2016, STMicroelectronics - All Rights Reserved |
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* Author(s): Olivier Moysan <[email protected]> for STMicroelectronics. |
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*/ |
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#include <linux/bitfield.h> |
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#include <linux/clk.h> |
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#include <linux/delay.h> |
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#include <linux/module.h> |
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#include <linux/of_platform.h> |
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#include <linux/pinctrl/consumer.h> |
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#include <linux/reset.h> |
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#include <sound/dmaengine_pcm.h> |
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#include <sound/core.h> |
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#include "stm32_sai.h" |
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static const struct stm32_sai_conf stm32_sai_conf_f4 = { |
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.version = STM_SAI_STM32F4, |
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.fifo_size = 8, |
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.has_spdif_pdm = false, |
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}; |
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/* |
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* Default settings for stm32 H7 socs and next. |
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* These default settings will be overridden if the soc provides |
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* support of hardware configuration registers. |
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*/ |
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static const struct stm32_sai_conf stm32_sai_conf_h7 = { |
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.version = STM_SAI_STM32H7, |
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.fifo_size = 8, |
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.has_spdif_pdm = true, |
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}; |
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static const struct of_device_id stm32_sai_ids[] = { |
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{ .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 }, |
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{ .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 }, |
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{} |
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}; |
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static int stm32_sai_pclk_disable(struct device *dev) |
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{ |
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struct stm32_sai_data *sai = dev_get_drvdata(dev); |
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clk_disable_unprepare(sai->pclk); |
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return 0; |
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} |
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static int stm32_sai_pclk_enable(struct device *dev) |
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{ |
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struct stm32_sai_data *sai = dev_get_drvdata(dev); |
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int ret; |
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ret = clk_prepare_enable(sai->pclk); |
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if (ret) { |
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dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret); |
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return ret; |
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} |
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return 0; |
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} |
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static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci) |
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{ |
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int ret; |
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/* Enable peripheral clock to allow GCR register access */ |
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ret = stm32_sai_pclk_enable(&sai->pdev->dev); |
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if (ret) |
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return ret; |
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writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base); |
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stm32_sai_pclk_disable(&sai->pdev->dev); |
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return 0; |
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} |
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static int stm32_sai_sync_conf_provider(struct stm32_sai_data *sai, int synco) |
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{ |
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u32 prev_synco; |
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int ret; |
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/* Enable peripheral clock to allow GCR register access */ |
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ret = stm32_sai_pclk_enable(&sai->pdev->dev); |
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if (ret) |
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return ret; |
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dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n", |
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sai->pdev->dev.of_node, |
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synco == STM_SAI_SYNC_OUT_A ? "A" : "B"); |
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prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base)); |
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if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) { |
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dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n", |
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sai->pdev->dev.of_node, |
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prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B"); |
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stm32_sai_pclk_disable(&sai->pdev->dev); |
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return -EINVAL; |
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} |
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writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base); |
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stm32_sai_pclk_disable(&sai->pdev->dev); |
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return 0; |
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} |
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static int stm32_sai_set_sync(struct stm32_sai_data *sai_client, |
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struct device_node *np_provider, |
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int synco, int synci) |
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{ |
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struct platform_device *pdev = of_find_device_by_node(np_provider); |
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struct stm32_sai_data *sai_provider; |
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int ret; |
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if (!pdev) { |
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dev_err(&sai_client->pdev->dev, |
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"Device not found for node %pOFn\n", np_provider); |
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of_node_put(np_provider); |
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return -ENODEV; |
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} |
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sai_provider = platform_get_drvdata(pdev); |
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if (!sai_provider) { |
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dev_err(&sai_client->pdev->dev, |
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"SAI sync provider data not found\n"); |
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ret = -EINVAL; |
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goto error; |
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} |
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/* Configure sync client */ |
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ret = stm32_sai_sync_conf_client(sai_client, synci); |
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if (ret < 0) |
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goto error; |
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/* Configure sync provider */ |
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ret = stm32_sai_sync_conf_provider(sai_provider, synco); |
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error: |
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put_device(&pdev->dev); |
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of_node_put(np_provider); |
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return ret; |
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} |
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static int stm32_sai_probe(struct platform_device *pdev) |
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{ |
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struct stm32_sai_data *sai; |
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struct reset_control *rst; |
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const struct of_device_id *of_id; |
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u32 val; |
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int ret; |
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sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL); |
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if (!sai) |
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return -ENOMEM; |
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sai->base = devm_platform_ioremap_resource(pdev, 0); |
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if (IS_ERR(sai->base)) |
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return PTR_ERR(sai->base); |
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of_id = of_match_device(stm32_sai_ids, &pdev->dev); |
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if (of_id) |
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memcpy(&sai->conf, (const struct stm32_sai_conf *)of_id->data, |
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sizeof(struct stm32_sai_conf)); |
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else |
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return -EINVAL; |
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if (!STM_SAI_IS_F4(sai)) { |
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sai->pclk = devm_clk_get(&pdev->dev, "pclk"); |
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if (IS_ERR(sai->pclk)) { |
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if (PTR_ERR(sai->pclk) != -EPROBE_DEFER) |
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dev_err(&pdev->dev, "missing bus clock pclk: %ld\n", |
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PTR_ERR(sai->pclk)); |
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return PTR_ERR(sai->pclk); |
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} |
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} |
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sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k"); |
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if (IS_ERR(sai->clk_x8k)) { |
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if (PTR_ERR(sai->clk_x8k) != -EPROBE_DEFER) |
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dev_err(&pdev->dev, "missing x8k parent clock: %ld\n", |
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PTR_ERR(sai->clk_x8k)); |
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return PTR_ERR(sai->clk_x8k); |
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} |
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sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k"); |
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if (IS_ERR(sai->clk_x11k)) { |
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if (PTR_ERR(sai->clk_x11k) != -EPROBE_DEFER) |
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dev_err(&pdev->dev, "missing x11k parent clock: %ld\n", |
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PTR_ERR(sai->clk_x11k)); |
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return PTR_ERR(sai->clk_x11k); |
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} |
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/* init irqs */ |
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sai->irq = platform_get_irq(pdev, 0); |
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if (sai->irq < 0) |
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return sai->irq; |
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/* reset */ |
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rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); |
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if (IS_ERR(rst)) { |
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if (PTR_ERR(rst) != -EPROBE_DEFER) |
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dev_err(&pdev->dev, "Reset controller error %ld\n", |
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PTR_ERR(rst)); |
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return PTR_ERR(rst); |
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} |
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reset_control_assert(rst); |
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udelay(2); |
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reset_control_deassert(rst); |
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/* Enable peripheral clock to allow register access */ |
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ret = clk_prepare_enable(sai->pclk); |
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if (ret) { |
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dev_err(&pdev->dev, "failed to enable clock: %d\n", ret); |
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return ret; |
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} |
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val = FIELD_GET(SAI_IDR_ID_MASK, |
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readl_relaxed(sai->base + STM_SAI_IDR)); |
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if (val == SAI_IPIDR_NUMBER) { |
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val = readl_relaxed(sai->base + STM_SAI_HWCFGR); |
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sai->conf.fifo_size = FIELD_GET(SAI_HWCFGR_FIFO_SIZE, val); |
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sai->conf.has_spdif_pdm = !!FIELD_GET(SAI_HWCFGR_SPDIF_PDM, |
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val); |
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val = readl_relaxed(sai->base + STM_SAI_VERR); |
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sai->conf.version = val; |
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dev_dbg(&pdev->dev, "SAI version: %lu.%lu registered\n", |
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FIELD_GET(SAI_VERR_MAJ_MASK, val), |
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FIELD_GET(SAI_VERR_MIN_MASK, val)); |
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} |
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clk_disable_unprepare(sai->pclk); |
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sai->pdev = pdev; |
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sai->set_sync = &stm32_sai_set_sync; |
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platform_set_drvdata(pdev, sai); |
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return devm_of_platform_populate(&pdev->dev); |
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} |
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#ifdef CONFIG_PM_SLEEP |
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/* |
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* When pins are shared by two sai sub instances, pins have to be defined |
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* in sai parent node. In this case, pins state is not managed by alsa fw. |
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* These pins are managed in suspend/resume callbacks. |
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*/ |
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static int stm32_sai_suspend(struct device *dev) |
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{ |
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struct stm32_sai_data *sai = dev_get_drvdata(dev); |
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int ret; |
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ret = stm32_sai_pclk_enable(dev); |
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if (ret) |
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return ret; |
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sai->gcr = readl_relaxed(sai->base); |
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stm32_sai_pclk_disable(dev); |
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return pinctrl_pm_select_sleep_state(dev); |
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} |
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static int stm32_sai_resume(struct device *dev) |
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{ |
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struct stm32_sai_data *sai = dev_get_drvdata(dev); |
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int ret; |
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ret = stm32_sai_pclk_enable(dev); |
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if (ret) |
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return ret; |
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writel_relaxed(sai->gcr, sai->base); |
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stm32_sai_pclk_disable(dev); |
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return pinctrl_pm_select_default_state(dev); |
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} |
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#endif /* CONFIG_PM_SLEEP */ |
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static const struct dev_pm_ops stm32_sai_pm_ops = { |
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SET_SYSTEM_SLEEP_PM_OPS(stm32_sai_suspend, stm32_sai_resume) |
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}; |
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MODULE_DEVICE_TABLE(of, stm32_sai_ids); |
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static struct platform_driver stm32_sai_driver = { |
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.driver = { |
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.name = "st,stm32-sai", |
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.of_match_table = stm32_sai_ids, |
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.pm = &stm32_sai_pm_ops, |
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}, |
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.probe = stm32_sai_probe, |
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}; |
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module_platform_driver(stm32_sai_driver); |
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MODULE_DESCRIPTION("STM32 Soc SAI Interface"); |
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MODULE_AUTHOR("Olivier Moysan <[email protected]>"); |
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MODULE_ALIAS("platform:st,stm32-sai"); |
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MODULE_LICENSE("GPL v2");
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