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296 lines
6.8 KiB
296 lines
6.8 KiB
// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* Driver for Digigram VX soundcards |
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* |
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* IEC958 stuff |
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* |
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* Copyright (c) 2002 by Takashi Iwai <[email protected]> |
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*/ |
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#include <linux/delay.h> |
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#include <sound/core.h> |
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#include <sound/vx_core.h> |
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#include "vx_cmd.h" |
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/* |
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* vx_modify_board_clock - tell the board that its clock has been modified |
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* @sync: DSP needs to resynchronize its FIFO |
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*/ |
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static int vx_modify_board_clock(struct vx_core *chip, int sync) |
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{ |
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struct vx_rmh rmh; |
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vx_init_rmh(&rmh, CMD_MODIFY_CLOCK); |
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/* Ask the DSP to resynchronize its FIFO. */ |
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if (sync) |
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rmh.Cmd[0] |= CMD_MODIFY_CLOCK_S_BIT; |
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return vx_send_msg(chip, &rmh); |
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} |
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/* |
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* vx_modify_board_inputs - resync audio inputs |
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*/ |
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static int vx_modify_board_inputs(struct vx_core *chip) |
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{ |
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struct vx_rmh rmh; |
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vx_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS); |
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rmh.Cmd[0] |= 1 << 0; /* reference: AUDIO 0 */ |
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return vx_send_msg(chip, &rmh); |
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} |
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/* |
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* vx_read_one_cbit - read one bit from UER config |
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* @index: the bit index |
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* returns 0 or 1. |
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*/ |
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static int vx_read_one_cbit(struct vx_core *chip, int index) |
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{ |
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int val; |
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mutex_lock(&chip->lock); |
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if (chip->type >= VX_TYPE_VXPOCKET) { |
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vx_outb(chip, CSUER, 1); /* read */ |
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vx_outb(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK); |
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val = (vx_inb(chip, RUER) >> 7) & 0x01; |
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} else { |
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vx_outl(chip, CSUER, 1); /* read */ |
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vx_outl(chip, RUER, index & XX_UER_CBITS_OFFSET_MASK); |
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val = (vx_inl(chip, RUER) >> 7) & 0x01; |
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} |
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mutex_unlock(&chip->lock); |
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return val; |
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} |
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/* |
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* vx_write_one_cbit - write one bit to UER config |
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* @index: the bit index |
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* @val: bit value, 0 or 1 |
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*/ |
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static void vx_write_one_cbit(struct vx_core *chip, int index, int val) |
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{ |
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val = !!val; /* 0 or 1 */ |
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mutex_lock(&chip->lock); |
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if (vx_is_pcmcia(chip)) { |
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vx_outb(chip, CSUER, 0); /* write */ |
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vx_outb(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK)); |
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} else { |
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vx_outl(chip, CSUER, 0); /* write */ |
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vx_outl(chip, RUER, (val << 7) | (index & XX_UER_CBITS_OFFSET_MASK)); |
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} |
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mutex_unlock(&chip->lock); |
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} |
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/* |
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* vx_read_uer_status - read the current UER status |
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* @mode: pointer to store the UER mode, VX_UER_MODE_XXX |
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* |
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* returns the frequency of UER, or 0 if not sync, |
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* or a negative error code. |
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*/ |
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static int vx_read_uer_status(struct vx_core *chip, unsigned int *mode) |
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{ |
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int val, freq; |
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/* Default values */ |
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freq = 0; |
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/* Read UER status */ |
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if (vx_is_pcmcia(chip)) |
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val = vx_inb(chip, CSUER); |
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else |
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val = vx_inl(chip, CSUER); |
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if (val < 0) |
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return val; |
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/* If clock is present, read frequency */ |
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if (val & VX_SUER_CLOCK_PRESENT_MASK) { |
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switch (val & VX_SUER_FREQ_MASK) { |
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case VX_SUER_FREQ_32KHz_MASK: |
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freq = 32000; |
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break; |
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case VX_SUER_FREQ_44KHz_MASK: |
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freq = 44100; |
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break; |
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case VX_SUER_FREQ_48KHz_MASK: |
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freq = 48000; |
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break; |
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} |
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} |
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if (val & VX_SUER_DATA_PRESENT_MASK) |
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/* bit 0 corresponds to consumer/professional bit */ |
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*mode = vx_read_one_cbit(chip, 0) ? |
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VX_UER_MODE_PROFESSIONAL : VX_UER_MODE_CONSUMER; |
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else |
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*mode = VX_UER_MODE_NOT_PRESENT; |
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return freq; |
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} |
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/* |
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* compute the sample clock value from frequency |
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* |
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* The formula is as follows: |
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* |
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* HexFreq = (dword) ((double) ((double) 28224000 / (double) Frequency)) |
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* switch ( HexFreq & 0x00000F00 ) |
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* case 0x00000100: ; |
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* case 0x00000200: |
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* case 0x00000300: HexFreq -= 0x00000201 ; |
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* case 0x00000400: |
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* case 0x00000500: |
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* case 0x00000600: |
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* case 0x00000700: HexFreq = (dword) (((double) 28224000 / (double) (Frequency*2)) - 1) |
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* default : HexFreq = (dword) ((double) 28224000 / (double) (Frequency*4)) - 0x000001FF |
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*/ |
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static int vx_calc_clock_from_freq(struct vx_core *chip, int freq) |
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{ |
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int hexfreq; |
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if (snd_BUG_ON(freq <= 0)) |
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return 0; |
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hexfreq = (28224000 * 10) / freq; |
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hexfreq = (hexfreq + 5) / 10; |
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/* max freq = 55125 Hz */ |
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if (snd_BUG_ON(hexfreq <= 0x00000200)) |
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return 0; |
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if (hexfreq <= 0x03ff) |
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return hexfreq - 0x00000201; |
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if (hexfreq <= 0x07ff) |
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return (hexfreq / 2) - 1; |
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if (hexfreq <= 0x0fff) |
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return (hexfreq / 4) + 0x000001ff; |
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return 0x5fe; /* min freq = 6893 Hz */ |
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} |
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/* |
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* vx_change_clock_source - change the clock source |
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* @source: the new source |
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*/ |
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static void vx_change_clock_source(struct vx_core *chip, int source) |
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{ |
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/* we mute DAC to prevent clicks */ |
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vx_toggle_dac_mute(chip, 1); |
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mutex_lock(&chip->lock); |
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chip->ops->set_clock_source(chip, source); |
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chip->clock_source = source; |
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mutex_unlock(&chip->lock); |
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/* unmute */ |
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vx_toggle_dac_mute(chip, 0); |
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} |
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/* |
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* set the internal clock |
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*/ |
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void vx_set_internal_clock(struct vx_core *chip, unsigned int freq) |
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{ |
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int clock; |
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/* Get real clock value */ |
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clock = vx_calc_clock_from_freq(chip, freq); |
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snd_printdd(KERN_DEBUG "set internal clock to 0x%x from freq %d\n", clock, freq); |
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mutex_lock(&chip->lock); |
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if (vx_is_pcmcia(chip)) { |
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vx_outb(chip, HIFREQ, (clock >> 8) & 0x0f); |
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vx_outb(chip, LOFREQ, clock & 0xff); |
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} else { |
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vx_outl(chip, HIFREQ, (clock >> 8) & 0x0f); |
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vx_outl(chip, LOFREQ, clock & 0xff); |
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} |
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mutex_unlock(&chip->lock); |
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} |
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/* |
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* set the iec958 status bits |
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* @bits: 32-bit status bits |
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*/ |
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void vx_set_iec958_status(struct vx_core *chip, unsigned int bits) |
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{ |
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int i; |
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if (chip->chip_status & VX_STAT_IS_STALE) |
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return; |
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for (i = 0; i < 32; i++) |
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vx_write_one_cbit(chip, i, bits & (1 << i)); |
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} |
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/* |
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* vx_set_clock - change the clock and audio source if necessary |
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*/ |
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int vx_set_clock(struct vx_core *chip, unsigned int freq) |
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{ |
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int src_changed = 0; |
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if (chip->chip_status & VX_STAT_IS_STALE) |
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return 0; |
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/* change the audio source if possible */ |
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vx_sync_audio_source(chip); |
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if (chip->clock_mode == VX_CLOCK_MODE_EXTERNAL || |
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(chip->clock_mode == VX_CLOCK_MODE_AUTO && |
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chip->audio_source == VX_AUDIO_SRC_DIGITAL)) { |
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if (chip->clock_source != UER_SYNC) { |
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vx_change_clock_source(chip, UER_SYNC); |
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mdelay(6); |
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src_changed = 1; |
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} |
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} else if (chip->clock_mode == VX_CLOCK_MODE_INTERNAL || |
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(chip->clock_mode == VX_CLOCK_MODE_AUTO && |
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chip->audio_source != VX_AUDIO_SRC_DIGITAL)) { |
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if (chip->clock_source != INTERNAL_QUARTZ) { |
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vx_change_clock_source(chip, INTERNAL_QUARTZ); |
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src_changed = 1; |
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} |
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if (chip->freq == freq) |
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return 0; |
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vx_set_internal_clock(chip, freq); |
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if (src_changed) |
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vx_modify_board_inputs(chip); |
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} |
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if (chip->freq == freq) |
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return 0; |
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chip->freq = freq; |
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vx_modify_board_clock(chip, 1); |
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return 0; |
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} |
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/* |
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* vx_change_frequency - called from interrupt handler |
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*/ |
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int vx_change_frequency(struct vx_core *chip) |
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{ |
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int freq; |
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if (chip->chip_status & VX_STAT_IS_STALE) |
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return 0; |
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if (chip->clock_source == INTERNAL_QUARTZ) |
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return 0; |
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/* |
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* Read the real UER board frequency |
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*/ |
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freq = vx_read_uer_status(chip, &chip->uer_detected); |
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if (freq < 0) |
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return freq; |
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/* |
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* The frequency computed by the DSP is good and |
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* is different from the previous computed. |
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*/ |
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if (freq == 48000 || freq == 44100 || freq == 32000) |
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chip->freq_detected = freq; |
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return 0; |
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}
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