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517 lines
13 KiB
517 lines
13 KiB
// SPDX-License-Identifier: GPL-1.0+ |
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/* |
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* OHCI HCD (Host Controller Driver) for USB. |
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* |
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* (C) Copyright 1999 Roman Weissgaerber <[email protected]> |
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* (C) Copyright 2000-2005 David Brownell |
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* (C) Copyright 2002 Hewlett-Packard Company |
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* |
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* OMAP Bus Glue |
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* |
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* Modified for OMAP by Tony Lindgren <[email protected]> |
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* Based on the 2.4 OMAP OHCI driver originally done by MontaVista Software Inc. |
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* and on ohci-sa1111.c by Christopher Hoover <[email protected]> |
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* |
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* This file is licenced under the GPL. |
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*/ |
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#include <linux/clk.h> |
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#include <linux/dma-mapping.h> |
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#include <linux/err.h> |
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#include <linux/gpio/consumer.h> |
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#include <linux/io.h> |
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#include <linux/jiffies.h> |
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#include <linux/kernel.h> |
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#include <linux/module.h> |
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#include <linux/usb/otg.h> |
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#include <linux/platform_device.h> |
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#include <linux/signal.h> |
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#include <linux/usb.h> |
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#include <linux/usb/hcd.h> |
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#include "ohci.h" |
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#include <asm/io.h> |
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#include <asm/mach-types.h> |
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#include <mach/mux.h> |
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#include <mach/hardware.h> |
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#include <mach/usb.h> |
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/* OMAP-1510 OHCI has its own MMU for DMA */ |
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#define OMAP1510_LB_MEMSIZE 32 /* Should be same as SDRAM size */ |
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#define OMAP1510_LB_CLOCK_DIV 0xfffec10c |
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#define OMAP1510_LB_MMU_CTL 0xfffec208 |
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#define OMAP1510_LB_MMU_LCK 0xfffec224 |
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#define OMAP1510_LB_MMU_LD_TLB 0xfffec228 |
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#define OMAP1510_LB_MMU_CAM_H 0xfffec22c |
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#define OMAP1510_LB_MMU_CAM_L 0xfffec230 |
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#define OMAP1510_LB_MMU_RAM_H 0xfffec234 |
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#define OMAP1510_LB_MMU_RAM_L 0xfffec238 |
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#define DRIVER_DESC "OHCI OMAP driver" |
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struct ohci_omap_priv { |
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struct clk *usb_host_ck; |
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struct clk *usb_dc_ck; |
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struct gpio_desc *power; |
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struct gpio_desc *overcurrent; |
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}; |
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static const char hcd_name[] = "ohci-omap"; |
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static struct hc_driver __read_mostly ohci_omap_hc_driver; |
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#define hcd_to_ohci_omap_priv(h) \ |
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((struct ohci_omap_priv *)hcd_to_ohci(h)->priv) |
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static void omap_ohci_clock_power(struct ohci_omap_priv *priv, int on) |
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{ |
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if (on) { |
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clk_enable(priv->usb_dc_ck); |
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clk_enable(priv->usb_host_ck); |
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/* guesstimate for T5 == 1x 32K clock + APLL lock time */ |
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udelay(100); |
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} else { |
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clk_disable(priv->usb_host_ck); |
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clk_disable(priv->usb_dc_ck); |
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} |
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} |
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/* |
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* Board specific gang-switched transceiver power on/off. |
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* NOTE: OSK supplies power from DC, not battery. |
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*/ |
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static int omap_ohci_transceiver_power(struct ohci_omap_priv *priv, int on) |
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{ |
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if (on) { |
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if (machine_is_omap_innovator() && cpu_is_omap1510()) |
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__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) |
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| ((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
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INNOVATOR_FPGA_CAM_USB_CONTROL); |
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else if (priv->power) |
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gpiod_set_value_cansleep(priv->power, 0); |
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} else { |
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if (machine_is_omap_innovator() && cpu_is_omap1510()) |
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__raw_writeb(__raw_readb(INNOVATOR_FPGA_CAM_USB_CONTROL) |
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& ~((1 << 5/*usb1*/) | (1 << 3/*usb2*/)), |
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INNOVATOR_FPGA_CAM_USB_CONTROL); |
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else if (priv->power) |
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gpiod_set_value_cansleep(priv->power, 1); |
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} |
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return 0; |
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} |
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#ifdef CONFIG_ARCH_OMAP15XX |
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/* |
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* OMAP-1510 specific Local Bus clock on/off |
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*/ |
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static int omap_1510_local_bus_power(int on) |
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{ |
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if (on) { |
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omap_writel((1 << 1) | (1 << 0), OMAP1510_LB_MMU_CTL); |
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udelay(200); |
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} else { |
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omap_writel(0, OMAP1510_LB_MMU_CTL); |
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} |
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return 0; |
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} |
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/* |
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* OMAP-1510 specific Local Bus initialization |
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* NOTE: This assumes 32MB memory size in OMAP1510LB_MEMSIZE. |
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* See also arch/mach-omap/memory.h for __virt_to_dma() and |
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* __dma_to_virt() which need to match with the physical |
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* Local Bus address below. |
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*/ |
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static int omap_1510_local_bus_init(void) |
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{ |
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unsigned int tlb; |
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unsigned long lbaddr, physaddr; |
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omap_writel((omap_readl(OMAP1510_LB_CLOCK_DIV) & 0xfffffff8) | 0x4, |
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OMAP1510_LB_CLOCK_DIV); |
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/* Configure the Local Bus MMU table */ |
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for (tlb = 0; tlb < OMAP1510_LB_MEMSIZE; tlb++) { |
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lbaddr = tlb * 0x00100000 + OMAP1510_LB_OFFSET; |
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physaddr = tlb * 0x00100000 + PHYS_OFFSET; |
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omap_writel((lbaddr & 0x0fffffff) >> 22, OMAP1510_LB_MMU_CAM_H); |
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omap_writel(((lbaddr & 0x003ffc00) >> 6) | 0xc, |
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OMAP1510_LB_MMU_CAM_L); |
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omap_writel(physaddr >> 16, OMAP1510_LB_MMU_RAM_H); |
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omap_writel((physaddr & 0x0000fc00) | 0x300, OMAP1510_LB_MMU_RAM_L); |
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omap_writel(tlb << 4, OMAP1510_LB_MMU_LCK); |
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omap_writel(0x1, OMAP1510_LB_MMU_LD_TLB); |
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} |
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/* Enable the walking table */ |
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omap_writel(omap_readl(OMAP1510_LB_MMU_CTL) | (1 << 3), OMAP1510_LB_MMU_CTL); |
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udelay(200); |
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return 0; |
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} |
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#else |
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#define omap_1510_local_bus_power(x) {} |
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#define omap_1510_local_bus_init() {} |
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#endif |
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#ifdef CONFIG_USB_OTG |
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static void start_hnp(struct ohci_hcd *ohci) |
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{ |
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struct usb_hcd *hcd = ohci_to_hcd(ohci); |
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const unsigned port = hcd->self.otg_port - 1; |
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unsigned long flags; |
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u32 l; |
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otg_start_hnp(hcd->usb_phy->otg); |
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local_irq_save(flags); |
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hcd->usb_phy->otg->state = OTG_STATE_A_SUSPEND; |
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writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); |
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l = omap_readl(OTG_CTRL); |
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l &= ~OTG_A_BUSREQ; |
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omap_writel(l, OTG_CTRL); |
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local_irq_restore(flags); |
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} |
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#endif |
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/*-------------------------------------------------------------------------*/ |
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static int ohci_omap_reset(struct usb_hcd *hcd) |
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{ |
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struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
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struct omap_usb_config *config = dev_get_platdata(hcd->self.controller); |
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struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd); |
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int need_transceiver = (config->otg != 0); |
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int ret; |
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dev_dbg(hcd->self.controller, "starting USB Controller\n"); |
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if (config->otg) { |
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hcd->self.otg_port = config->otg; |
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/* default/minimum OTG power budget: 8 mA */ |
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hcd->power_budget = 8; |
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} |
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/* boards can use OTG transceivers in non-OTG modes */ |
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need_transceiver = need_transceiver |
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|| machine_is_omap_h2() || machine_is_omap_h3(); |
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/* XXX OMAP16xx only */ |
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if (config->ocpi_enable) |
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config->ocpi_enable(); |
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#ifdef CONFIG_USB_OTG |
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if (need_transceiver) { |
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hcd->usb_phy = usb_get_phy(USB_PHY_TYPE_USB2); |
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if (!IS_ERR_OR_NULL(hcd->usb_phy)) { |
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int status = otg_set_host(hcd->usb_phy->otg, |
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&ohci_to_hcd(ohci)->self); |
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dev_dbg(hcd->self.controller, "init %s phy, status %d\n", |
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hcd->usb_phy->label, status); |
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if (status) { |
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usb_put_phy(hcd->usb_phy); |
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return status; |
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} |
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} else { |
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return -EPROBE_DEFER; |
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} |
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hcd->skip_phy_initialization = 1; |
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ohci->start_hnp = start_hnp; |
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} |
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#endif |
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omap_ohci_clock_power(priv, 1); |
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if (cpu_is_omap15xx()) { |
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omap_1510_local_bus_power(1); |
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omap_1510_local_bus_init(); |
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} |
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ret = ohci_setup(hcd); |
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if (ret < 0) |
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return ret; |
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if (config->otg || config->rwc) { |
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ohci->hc_control = OHCI_CTRL_RWC; |
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writel(OHCI_CTRL_RWC, &ohci->regs->control); |
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} |
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/* board-specific power switching and overcurrent support */ |
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if (machine_is_omap_osk() || machine_is_omap_innovator()) { |
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u32 rh = roothub_a (ohci); |
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/* power switching (ganged by default) */ |
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rh &= ~RH_A_NPS; |
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/* TPS2045 switch for internal transceiver (port 1) */ |
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if (machine_is_omap_osk()) { |
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ohci_to_hcd(ohci)->power_budget = 250; |
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rh &= ~RH_A_NOCP; |
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/* gpio9 for overcurrent detction */ |
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omap_cfg_reg(W8_1610_GPIO9); |
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/* for paranoia's sake: disable USB.PUEN */ |
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omap_cfg_reg(W4_USB_HIGHZ); |
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} |
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ohci_writel(ohci, rh, &ohci->regs->roothub.a); |
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ohci->flags &= ~OHCI_QUIRK_HUB_POWER; |
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} else if (machine_is_nokia770()) { |
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/* We require a self-powered hub, which should have |
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* plenty of power. */ |
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ohci_to_hcd(ohci)->power_budget = 0; |
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} |
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/* FIXME hub_wq hub requests should manage power switching */ |
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omap_ohci_transceiver_power(priv, 1); |
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/* board init will have already handled HMC and mux setup. |
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* any external transceiver should already be initialized |
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* too, so all configured ports use the right signaling now. |
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*/ |
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return 0; |
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} |
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/*-------------------------------------------------------------------------*/ |
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/** |
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* ohci_hcd_omap_probe - initialize OMAP-based HCDs |
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* @pdev: USB controller to probe |
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* |
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* Context: task context, might sleep |
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* |
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* Allocates basic resources for this USB host controller, and |
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* then invokes the start() method for the HCD associated with it |
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* through the hotplug entry's driver_data. |
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*/ |
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static int ohci_hcd_omap_probe(struct platform_device *pdev) |
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{ |
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int retval, irq; |
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struct usb_hcd *hcd = 0; |
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struct ohci_omap_priv *priv; |
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if (pdev->num_resources != 2) { |
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dev_err(&pdev->dev, "invalid num_resources: %i\n", |
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pdev->num_resources); |
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return -ENODEV; |
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} |
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if (pdev->resource[0].flags != IORESOURCE_MEM |
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|| pdev->resource[1].flags != IORESOURCE_IRQ) { |
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dev_err(&pdev->dev, "invalid resource type\n"); |
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return -ENODEV; |
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} |
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hcd = usb_create_hcd(&ohci_omap_hc_driver, &pdev->dev, |
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dev_name(&pdev->dev)); |
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if (!hcd) |
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return -ENOMEM; |
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hcd->rsrc_start = pdev->resource[0].start; |
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hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1; |
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priv = hcd_to_ohci_omap_priv(hcd); |
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/* Obtain two optional GPIO lines */ |
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priv->power = devm_gpiod_get_optional(&pdev->dev, "power", GPIOD_ASIS); |
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if (IS_ERR(priv->power)) { |
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retval = PTR_ERR(priv->power); |
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goto err_put_hcd; |
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} |
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if (priv->power) |
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gpiod_set_consumer_name(priv->power, "OHCI power"); |
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/* |
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* This "overcurrent" GPIO line isn't really used in the code, |
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* but has a designated hardware function. |
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* TODO: implement proper overcurrent handling. |
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*/ |
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priv->overcurrent = devm_gpiod_get_optional(&pdev->dev, "overcurrent", |
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GPIOD_IN); |
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if (IS_ERR(priv->overcurrent)) { |
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retval = PTR_ERR(priv->overcurrent); |
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goto err_put_hcd; |
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} |
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if (priv->overcurrent) |
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gpiod_set_consumer_name(priv->overcurrent, "OHCI overcurrent"); |
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priv->usb_host_ck = clk_get(&pdev->dev, "usb_hhc_ck"); |
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if (IS_ERR(priv->usb_host_ck)) { |
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retval = PTR_ERR(priv->usb_host_ck); |
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goto err_put_hcd; |
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} |
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if (!cpu_is_omap15xx()) |
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priv->usb_dc_ck = clk_get(&pdev->dev, "usb_dc_ck"); |
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else |
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priv->usb_dc_ck = clk_get(&pdev->dev, "lb_ck"); |
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if (IS_ERR(priv->usb_dc_ck)) { |
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retval = PTR_ERR(priv->usb_dc_ck); |
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goto err_put_host_ck; |
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} |
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if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { |
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dev_dbg(&pdev->dev, "request_mem_region failed\n"); |
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retval = -EBUSY; |
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goto err_put_dc_ck; |
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} |
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hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); |
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if (!hcd->regs) { |
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dev_err(&pdev->dev, "can't ioremap OHCI HCD\n"); |
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retval = -ENOMEM; |
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goto err2; |
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} |
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irq = platform_get_irq(pdev, 0); |
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if (irq < 0) { |
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retval = -ENXIO; |
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goto err3; |
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} |
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retval = usb_add_hcd(hcd, irq, 0); |
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if (retval) |
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goto err3; |
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device_wakeup_enable(hcd->self.controller); |
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return 0; |
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err3: |
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iounmap(hcd->regs); |
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err2: |
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
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err_put_dc_ck: |
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clk_put(priv->usb_dc_ck); |
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err_put_host_ck: |
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clk_put(priv->usb_host_ck); |
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err_put_hcd: |
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usb_put_hcd(hcd); |
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return retval; |
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} |
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/* may be called with controller, bus, and devices active */ |
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/** |
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* ohci_hcd_omap_remove - shutdown processing for OMAP-based HCDs |
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* @pdev: USB Host Controller being removed |
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* |
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* Context: task context, might sleep |
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* |
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* Reverses the effect of ohci_hcd_omap_probe(), first invoking |
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* the HCD's stop() method. It is always called from a thread |
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* context, normally "rmmod", "apmd", or something similar. |
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*/ |
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static int ohci_hcd_omap_remove(struct platform_device *pdev) |
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{ |
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struct usb_hcd *hcd = platform_get_drvdata(pdev); |
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struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd); |
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dev_dbg(hcd->self.controller, "stopping USB Controller\n"); |
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usb_remove_hcd(hcd); |
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omap_ohci_clock_power(priv, 0); |
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if (!IS_ERR_OR_NULL(hcd->usb_phy)) { |
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(void) otg_set_host(hcd->usb_phy->otg, 0); |
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usb_put_phy(hcd->usb_phy); |
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} |
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iounmap(hcd->regs); |
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release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
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clk_put(priv->usb_dc_ck); |
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clk_put(priv->usb_host_ck); |
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usb_put_hcd(hcd); |
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return 0; |
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} |
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/*-------------------------------------------------------------------------*/ |
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#ifdef CONFIG_PM |
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static int ohci_omap_suspend(struct platform_device *pdev, pm_message_t message) |
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{ |
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struct usb_hcd *hcd = platform_get_drvdata(pdev); |
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struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
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struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd); |
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bool do_wakeup = device_may_wakeup(&pdev->dev); |
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int ret; |
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if (time_before(jiffies, ohci->next_statechange)) |
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msleep(5); |
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ohci->next_statechange = jiffies; |
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ret = ohci_suspend(hcd, do_wakeup); |
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if (ret) |
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return ret; |
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omap_ohci_clock_power(priv, 0); |
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return ret; |
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} |
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static int ohci_omap_resume(struct platform_device *dev) |
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{ |
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struct usb_hcd *hcd = platform_get_drvdata(dev); |
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struct ohci_hcd *ohci = hcd_to_ohci(hcd); |
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struct ohci_omap_priv *priv = hcd_to_ohci_omap_priv(hcd); |
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if (time_before(jiffies, ohci->next_statechange)) |
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msleep(5); |
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ohci->next_statechange = jiffies; |
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omap_ohci_clock_power(priv, 1); |
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ohci_resume(hcd, false); |
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return 0; |
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} |
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#endif |
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/*-------------------------------------------------------------------------*/ |
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/* |
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* Driver definition to register with the OMAP bus |
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*/ |
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static struct platform_driver ohci_hcd_omap_driver = { |
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.probe = ohci_hcd_omap_probe, |
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.remove = ohci_hcd_omap_remove, |
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.shutdown = usb_hcd_platform_shutdown, |
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#ifdef CONFIG_PM |
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.suspend = ohci_omap_suspend, |
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.resume = ohci_omap_resume, |
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#endif |
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.driver = { |
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.name = "ohci", |
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}, |
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}; |
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static const struct ohci_driver_overrides omap_overrides __initconst = { |
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.product_desc = "OMAP OHCI", |
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.reset = ohci_omap_reset, |
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.extra_priv_size = sizeof(struct ohci_omap_priv), |
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}; |
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static int __init ohci_omap_init(void) |
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{ |
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if (usb_disabled()) |
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return -ENODEV; |
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pr_info("%s: " DRIVER_DESC "\n", hcd_name); |
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ohci_init_driver(&ohci_omap_hc_driver, &omap_overrides); |
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return platform_driver_register(&ohci_hcd_omap_driver); |
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} |
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module_init(ohci_omap_init); |
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static void __exit ohci_omap_cleanup(void) |
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{ |
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platform_driver_unregister(&ohci_hcd_omap_driver); |
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} |
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module_exit(ohci_omap_cleanup); |
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MODULE_DESCRIPTION(DRIVER_DESC); |
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MODULE_ALIAS("platform:ohci"); |
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MODULE_LICENSE("GPL");
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