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120 lines
2.8 KiB
120 lines
2.8 KiB
// SPDX-License-Identifier: GPL-2.0 |
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/* |
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* PCIe driver for Renesas R-Car SoCs |
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* Copyright (C) 2014-2020 Renesas Electronics Europe Ltd |
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* |
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* Author: Phil Edworthy <[email protected]> |
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*/ |
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#include <linux/delay.h> |
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#include <linux/pci.h> |
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#include "pcie-rcar.h" |
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void rcar_pci_write_reg(struct rcar_pcie *pcie, u32 val, unsigned int reg) |
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{ |
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writel(val, pcie->base + reg); |
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} |
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u32 rcar_pci_read_reg(struct rcar_pcie *pcie, unsigned int reg) |
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{ |
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return readl(pcie->base + reg); |
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} |
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void rcar_rmw32(struct rcar_pcie *pcie, int where, u32 mask, u32 data) |
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{ |
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unsigned int shift = BITS_PER_BYTE * (where & 3); |
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u32 val = rcar_pci_read_reg(pcie, where & ~3); |
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val &= ~(mask << shift); |
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val |= data << shift; |
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rcar_pci_write_reg(pcie, val, where & ~3); |
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} |
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int rcar_pcie_wait_for_phyrdy(struct rcar_pcie *pcie) |
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{ |
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unsigned int timeout = 10; |
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while (timeout--) { |
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if (rcar_pci_read_reg(pcie, PCIEPHYSR) & PHYRDY) |
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return 0; |
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msleep(5); |
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} |
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return -ETIMEDOUT; |
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} |
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int rcar_pcie_wait_for_dl(struct rcar_pcie *pcie) |
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{ |
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unsigned int timeout = 10000; |
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while (timeout--) { |
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if ((rcar_pci_read_reg(pcie, PCIETSTR) & DATA_LINK_ACTIVE)) |
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return 0; |
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udelay(5); |
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cpu_relax(); |
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} |
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return -ETIMEDOUT; |
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} |
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void rcar_pcie_set_outbound(struct rcar_pcie *pcie, int win, |
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struct resource_entry *window) |
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{ |
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/* Setup PCIe address space mappings for each resource */ |
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struct resource *res = window->res; |
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resource_size_t res_start; |
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resource_size_t size; |
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u32 mask; |
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rcar_pci_write_reg(pcie, 0x00000000, PCIEPTCTLR(win)); |
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/* |
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* The PAMR mask is calculated in units of 128Bytes, which |
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* keeps things pretty simple. |
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*/ |
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size = resource_size(res); |
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if (size > 128) |
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mask = (roundup_pow_of_two(size) / SZ_128) - 1; |
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else |
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mask = 0x0; |
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rcar_pci_write_reg(pcie, mask << 7, PCIEPAMR(win)); |
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if (res->flags & IORESOURCE_IO) |
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res_start = pci_pio_to_address(res->start) - window->offset; |
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else |
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res_start = res->start - window->offset; |
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rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win)); |
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rcar_pci_write_reg(pcie, lower_32_bits(res_start) & ~0x7F, |
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PCIEPALR(win)); |
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/* First resource is for IO */ |
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mask = PAR_ENABLE; |
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if (res->flags & IORESOURCE_IO) |
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mask |= IO_SPACE; |
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rcar_pci_write_reg(pcie, mask, PCIEPTCTLR(win)); |
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} |
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void rcar_pcie_set_inbound(struct rcar_pcie *pcie, u64 cpu_addr, |
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u64 pci_addr, u64 flags, int idx, bool host) |
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{ |
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/* |
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* Set up 64-bit inbound regions as the range parser doesn't |
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* distinguish between 32 and 64-bit types. |
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*/ |
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if (host) |
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rcar_pci_write_reg(pcie, lower_32_bits(pci_addr), |
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PCIEPRAR(idx)); |
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rcar_pci_write_reg(pcie, lower_32_bits(cpu_addr), PCIELAR(idx)); |
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rcar_pci_write_reg(pcie, flags, PCIELAMR(idx)); |
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if (host) |
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rcar_pci_write_reg(pcie, upper_32_bits(pci_addr), |
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PCIEPRAR(idx + 1)); |
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rcar_pci_write_reg(pcie, upper_32_bits(cpu_addr), PCIELAR(idx + 1)); |
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rcar_pci_write_reg(pcie, 0, PCIELAMR(idx + 1)); |
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}
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