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162 lines
4.0 KiB
162 lines
4.0 KiB
// SPDX-License-Identifier: GPL-2.0+ |
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/* |
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* drivers/net/phy/qsemi.c |
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* |
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* Driver for Quality Semiconductor PHYs |
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* |
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* Author: Andy Fleming |
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* |
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* Copyright (c) 2004 Freescale Semiconductor, Inc. |
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*/ |
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#include <linux/kernel.h> |
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#include <linux/string.h> |
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#include <linux/errno.h> |
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#include <linux/unistd.h> |
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#include <linux/interrupt.h> |
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#include <linux/init.h> |
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#include <linux/delay.h> |
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#include <linux/netdevice.h> |
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#include <linux/etherdevice.h> |
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#include <linux/skbuff.h> |
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#include <linux/spinlock.h> |
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#include <linux/mm.h> |
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#include <linux/module.h> |
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#include <linux/mii.h> |
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#include <linux/ethtool.h> |
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#include <linux/phy.h> |
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#include <asm/io.h> |
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#include <asm/irq.h> |
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#include <linux/uaccess.h> |
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/* ------------------------------------------------------------------------- */ |
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/* The Quality Semiconductor QS6612 is used on the RPX CLLF */ |
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/* register definitions */ |
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#define MII_QS6612_MCR 17 /* Mode Control Register */ |
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#define MII_QS6612_FTR 27 /* Factory Test Register */ |
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#define MII_QS6612_MCO 28 /* Misc. Control Register */ |
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#define MII_QS6612_ISR 29 /* Interrupt Source Register */ |
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#define MII_QS6612_IMR 30 /* Interrupt Mask Register */ |
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#define MII_QS6612_IMR_INIT 0x003a |
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#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */ |
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#define QS6612_PCR_AN_COMPLETE 0x1000 |
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#define QS6612_PCR_RLBEN 0x0200 |
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#define QS6612_PCR_DCREN 0x0100 |
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#define QS6612_PCR_4B5BEN 0x0040 |
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#define QS6612_PCR_TX_ISOLATE 0x0020 |
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#define QS6612_PCR_MLT3_DIS 0x0002 |
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#define QS6612_PCR_SCRM_DESCRM 0x0001 |
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MODULE_DESCRIPTION("Quality Semiconductor PHY driver"); |
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MODULE_AUTHOR("Andy Fleming"); |
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MODULE_LICENSE("GPL"); |
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/* Returns 0, unless there's a write error */ |
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static int qs6612_config_init(struct phy_device *phydev) |
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{ |
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/* The PHY powers up isolated on the RPX, |
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* so send a command to allow operation. |
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* XXX - My docs indicate this should be 0x0940 |
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* ...or something. The current value sets three |
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* reserved bits, bit 11, which specifies it should be |
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* set to one, bit 10, which specifies it should be set |
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* to 0, and bit 7, which doesn't specify. However, my |
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* docs are preliminary, and I will leave it like this |
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* until someone more knowledgable corrects me or it. |
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* -- Andy Fleming |
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*/ |
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return phy_write(phydev, MII_QS6612_PCR, 0x0dc0); |
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} |
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static int qs6612_ack_interrupt(struct phy_device *phydev) |
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{ |
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int err; |
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/* The Interrupt Source register is not self-clearing, bits 4 and 5 are |
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* cleared when MII_BMSR is read and bits 1 and 3 are cleared when |
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* MII_EXPANSION is read |
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*/ |
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err = phy_read(phydev, MII_QS6612_ISR); |
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if (err < 0) |
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return err; |
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err = phy_read(phydev, MII_BMSR); |
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if (err < 0) |
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return err; |
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err = phy_read(phydev, MII_EXPANSION); |
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if (err < 0) |
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return err; |
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return 0; |
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} |
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static int qs6612_config_intr(struct phy_device *phydev) |
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{ |
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int err; |
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { |
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/* clear any interrupts before enabling them */ |
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err = qs6612_ack_interrupt(phydev); |
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if (err) |
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return err; |
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err = phy_write(phydev, MII_QS6612_IMR, |
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MII_QS6612_IMR_INIT); |
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} else { |
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err = phy_write(phydev, MII_QS6612_IMR, 0); |
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if (err) |
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return err; |
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/* clear any leftover interrupts */ |
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err = qs6612_ack_interrupt(phydev); |
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} |
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return err; |
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} |
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static irqreturn_t qs6612_handle_interrupt(struct phy_device *phydev) |
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{ |
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int irq_status; |
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irq_status = phy_read(phydev, MII_QS6612_ISR); |
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if (irq_status < 0) { |
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phy_error(phydev); |
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return IRQ_NONE; |
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} |
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if (!(irq_status & MII_QS6612_IMR_INIT)) |
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return IRQ_NONE; |
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/* the interrupt source register is not self-clearing */ |
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qs6612_ack_interrupt(phydev); |
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phy_trigger_machine(phydev); |
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return IRQ_HANDLED; |
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} |
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static struct phy_driver qs6612_driver[] = { { |
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.phy_id = 0x00181440, |
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.name = "QS6612", |
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.phy_id_mask = 0xfffffff0, |
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/* PHY_BASIC_FEATURES */ |
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.config_init = qs6612_config_init, |
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.config_intr = qs6612_config_intr, |
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.handle_interrupt = qs6612_handle_interrupt, |
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} }; |
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module_phy_driver(qs6612_driver); |
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static struct mdio_device_id __maybe_unused qs6612_tbl[] = { |
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{ 0x00181440, 0xfffffff0 }, |
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{ } |
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}; |
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MODULE_DEVICE_TABLE(mdio, qs6612_tbl);
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